1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update drawing to current requirements. Editorial changes throughout. - gap 07-03-12 Robert M. Heber REV SHET REV SHET REV STATUS REV A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY Larry E. Shaw DEFENSE SUPPLY CENTE
2、R COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Lee J. Surowiec COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Ray Monnin MICROCIRCUIT, DIGITAL, BIPOLAR, LOW POWER SCHOTTKY TTL, 10-BIT COUNTER, AND AGENCIES OF THE DEPARTMENT OF D
3、EFENSE DRAWING APPROVAL DATE 99-07-15 MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-99532 SHEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E072-07 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A
4、 5962-99532 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice o
5、f case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 99532 01 Q J X Federal stock class
6、designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appr
7、opriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type
8、Generic number Circuit function 01 GEM24501 10-bit counter 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883
9、compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package sty
10、le J GDIP1-T24 or CDIP2-T24 24 Dual-in-line package (.600 row spacing) K GDFP2-F24 or CDFP3-F24 24 Flat Package L GDIP3-T24 or CDIP4-T24 24 Dual-in-line package (.300 row spacing) 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendi
11、x A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99532 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratin
12、gs. 1/ Supply voltage (VCC) +7.0 V dc Maximum power dissipation (PD) 2/ 990 mW Input voltage (VI) . +5.5 V dc Off-State Output Voltage . +5.5 V dc Storage temperature range -65C to +150C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) +175C Case operating tempera
13、ture range (TC) -55C to +125C 1.4 Recommended operating conditions. Supply voltage range (VCC) . 4.5 V dc to 5.5 V dc Width of Clock (High) . 40 ns minimum Width of Clock (Low) 35 ns minimum Set up Time 60 ns minimum Hold Time . 3 ns minimum Case operating temperature (TC) -55C to +125C 2. APPLICABL
14、E DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT
15、OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103
16、 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or www.dodssp.daps.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, P
17、A 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained.
18、 _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ PDis defined as VCCx ICC. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from I
19、HS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99532 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535
20、and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A
21、for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2
22、.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.2 Function table. The function table shall be as specified on figure 2. 3.2.3 Test circuit. The test circuit shall be as specified on figure 3. 3.2.4 Case outlines. The case outlines shall be in accordance with
23、1.2.4 herein. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range
24、. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be ma
25、rked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be i
26、n accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall
27、 be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certifica
28、te of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers pr
29、oduct meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device cl
30、ass M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for a
31、ny change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore
32、at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 11 (see MIL-PRF-38535, appendix A).Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-
33、,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99532 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C Group A subgroups Limits 1/ Unit unless otherwise specifie
34、d Min Max High-level input voltage VIHAll pins except CLK 1, 2, 3 2.1 V VIHCLKAll outputs C1 = 50 pf 2/ 1, 2, 3 3.0 V Low-level input voltage VIL1, 2, 3 0.8 V Input clamp voltage VIKVCC= 4.5 V, II= -18 mA 1, 2, 3 -1.5 V High-level output voltage VOHVCC= 4.5 V, VIH= 2.0 V, IOH= -2 mA, VIL= 0.8V 1, 2,
35、 3 2.4 V Low-level output voltage VOLVCC= 4.5 V, VIH= 2.0 V, VIL= 0.8 V, IOL= 12 mA 1, 2, 3 0.5 V Input current at maximum input voltage IIVCC= 5.5 V, VI= 5.5 V 1, 2, 3 1.0 A High-level input current IIHVCC= 5.5 V, VI= 2.4 V 1, 2, 3 25 A Low-level input current IILVCC= 5.5 V, VI= 0.4 V 1, 2, 3 0.50
36、mA Short circuit current IOSVCC= 5.0 V 1, 2, 3 -30 -130 mA Supply current ICCVCC= 5.5 V 1, 2, 3 180 mA Off-State output current IOZLVCC= 5.5 V, VO= 0.5 V, VIL= 0.8 V, VIH= 2 V 1, 2, 3 1.0 A Off-State output current IOZHVCC= 5.5 V, VO= 2.4 V, VIL= 0.8 V, VIH= 2.0 V 1, 2, 3 1.0 A Functional test See 4
37、.4.1b 7, 8A, 8B Maximum clock frequency fMAXCL= 50 pF, 3/ R1= 200 , 9 10.5 MHz Clock to Q tPDR2= 390 9 35 ns Output enable delay tPZX9 55 ns Output disable delay tPXZ9 55 ns 1/ For negative and positive voltage and current values, the sign designates the potential difference to GND and the direction
38、 of current flow, respectively, and the absolute value of the magnitude, not the sign, is relative to the minimum and maximum limits, as applicable, listed herein. 2/ This device functions as a 54LS491 with the exception of this input characteristic. 3/ Load circuit is shown on Figure 3.Provided by
39、IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99532 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 Device type 01 Case outlines J, K, and L Terminal number Termi
40、nal symbol 1 CLK 2 D0 3 D1 4 D2-7 5 D8 6 D9 7 LD 8 CNT 9 UP 10 SET11 CIN 12 GND 13 OC 14 Q9 15 Q8 16 Q7 17 Q6 18 Q5 19 Q4 20 Q3 21 Q2 22 Q1 23 Q0 24 VCCFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRC
41、UIT DRAWING SIZE A 5962-99532 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 Inputs Outputs OC CLK SET LD CNT CIN UP D9-D0 Q9-Q0 OPERATION H X X X X X X X Z HI-Z L H X X X X X H Set all HIGH L L L X X X D D LOAD D L L H H X X X Q HOLD L L H L
42、H X X Q HOLD L L H L L L X Q plus 1 Count UP L L H L L H X Q minus 1 Count DOWN H = high logic level L = low logic level X irrelevant FIGURE 2. Function table. NOTES: 1. CLincludes probe and jig capacitance. FIGURE 3. Test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted
43、 without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99532 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be i
44、n accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535,
45、appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and sh
46、all be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and sha
47、ll be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015. (2) TA= +125C, minimum. b. Interim and final electrical test parameters
48、shall be as specified in table II herein. 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturers QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturers Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The
