1、t - T -7 EIA CBIiL 86 m 3234600 0000076 b m Il 1 COMPONENT BULLETIN .NO. 11 GUIDELINES FOR THE SURFACE MOUNTING OF MULTILAYER CERAMIC CHIP CAPACITORS AUGUST 1986 Engineering IPeportment tLECTRONIC INDUSTRIES ASSOCIATION NOTICE EIA Engineering Standards and Publications are designed to serve the publ
2、ic interest through eliminating misunderstandings between manufacturers and purchasers, facilitating interchangeability and improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for his particular need. Existence .of such Standards and
3、Pub- lications shall not in any respect preclude any member or non-member of EIA from manufacturing or selling products not conforming to such Standards and Publications, nor shall the existence of such Standards and Publications preclude their voluntary use by those other than EIA members, whether
4、the standard is to be used either domestically or internationally. Recommended Standards and Publications are adopted by EIA without regard o whether or not their adoption may involve patents on articles, materials, or processes. By such action, EIA does not assume any liability to any patent owner,
5、 nor does it assume any obligation whatever to parties adopting the Recom- mended Standard or Publication. Published by ELECTRONIC INDUSTRIES ASSOCIATION Engineering Department 2001 Eye Street, N.W. Washington, D.C. 20006 PRICE: $18.00 Printed in U.S.A. Comments and suggestionS.in regard to the cont
6、ents or intent of this specification are important to keeping this document current with the technology and are, the ref ore, welcomed. Please submit these to the attention of the 2.1 Ceramic Capacitor Working group. Include the following information: Your Name and Title Complete Business Address Te
7、lephone Number Date of Submission Your comments and/or suggestions. A statement of relative importance as appropriate. Mail to: Attention P2.1 Ceramic Capacitor working Group Electronic Industries Association Engineering Department 2001 Eye Street, NW Washington, DC 20006 EIA CBLL 86 3234600 0000099
8、 L TABLE - OF CONTENTS 1.0 Scope and Introduction PAGE 1; 1.1 Purpose 1.2 General Classification of Circuits and Components 1.2.1 Consumer Electronics 1.2.2 Industrial Electronics 1.2.3 Military and Aerospace 1.2.4 High ReliAbility Electronics 2.0 Ceramic Chip Capacitor Construction and Design 4 2.1
9、 Internal Design 2.1.1 Internal Electrodes 2.1.2 Internal Design Requirements 2.2 The Sizes, Dimensions, and Visual Mechanical Requirements 2.2.1 Basics of Chip Sizes 2.2.2 Visual and Mechanical Requirements 2.2.3 Chip Strength Requirements 2.3 Chip Termination Metallizations 3.0 Chip Mounting Pad D
10、imensions 14 3.1 Reflow Mounting Pad Dimensions 3.1.1 Recommended Reflow Mounting Pad Dimensions - Standard Circuit Density 3.1.2 Recommended Minimum Pad Dimensions for High Density Mounting 3.2 Flow or Wave Soldering Pad or Land Dimensions 3.2.1 Recommended Wave (Flow) Soldering Land Dimensions 4.0
11、 Other Mounting their selection, specification and circuit assembly processing. 1.2 GENERAL CLASSIFICATION OF CIRCUITS AND COMPONENTS Four general classifications of circuits and components are generally recognized. These Classifications are not only determined by the implications of the users requi
12、rements, but also by the characterization of both the components and circuits design, construction and implementation. The definitions and remarks which follow for these four classifications are over- simplified. Numerous applications fit between or include aspects of two or more classifications. EI
13、A CELL ab m 3234boo OOOOLOZ B m -2- 1.2.1 CONSUMER ELECTRONICS Consumer electronics in general includes all electronics sold directly to the individual consumer. Circuit function and reliability may be affected by cost consid- erations, practicality and in some instances, miniatur- ization requireme
14、nts. The goal of designers is to provide circuits both of high quality and value and at the same time affordable. This equipment or devices may be characterized by the users tolerance to failure. For the more expensive products repair is tolerated although reliability is highly valued. Nevertheless,
15、 compromises are made in regard to perform- ance, quality and operational reliability in regard to component specifications, circuit designs and process- assembly techniques. This equipment sector may be characterized by the averriding requirement to be cost efficient due to a high level of competit
16、iveness. 1.2.2 INDUSTRIAL ELECTRONICS Industrial electronics includes a large variety of equipment which is typically not supplied directly to individual consumers. In this category falls most of the equipment in the computer- information processing sector, the communications sector, instruments and
17、 controls, and various industrial or process equipment. The components and circuits in general require a higher level of performance, reliability and overall quality than consumer electronics, but for only a small marginal cost increase. The circuit design, component selection and assembly process r
18、eflect greater care and effort to minimize the risk of failure. Industrial electronc equipment is expected to have greater operational stability and reliability even with typically more complex and larger circuits in a unit of equipment. Failure costs often are very significant and are not well tole
19、rated. 1.2.3 MILITARY AND AEROSPACE Military specifications exist for the purpose of stand- ardization of componnt and equipment needs, while at the same time controlling vendors and their product quality, operational characteristics and reliability. Component specifications generally are of the est
20、ab- lished component failure rate type requiring vendors to maintain testing programs which demonstrate achieved failure rate levels. These specifications may also require additional manufacture lot testing as well as additional 100% screening programs. These components carry a significantly higher
21、cost than consumer or industrial sector components. - ,. EIA CBLL 86 W 3234600 0000L03 T -3- 1.2.4 HIGH RELIABILITY ELECTRONICS These components and equipments are found in preceding sectors but are difEerent in that the utmost in reliability is the overriding requirement. This is due to the very hi
22、gh cost of failure such their use in non- redundant life support systems. The components specified are similar to those in the industrial or military sectors in- regard to ratings and performance or stability requirements. The major differences are in the basic design, tighter controls on processes
23、and added specification requirements in regard to part and 10% inspections as well as added documen- tation. The components often reflect conservative design for their ratings. Value ranges are often less per sise than BR the other sectors. These High Reliability components and circuits have signifi
24、cantly higher costs than all other types. . EIA CBLL 8b m 3234600 OOOOL04 L m -4- 2.0 CERAMIC CHIP CAPACITOR CONSTRUCTION AND DESIGN Multilayer ceramic chip capacitors are constructed from many different ceramic dielectric compositions. These compositions are different even for the same dielectric p
25、erformance characteristic. Internal electrodes and external terminations similarly are of various metals and alloys. They are constructed with at least two dozen major assembly steps. Various manufacturers may employ significantly different construction processes. The most common ceramic dielectrics
26、 are barium titan- ates. Less common are dielectrics based on other titanates such as strontium or magnesium titanates. Niobates are also used. High frequency capacitors are also made in low dielectric constant formulations from porcelains or vitreous enamels. These types are specialty types for app
27、lications requiring the highest Q from VHF to microwave frequencies. A basic differentiation in the construction process of the chips is based on the manner in which the green, unfired chip is built up. There are two basic methods, the “wet process“ and the “dry process“. The wet process consists of
28、 building up the capacitors in multible layers one layer at a time. The ceramic layers are built up by the application of ceramic pastes or inks. Layers containing the electrode sites are similarly built up by the use of metal bearing inks. Electrode patterns are screened over the dried ceramic laye
29、rs previously laid down. The dielectric is screened or applied over the electrodes and dried. The process is repeated until the desired number of layers is built up. The resulting plate is dried and diced into the individual green capacitor chips. The dry process builds the capacitor from sheets or
30、films of dried ceramic. These sheets are printed with the electrode inks, stacked and laminated into a plate of the appropriate number of required layers. This method requires the tape casting of the dielectric as an initial step. As in the wet process the resulting multi-element plate is diced into
31、 individual capacitors before high temperature firing. 2.1 INTERNAL DESIGN The finished chip consists of multiple layers of inter- nal metal electrodes separated and encased by the ceramic dielectric. Alternate layers of the electrodes are connected to only one of the chips end surfaces where they c
32、ontact the exterior metallization, the end termination. The electrodes are only brought to the surface at the appropriate end, any exposure at the sides is considered to be a defect. The internal electrode region is surrounded top and bottom, and side to side as well as from the opposite termination
33、 by the EIA CBLL Bb 3234600 OOOOLO5 3 -5- ceramic dielectric, protecting the capacitance forming region of the chip from the external environment. in the popular size chips as much as 50% of the total chip volume is in the noncapacitance forming regions. For signif-icant capacitance range extension,
34、 the clearance dimensions between the electrodes and the exterior is reduced to the smallest acceptable dimension. Note that commonly electrodes connected to one end termination extend the length of the chip underneath the opposite terminations metallization. Also to maintain or extend the capacitan
35、ce value range, khe dielectric layers between electrodes are thinned. A 50% reduction in the dielectric thickness, which also permits a larger number of electrode layers within a given chip thickness, results in approximately a 4X increase in capacitance range. The dielectric composi- tion and quali
36、ty as well as its thickness are major factors in determining the electrical ratings, perform- ance and operational reliability. High reliability chips generally have significantly reduced capacitance value ranges when compared to similarly sized commercial chip specifications. 2.1.1 INTERNAL ELECTRO
37、DES Precious metals (gold, platinum and palladium) and their alloys were commonly employed as the internal electrode metallizations. These noble metals were required to survive the high temperature of sintering without oxidizing and affecting the chemistry of the crystalline dielectric. In more rece
38、nt years ceramic compositions with adequate sintering at lower temperatures (-lOOOC) have been developed which has allowed high percentages of the much less expensive metal silver to be used in the electrodes. Silver content in these capacitor electrodes varies typically from a low of 20% to a high
39、.of 80% or more depending on manufacturer and dielectric formulation. Some manufacturers also use nickel elec- trodes with low temperature fired dielectrics. Other non- precious metal systems may also be employed. The internal electrode systems discussed above are all examples of csfired chips, that
40、 is chips where metal- lizations for electrodes and ceramics as dielectrics are simultaneously fired into a monolithic structure. A processing variation is non-cofired chips in this process the ceramic is first fired by itself and elec- trodes are injected or impregnated into electrode sites at a la
41、ter time during a much lower temperature process step. These are also non-precious metal electrode type chips. The metal alloys used are typically high lead compositions with melting temperatures at approximately 3OOOC (570OF) or higher. O -. EIA CBLL 86 323L)bOO 000010b 5 -6- 2.1.2 INTERNAL DESIGN
42、REQUIREMENTS The.interna1 clearance margins, dielectric thickness, uniformity of dielectric and electrode thickness as well as physical defects such as voids, . delaminations, cracks, foreign inclusions, discontinuous electrodes, splits, etc. can best be determined by destructive physical analysis.
43、EIA standards EIA-469 , Standard Test Method for Destructive Physical . Analysis of High Reliabilit Ceramic Monolithic Capacitors and EIA-510, -hcTy Stan ar Test Method for Destructive Physcial Analysis of Industrial Grade Ceramic Monolithic Capacitors provide a means of characterizing internal stru
44、ctural features and defects through destructive physical analysis (DPA). This is useful to the user in specifying or testing purchased capacitors to the quality or reliability intent of the circuit design. 2.2 THE SIZES, DIMENSIONS, AND VISUAL MECHANICAL REQUIREMENTS 2.2.1 BASICS OF CHIP SIZES Chips
45、 are commonly referred to by a four figure number which relates to the chips length and width. The first two digits designate.the nominal length in hundredths of an inch, the second two the nominal width as shown below. Example : 0805 Chip Size TT The other basic dimension, the chips thickness, is t
46、ypically only specified as a maximum dimension. usually for smaller chips the maximum thickness is the same as the chip width dimension. For example, the maximum thickness specified for the 0805 chip is commonly .050“. Larger chips are typically limited to a maximum thickness of 0.08081. The thicker
47、 the chip is allowed to be, the greater the capacitance range avail- able in any given voltage rating and dielectric characteristic. There are at least a dozen different common sizes sourced by U.S. chip manufacturers, This large number results from the special requirements of the hybrid industry ov
48、er the past several years and reflects sizes commonly available as a function of their use in the construction of leaded, encapsulated ceramic capacitors. The EIA has led the size standardization effort in the U.S. These sizes are detailed in the table which follows. The three smaller sizes, the 080
49、5, 1206 and 1210 account for over 80% of the usage. EIA CBLL 8b 3234b00 0000l107 7 -7- These sizes are found in EIA specification RS 198 along with ratings and value r.anges in the COG, X7R and z5u dielectric characteristics. Note that these may be assumed to apply to chips which have their actual thick- ness close to the specified maximum. In other words, chips which are half the size, half the specified maximum thickness, but retain full ratings and value range may not meet the design intent of the specifica- tion in regard to performance and reliability. 2.2.1.1 TERMINATION
