1、BRITISH STANDARD BS EN 61188-5-2:2003 Printed boards and printed board assemblies Design and use Part 5-2: Attachment (land/joint) considerations Discrete components The European Standard EN 61188-5-2:2003 has the status of a British Standard ICS 31.180; 31.190 BS EN 61188-5-2:2003 This British Stan
2、dard was published under the authority of the Standards Policy and Strategy Committee on 16 October 2003 BSI 16 October 2003 ISBN 0 580 42760 9 National foreword This British Standard is the official English language version of EN 61188-5-2:2003. It is identical with IEC 61188-5-2:2003. The UK parti
3、cipation in its preparation was entrusted to Technical Committee EPL/501, Electronic assembly technology, which has the responsibility to: A list of organizations represented on this committee can be obtained on request to its secretary. Cross-references The British Standards which implement interna
4、tional or European publications referred to in this document may be found in the BSI Catalogue under the section entitled “International Standards Correspondence Index”, or by using the “Search” facility of the BSI Electronic Catalogue or of British Standards Online. This publication does not purpor
5、t to include all the necessary provisions of a contract. Users are responsible for its correct application. Compliance with a British Standard does not of itself confer immunity from legal obligations. aid enquirers to understand the text; present to the responsible international/European committee
6、any enquiries on the interpretation, or proposals for change, and keep the UK interests informed; monitor related international and European developments and promulgate them in the UK. Summary of pages This document comprises a front cover, an inside front cover, the EN title page, pages 2 to 53 and
7、 a back cover. The BSI copyright notice displayed in this document indicates when the document was last issued. Amendments issued since publication Amd. No. Date CommentsEUROPEAN STANDARD EN 61188-5-2 NORME EUROPENNE EUROPISCHE NORM September 2003 CENELEC European Committee for Electrotechnical Stan
8、dardization Comit Europen de Normalisation Electrotechnique Europisches Komitee fr Elektrotechnische Normung Central Secretariat: rue de Stassart 35, B - 1050 Brussels 2003 CENELEC - All rights of exploitation in any form and by any means reserved worldwide for CENELEC members. Ref. No. EN 61188-5-2
9、:2003 E ICS 31.180; 31.190 English version Printed boards and printed board assemblies - Design and use Part 5-2: Attachment (land/joint) considerations - Discrete components (IEC 61188-5-2:2003) Cartes imprimes et cartes imprimes quipes - Conception et utilisation Partie 5-2: Considrations sur les
10、liaisons pistes-soudures - Composants discrets (CEI 61188-5-2:2003) Leiterplatten und Flachbaugruppen - Konstruktion und Anwendung Teil 5-2: Betrachtungen zur Montage (Anschlussflche/Verbindung) - Einzelbauelemente (IEC 61188-5-2:2003) This European Standard was approved by CENELEC on 2003-09-01. CE
11、NELEC members are bound to comply with the CEN/CENELEC Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration. Up-to-date lists and bibliographical references concerning such national standards may be obtained on
12、 application to the Central Secretariat or to any CENELEC member. This European Standard exists in three official versions (English, French, German). A version in any other language made by translation under the responsibility of a CENELEC member into its own language and notified to the Central Sec
13、retariat has the same status as the official versions. CENELEC members are the national electrotechnical committees of Austria, Belgium, Czech Republic, Denmark, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Lithuania, Luxembourg, Malta, Netherlands, Norway, Portugal, Slovakia,
14、 Spain, Sweden, Switzerland and United Kingdom. EN 68118-5-2:0230 - - 2 Foreword The text of document 91/382/FDIS, future edition 1 of IEC 61188-5-2, prepared by IEC TC 91, Electronics assembly technology, was submitted to the IEC-CENELEC parallel vote and was approved by CENELEC as EN 61188-5-2 on
15、2003-09-01. This European Standard is to be read in conjunction with EN 61188-5-1:2002. The following dates were fixed: latest date by which the EN has to be implemented at national level by publication of an identical national standard or by endorsement (dop) 2004-06-01 latest date by which the nat
16、ional standards conflicting with the EN have to be withdrawn (dow) 2006-09-01 Annexes designated “normative“ are part of the body of the standard. In this standard, annex ZA is normative. Annex ZA has been added by CENELEC. _ Endorsement notice The text of the International Standard IEC 61188-5-2:20
17、03 was approved by CENELEC as a European Standard without any modification. In the official version, for Bibliography, the following notes have to be added for the standards indicated: IEC 60051 NOTE Harmonized as EN 60051 series (not modified). IEC 61191-1 NOTE Harmonized as EN 61191-1:1998 (not mo
18、dified). IEC 61191-2 NOTE Harmonized as EN 61191-2:1998 (not modified). _ Page2 EN6118852:2003 CONTENTS 1 Scope.7 2 Normative references .7 3 Packaging 8 4 Fixed rectangular chip resistors8 4.1 Introductory remark .8 4.2 Component description8 4.3 Component dimensions .9 4.4 Solder joint fillet desi
19、gn .10 4.5 Land pattern dimensions .12 5 Fixed cylindrical chip resistors14 5.1 Introductory remark .14 5.2 Component description14 5.3 Component dimensions .15 5.4 Solder joint fillet design .15 5.5 Land pattern dimensions .17 6 Fixed multilayer ceramic chip capacitors 19 6.1 Introductory remark .1
20、9 6.2 Component description19 6.3 Component dimensions .21 6.4 Solder joint fillet design .21 6.5 Land pattern dimensions .23 7 Fixed tantalum chip capacitors .25 7.1 Introductory remark .25 7.2 Component description25 7.3 Component dimensions .26 7.4 Solder joint fillet design .26 7.5 Land pattern
21、dimensions .28 8 Fixed aluminium electrolytic chip capacitors with non-solid electrolyte (vertical type).30 8.1 Introductory remark .30 8.2 Component description30 8.3 Component dimensions .31 8.4 Solder joint fillet design .32 8.5 Land pattern dimensions .33 9 Fixed aluminium electrolytic chip capa
22、citors with non-solid electrolyte (horizontal type).35 9.1 Introductory remark .35 9.2 Component description35 9.3 Component dimensions .36 9.4 Solder joint fillet design .37 9.5 Land pattern dimensions .38 Page3 EN6118852:2003 10 Fixed film chip capacitors .40 10.1 Introductory remark .40 10.2 Comp
23、onent description40 10.3 Component dimensions .41 10.4 Solder joint fillet design .42 10.5 Land pattern dimensions .43 11 Fixed chip inductors (multilayer type) .45 11.1 Introductory remark .45 11.2 Component description45 11.3 Component dimensions .46 11.4 Solder joint fillet design .46 11.5 Land p
24、attern dimensions .48 12 Fixed chip inductors (wire wound type).50 13 SC-59/TO-236 Transistors.50 14 SC-62/TO-243 Transistors.50 15 SC-61/TO-253 Transistors.50 16 SC-73 Diodes 50 17 SC-63/TO-252 Transistors.50 18 SC-77 Transistors50 Figure 1 Packaging8 Figure 2 Fixed rectangular chip resistor constr
25、uction .9 Figure 3 Fixed rectangular chip resistor dimensions.10 Figure 4 Solder joint protrusion12 Figure 5 Fixed rectangular chip resistor land pattern dimensions .13 Figure 6 Fixed cylindrical chip resistor construction .14 Figure 7 Fixed cylindrical chip resistor dimensions.15 Figure 8 Solder jo
26、int protrusion17 Figure 9 Fixed cylindrical chip resistor land pattern dimensions .18 Figure 10 Fixed multilayer ceramic chip capacitor construction 19 Figure 11 Fixed multilayer ceramic chip capacitor component dimensions .21 Figure 12 Solder joint protrusion 23 Figure 13 Fixed multilayer ceramic c
27、hip capacitor land pattern dimensions24 Figure 14 Fixed tantalum chip capacitor construction.25 Figure 15 Fixed tantalum chip capacitor component dimensions 26 Figure 16 Solder joint protrusion 28 Figure 17 Fixed tantalum chip capacitor land pattern dimensions.29 Page4 EN6118852:2003 Figure 18 Fixed
28、 aluminium electrolytic chip capacitor with non-solid electrolyte (vertical type) construction30 Figure 19 Fixed aluminium electrolytic chip capacitor (vertical type) dimensions31 Figure 20 Solder joint protrusion 33 Figure 21 Fixed aluminium electrolytic chip capacitor (vertical type) land pattern
29、dimensions .35 Figure 22 Fixed aluminium electrolytic chip capacitor with non-solid electrolyte (horizontal type) construction35 Figure 23 Fixed aluminium electrolytic chip capacitor (horizontal type) dimensions36 Figure 24 Solder joint protrusion 38 Figure 25 Fixed aluminium electrolytic chip capac
30、itor (horizontal type) land pattern dimensions39 Figure 26a Stacked type 38 Figure 26b Wound type40 Figure 27a Stacked type 41 Figure 27b Wound type39 Figure 28 Solder joint protrusion 43 Figure 29 MPPS film chip capacitor land pattern dimensions .44 Figure 30 Fixed chip inductor construction.45 Fig
31、ure 31 Fixed chip inductor (multilayer type) component dimensions 46 Figure 32 Solder joint protrusion 48 Figure 33 Fixed chip inductor land pattern dimensions.49 Annex ZA (normative) Normative references to international publications with their corresponding European publications .51 Page5 EN611885
32、2:2003 INTRODUCTION This part of IEC 61188 covers land patterns for discrete components such as chip resistors, chip capacitors, and various diode and transistor types. The proposed land pattern dimensions are based upon the fundamental tolerance calculation combined with the given land protrusions
33、and courtyard excesses (see IEC 61188-5-1, Generic requirements). The courtyard includes all issues relating to normal manufacturing requirements. The land pattern dimensions given in this standard are generally applicable for reflowed solder paste processes. For immersion soldering processes (e.g.
34、wave, jet, drag soldering), lands may have to be modified to prevent shadowing and shorting (e.g. by extending land length parallel to the direction of motion of the board and/or provision of solder thieves). This standard offers a threefold land pattern dimensioning (levels 1, 2 and 3) on the basis
35、 of a threefold set of land protrusions and courtyard excesses: maximum (max.), median (mdn) and minimum (min.). Each land pattern has been assigned an identification number to indicate the characteristics of the specific robustness of the land patterns. Users also have the opportunity to organize t
36、he information so that it is most useful for their particular design. This standard assumes that land dimensions are always larger than component termination or lead outlines. If a user has good reason to use solder resist to limit wetting on a land, or to use lands smaller than component terminatio
37、ns, or to apply a concept different from that of IEC 61188-5-1, then this standard may not apply. It is the responsibility of the user to verify the SMD land patterns used for achieving an undisturbed mounting process, including testing, and an ensured reliability for the product stress conditions i
38、n use. Dimensions of the components listed in this standard are those available on the market and are for reference only. Page6 EN6118852:2003 PRINTED BOARDS AND PRINTED BOARD ASSEMBLIES DESIGN AND USE Part 5-2: Attachment (land/joint) considerations Discrete components 1 Scope This part of IEC 6118
39、8 provides information on land pattern geometries used for the surface attachment of discrete electronic components. The purpose of this standard is to provide the appropriate size, shape and tolerances of surface mount land patterns to ensure sufficient area for the appropriate solder fillet, and a
40、lso allow for inspection, testing and rework of resulting solder joints. Each clause contains a specific set of clearly presented criteria providing information on the component, the component dimensions, the solder joint design and the land pattern dimensions. 2 Normative references The following r
41、eferenced documents are indispensable for the application of this document. For dated references, only the edition cited applies. For undated references, the latest edition of the referenced document (including any amendments) applies. IEC 60068-2-58, Environmental testing Part 2-58: Tests Test Td:
42、Test methods for solderability, resistance to dissolution of metallization and to soldering heat of surface mounting devices (SMD) IEC 60115-1, Fixed resistors for use in electronic equipment Part 1: General specification IEC 60286-3, Packaging of components for automatic handling Part 3: Packaging
43、of leadless components on continuous tapes IEC 60286-4, Packaging of components for automatic handling Part 4: Stick magazines for electric components encapsulated in packages of form E and G IEC 60286-5, Packaging of components for automatic handling Part 5: Matrix trays IEC 60286-6, Packaging of c
44、omponents for automatic handling Part 6: Bulk case packaging for surface mounting compounds IEC 60384-3, Fixed capacitors for use in electronic equipment Part 3: Sectional specification: Fixed Tantalum chip capacitors IEC 60384-18, Fixed capacitors for use in electronic equipment Part 18: Sectional
45、specification Fixed aluminium electrolytic chip capacitors with solid and non-solid electrolyte Page7 EN6118852:2003 IEC 60384-20, Fixed capacitors for use in electronic equipment Part 20: Sectional specification Fixed metallized polyphenylene sulfide film dielectric chip d.c. capacitors IEC 61188-5
46、-1, Printed boards and printed board assemblies Design and use Part 5-1: Attachment (land/joint) considerations Generic requirements IEC 61605, Fixed inductors for use in electronic and telecommunication equipment Marking codes 3 Packaging The following IEC standards shall be referred to: IEC 60286-
47、3 (see figure 1); IEC 60286-4; IEC 60286-5; IEC 60286-6. Top cover tape Sprocket hole Embossed carrier tape Component cavity Sprocket hole Embossed carrier tape Component cavity IEC 1662/03Figure 1 Packaging 4 Fixed rectangular chip resistors 4.1 Introductory remark This clause specifies the dimensi
48、ons of components and land patterns for fixed rectangular chip resistors, together with an analysis of tolerance and solder joint assumptions for the land pattern dimensions. 4.2 Component description A variety of values exist for the dimensions of resistors. The following subclauses describe the mo
49、st common types. Page8 EN6118852:2003 4.2.1 Basic construction Figure 2 shows a typical construction example. The resistive material is coated to a ceramic substrate and terminated symmetrically at both ends with a “wrap around“ metal U-shaped band. The resistive material is face-up. Since most equipment uses a vacuum-ty
