1、 JEDEC STANDARD Solderability JESD22-B102E (Revision of JESD22-B102D, September 2004) OCTOBER 2007 JEDEC SOLID STATE TECHNOLOGY ASSOCIATION NOTICE JEDEC standards and publications contain material that has been prepared, reviewed, and approved through the JEDEC Board of Directors level and subsequen
2、tly reviewed and approved by the JEDEC legal counsel. JEDEC standards and publications are designed to serve the public interest through eliminating misunderstandings between manufacturers and purchasers, facilitating interchangeability and improvement of products, and assisting the purchaser in sel
3、ecting and obtaining with minimum delay the proper product for use by those other than JEDEC members, whether the standard is to be used either domestically or internationally. JEDEC standards and publications are adopted without regard to whether or not their adoption may involve patents or article
4、s, materials, or processes. By such action JEDEC does not assume any liability to any patent owner, nor does it assume any obligation whatever to parties adopting the JEDEC standards or publications. The information included in JEDEC standards and publications represents a sound approach to product
5、specification and application, principally from the solid state device manufacturer viewpoint. Within the JEDEC organization there are procedures whereby a JEDEC standard or publication may be further processed and ultimately become an ANSI standard. No claims to be in conformance with this standard
6、 may be made unless all requirements stated in the standard are met. Inquiries, comments, and suggestions relative to the content of this JEDEC standard or publication should be addressed to JEDEC at the address below, or call (703) 907-7559 or www.jedec.org Published by JEDEC Solid State Technology
7、 Association 2007 2500 Wilson Boulevard Arlington, VA 22201-3834 This document may be downloaded free of charge; however JEDEC retains the copyright on this material. By downloading this file the individual agrees not to charge for or resell the resulting material. PRICE: Please refer to the current
8、 Catalog of JEDEC Engineering Standards and Publications online at http:/www.jedec.org/Catalog/catalog.cfm Printed in the U.S.A. All rights reserved PLEASE! DONT VIOLATE THE LAW! This document is copyrighted by JEDEC and may not be reproduced without permission. Organizations may obtain permission t
9、o reproduce a limited number of copies through entering into a license agreement. For information, contact: JEDEC Solid State Technology Association 2500 Wilson Boulevard Arlington, Virginia 22201-3834 or call (703) 907-7559 JEDEC Standard No. 22-B102E -i- TEST METHOD B102E SOLDERABILITY Contents Pa
10、ge1 Scope 12 General Summary 2.1 Preconditioning 12.2 Solderability Testing 23 Apparatus 23.1 Precondition Equipment 23.2 Solder Pot 23.3 Dipping Device 33.4 Optical Equipment 33.5 Lighting Equipment 33.6 Surface Mount Process Simulation Test Equipment 33.7 Materials 44 Solderability Test Conditions
11、 55 Test Procedures 75.1 Preconditioning 75.2 Method 1. Dip and Look Test 95.3 Method 2. Surface Mount Process Simulation Test 126 Summary 16Annex A 17Tables Table 1 Precondition Conditions for Solderability Testing 1Table 2 Maximum Limits of Solder Bath Contaminant 4Table 3a Solderability Test Cond
12、itions for Method 1, Dip and Look Test 5Table 3b Solderability Test Conditions for Method 2, SMD Process Simulation Test 6Table 4 Altitude versus Steam Temperature 7Figures Figure 1 Inspection Area for Dual Inline Packages 13Figure 2 Inspection Area for Gull Wing Packages 14Figure 3 Inspection Area
13、for J-Lead Packages 14Figure 4 Inspection Area for Tantalum Chip Capacitors 15Figure 5 Inspection Area for Rectangular Passive Components 15JEDEC Standard No. 22-B102E -ii- JEDEC Standard No. 22-B102E Page 1 Test Method B102E (Revision of Test Method B102D) TEST METHOD B102E SOLDERABILITY (From JEDE
14、C Board Ballot JCB-04-77 and JCB-07-79, formulated under the cognizance of the JC-14.1 Subcommittee on Reliability Test Methods for Packaged Devices.) 1 Scope This test method provides optional conditions for preconditioning and soldering for the purpose of assessing the solderability of device pack
15、age terminations. It provides procedures for dip Figure 3, J-Lead Packages; Figure 4, Tantalum Chip Capacitors; and Figure 5, Rectangular Passive Components. SeatingPlane Critical AreaFigure 1 Inspection area for dual inline packages JEDEC Standard No. 22-B102E Page 14 Test Method B102E (Revision of
16、 Test Method B102-D) 5.3 Method 2 - surface mount process simulation test (contd) 5.3.3.2 Accept/reject criteria (contd) Figure 2 Inspection area for gull wing packages 2X 2XT 2X2XT Figure 3 Inspection area for J-Lead packages JEDEC Standard No. 22-B102E Page 15 Test Method B102E (Revision of Test M
17、ethod B102D) 5.3 Method 2 - surface mount process simulation test (contd) 5.3.3.2 Accept/reject criteria (contd) Figure 4 Inspection area for tantalum chip capacitors Figure 5 Inspection area for rectangular passive components JEDEC Standard No. 22-B102E Page 16 Test Method B102E (Revision of Test M
18、ethod B102-D) 6 Summary The following details shall be specified in the applicable procurement document: a) The number of terminations of each part to be tested and the quality level. b) Special preparation of terminations, if applicable. c) Preconditioning type and exposure time used. d) Depth of i
19、mmersion if other than specified in 5.2.3. e) Solderability test conditions if other than specified in Tables 3a and 3b. f) Electrical measurements (parameters, conditions, subgroups, etc.) where required after test. JEDEC Standard No. 22-B102E Page 17 Test Method B102E (Revision of Test Method B102
20、D) Annex A (informative) Differences between JESD22-B102E and JESD22-B102-D This table briefly describes most of the changes made to entries that appear in this standard, JESD22-B102E, compared to its predecessor, JESD22-B102-D (August 2004). If the change to a concept involves any words added or de
21、leted (excluding deletion of accidentally repeated words), it is included. Some punctuation changes are not included. Page Description of change Added Pb-free backward compatibility test and test conditions, section 2.2 and Tables 3a and 3b. JEDEC Standard No. 22-B102E Page 18 Test Method B102E (Rev
22、ision of Test Method B102-D) Standard Improvement Form JEDEC JESD22B102E The purpose of this form is to provide the Technical Committees of JEDEC with input from the industry regarding usage of the subject standard. Individuals or companies are invited to submit comments to JEDEC. All comments will
23、be collected and dispersed to the appropriate committee(s). If you can provide input, please complete this form and return to: JEDEC Attn: Publications Department 2500 Wilson Blvd. Suite 220 Arlington, VA 22201-3834 Fax: 703.907.7583 1. I recommend changes to the following: Requirement, clause number Test method number Clause number The referenced clause number has proven to be: Unclear Too Rigid In Error Other 2. Recommendations for correction: 3. Other suggestions for document improvement: Submitted by Name: Phone: Company: E-mail: Address: City/State/Zip: Date: