1、JEDEC STANDARD Procurement Standard for Semiconductor Die Products Including Known Good Die (KGD) JESD49A.01 (Minor Revision of JESD49, SEPTEMBER 2005, Reaffirmed January 2009) OCTOBER 2013 JEDEC SOLID STATE TECHNOLOGY ASSOCIATION NOTICE JEDEC standards and publications contain material that has bee
2、n prepared, reviewed, and approved through the JEDEC Board of Directors level and subsequently reviewed and approved by the JEDEC legal counsel. JEDEC standards and publications are designed to serve the public interest through eliminating misunderstandings between manufacturers and purchasers, faci
3、litating interchangeability and improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for use by those other than JEDEC members, whether the standard is to be used either domestically or internationally. JEDEC standards and publications
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5、mation included in JEDEC standards and publications represents a sound approach to product specification and application, principally from the solid state device manufacturer viewpoint. Within the JEDEC organization there are procedures whereby a JEDEC standard or publication may be further processe
6、d and ultimately become an ANSI standard. No claims to be in conformance with this standard may be made unless all requirements stated in the standard are met. Inquiries, comments, and suggestions relative to the content of this JEDEC standard or publication should be addressed to JEDEC at the addre
7、ss below, or refer to www.jedec.org under Standards and Documents for alternative contact information. Published by JEDEC Solid State Technology Association 2013 3103 North 10th Street Suite 240 South Arlington, VA 22201-2107 This document may be downloaded free of charge; however JEDEC retains the
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9、on. For information, contact: JEDEC Solid State Technology Association 3103 North 10th Street Suite 240 South Arlington, VA 22201-2107 or refer to www.jedec.org under Standards-Documents/Copyright Information. JEDEC Standard No. 49A.01 -i- PROCUREMENT STANDARD FOR SEMICONDUCTOR DIE PRODUCTS INCLUDIN
10、G KNOWN GOOD DIE (KGD) CONTENTS PageForeword ii1 Scope 12 Reference Documents 13 Requirements 34 Suggested Additional Information 9Annex A Standard Die Products Requirements 11Annex B Differences between JESD49A.01 and JESD49A 11JEDEC Standard No. 49A.01 -ii- PROCUREMENT STANDARD FOR SEMICONDUCTOR D
11、IE PRODUCTS INCLUDING KNOWN GOOD DIE (KGD) Foreword This standard was created to facilitate the procurement and use of semiconductor die products provided in bare or bumped die form. This document provides requirements and guidance to die suppliers in regard to the levels of as-delivered performance
12、, quality and reliability expected of this product type. It also reflects the special needs of die product customers in terms of design and application data. This document is applicable to die products used in both commercial and military applications. This standard also reflects an understanding on
13、 the part of the die product user that quality and reliability cannot always be assured in the same fashion as for conventionally packaged microcircuits. Die product customers take on a significant responsibility for the proper application and long-term environmental protection of this type of produ
14、ct. The extent to which a supplier shall assure die products is highly dependent upon the customers capability and adherence to strict quality controls. Cooperation between suppliers and users is essential. JEDEC Standard No. 49A.01 Page 1 PROCUREMENT STANDARD FOR SEMICONDUCTOR DIE PRODUCTS INCLUDIN
15、G KNOWN GOOD DIE (KGD) (From JEDEC Board Ballot JCB-05-100, formulated under the cognizance of the JC-13 Committee on Government Liaison.) 1 Scope This standard provides guidelines and requirements for die products used in other than conventionally packaged microcircuit or discrete formats. The die
16、described herein are intended to be high quality, reliable bare die, for use in a variety of user-defined applications (e.g., multi-chip modules (MCM), System in a Package (SiP), memory cards, etc.) While this standard allows negotiation between supplier and user to establish specific requirements f
17、or performance, quality and reliability, it is important to recognize, in the case of military and aerospace applications, the minimum requirements described in relevant military specifications. This standard is limited to die products consisting of a single microcircuit or discrete device connected
18、 using conventional wire bonding or High Density Interconnect. KGD products are intended to be equivalent to or better than comparable packaged parts in terms of electrical and reliability performance (unless specifically noted by the supplier). Per requirements mutually agreed upon by the KGD suppl
19、ier and user, the KGD supplier shall implement and demonstrate testing and screening required to assure this performance. This standard deals only with die products supplied in individual die form, for which the user accepts responsibility for providing and assuring final environmental protection (e
20、.g., hermetic sealing, plastic encapsulation). 2 Reference documents 2.1 Military and Federal Standards1 MIL-STD-883, Microelectronics, Test Methods, and Procedures MIL-PRF-19500, General Specification for Semiconductor Devices MIL-PRF-38534, General Specification for Hybrid Microcircuits MIL-PRF-38
21、535, General Specification for Integrated Circuits Manufacturing 1Available from Naval Publications and Forms Center, 5801 Tabor Ave, Philadelphia, PA 19120. JEDEC Standard No. 49A.01 Page 2 2 Reference documents (contd) 2.2 Institute of Electrical and Electronics Engineers Standards2 IEEE 1029.1, W
22、aveform and Vector Exchange Specification IEEE 1076, VHSIC Hardware Description Language IEEE/ANSI 1149.1, Standard Test Access Port and Boundary-Scan Architecture 2.3 JEDEC Standards3 JESD16, Assessment of Microcircuit Outgoing Nonconforming Levels in Parts Per Million (PPM) JESD46, Guidelines for
23、User Notification of Process Changes by Semiconductor Suppliers ANSI/EIA557-A, Statistical Process Control Systems ANSI/EIA599, National Electronic Process Certification Standard JESD625, Requirements for Handling Electrostatic Discharge (ESDS) Sensitive Devices 2.4 International Standards4 ISO 9000
24、, Quality Management Standard ISO 14644, Clean Rooms and Associated Controlled Environments 2.5 Other Reference Documents Relevant Die Supplier Data Book/Sheet or Specification 2.6 Order of Precedence In the case of conflict between/among applicable specifications: a) Purchase order or other contrac
25、tual documents b) Detailed specifications c) Other mutually agreed documents d) This standard 2Available from Institute of Electrical and Electronics Engineers, 445 Hoes Lane, PO Box 1331, Piscataway, NJ 08855-1331 3Available from JEDEC, 2500 Wilson Blvd., Arlington, VA 22201-3834 4Available from IE
26、C, 3 rue de Varembe, CH-1211 Geneva 20, Switzerland JEDEC Standard No. 49A.01 Page 3 3 Requirements 3.1 Overview In addition to the information provided elsewhere for the equivalent standard packaged device, KGD suppliers shall provide data as required in sections 3.2 to 3.9. Standard die product re
27、quirements are listed in Annex A. For military and aerospace applications, additional requirements are defined in the appropriate military specifications. 3.2 General Data The following general data shall be provided for KGD products and standard die products if required in Annex A. 3.2.1 Part Numbe
28、ring Each die supplier shall establish a specific part numbering system that differentiates its die products from each other and from conventionally packaged equivalents. 3.2.2 Product Status The supplier shall make available, information regarding the availability and status of the die product (e.g
29、. impending die shrink, end of life). 3.2.3 Sample Die Die users may require four types of sample die. Availability of these sample types and the quantities to be provided shall be negotiated as part of appropriate contractual agreements. These types include: a) Conventionally packaged equivalents f
30、or system prototype. b) Mechanical samples of identical physical layout orientation and pad metallurgy to the final die product and clearly identified as “reject“. c) Prototype (proof of design) samples that are electrically functional and from product representative of the die product to be sold to
31、 a particular customer. d) Acceptance samples that are representative of the updated version of a die type that is about to be released with design or manufacturing changes. These samples are intended to afford existing customers of this die product an opportunity to evaluate the impact of these cha
32、nges upon their specific application. JEDEC Standard No. 49A.01 Page 4 3 Requirements (contd) 3.3 Mechanical Data Mechanical data specifically required for the application of die products shall be provided. The data shall be provided in a format established by each supplier. Custom data and formats
33、may be available as negotiated in contractual agreements. The data to be provided are as follows. 3.3.1 Bond pad map Bond pad map (including available bonding area / glassivation opening size), pin-out list, including electrical function and pin number one identification with appropriate test design
34、ator. 3.3.2 Identification of connections Identification of any connections that must be jumpered or skipped (e.g., test pads) including any substrate connection requirements. It shall be made clear whether a substrate connection is required, optional or not recommended. 3.3.3 Coordinates of a refer
35、ence position The coordinates of a reference position on the die with respect to the geometric center or corner of the die surface shall be given. This forms the origin of the coordinate system with respect to which the position of die features, such as pad positions, are referenced. 3.3.4 Length an
36、d width The maximum length and width of the die: a) for bare die these are the maximum dimensions after sawing NOTE If these are not available, the scribe street center to scribe street center dimensions shall be given. b) for wafers these are the scribe street center to scribe street center 3.3.5 T
37、hickness The maximum thickness of the finished die. JEDEC Standard No. 49A.01 Page 5 3.3 Mechanical data (contd) 3.3.6 Dimensional tolerance Dimension tolerances for die size, die thickness, pad dimensions and pad positions. 3.3.7 Backside material Type of backside surface material and surface finis
38、h (e.g., polished or lapped) 3.3.8 Topside material Final die glassivation (top protective layer) material. 3.3.9 Bond pad composition Top-level pad metal composition 3.3.10 Backside potential Electrical potential of die bottom surface (e.g., floating, Vcc, ground), maximum bias voltage. 3.3.11 Oper
39、ating temperature range The operating temperature range of the die over which the device will operate in accordance with its published specifications. 3.3.12 Process limitations Known process limitations (e.g., maximum processing temperatures, pressure sensitivity, UV light sensitivity, etc). 3.3.13
40、 Special considerations Other conditions that affect die function, such as critical thermal environments, or additional materials (e.g., die attach materials) or components normally connected to or used within the packaged part (e.g., trimming capacitors). 3.3.14 Power applications In high power app
41、lications, minimum current carrying requirement for the users substrate. JEDEC Standard No. 49A.01 Page 6 3 Requirements (contd) 3.4 Electrical data The die supplier shall provide, if applicable, and as negotiated in contractual agreements, the following electrical test data for each die product typ
42、e. Nondisclosure agreements may be required prior to release of some of these data. a) Designed-in testability features (e.g., redundancy, control fuses, error correction, ad hoc, structured, boundary scan, built-in self test, etc.) with a full description and explanation of each. b) Device Boundary
43、 Scan Description Language (BSDL) model in cases where IEEE 1149.1 boundary-scan is implemented (Ref IEEE/ANSI 1149.1-1990). c) Any other product specific information relevant to electrical testing (e.g. special test strategy or voltage stress to achieve quality goals). d) Exceptions to suppliers pa
44、ckaged device data book. e) VHDL models. 3.5 Quality provisions 3.5.1 Quality assurance provisions Die suppliers shall be prepared to demonstrate, with data or other certification, one or more of the quality assurance provisions described below. Nondisclosure agreements may be required prior to rele
45、ase of some data. MIL-PRF-38535 QML certification or equivalent. Compliance with MIL-STD-883. QMS registered to IS0 9001:2000 Compliance with ANSI/EIA557-A. Supplier specific internal quality control methods. 3.5.2 Quality Performance Provisions The die supplier shall state a quality estimate for th
46、e die product. One or more of the following provisions shall be utilized. Equivalent to package device. Outgoing die product DPM (Defects Per Million) due to all causes. (e.g., electrical reference to data sheet, visual, and mechanical) per ANSI/EIA554. 100% electrically tested to supplier and user
47、agreed upon specifications. Visual/Mechanical inspection to supplier and user agreed upon specification. Supplier specific internal processing flow. JEDEC Standard No. 49A.01 Page 7 3 Requirements (contd) 3.6 Reliability The die supplier shall state a reliability estimate for the die product type. O
48、ne or more of the following reliability metrics shall be utilized. Nondisclosure agreements may be required prior to release of some data. NOTE Final module reliability is a combination of the individual die type reliability, quantity of die in the module, substrate signal routing, thermal dissipati
49、on properties and many other variables. Any reliability data so provided by the manufacturer or supplier shall be treated as only for an individual die device type, and only as “as received”, not “as assembled”. “Infant mortality“ data or Percent Defective Allowable (PDA) for burned-in die. Supplier life test data based on comparable packaged parts. Other company approaches (e.g., statistical process controls, in line/end of line monitors, tests and screens, etc.) 100% stress testing (e.g., burn-in, temp cycle, electrical stress) to supplier specificat
