1、JEDEC STANDARD Glossary of Thermal Measurement Terms and Definitions JESD51-13 JUNE 2009 JEDEC SOLID STATE TECHNOLOGY ASSOCIATION NOTICE JEDEC standards and publications contain material that has been prepared, reviewed, and approved through the JEDEC Board of Directors level and subsequently review
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8、current Catalog of JEDEC Engineering Standards and Publications online at http:/www.jedec.org/Catalog/catalog.cfm Printed in the U.S.A. All rights reserved PLEASE! DONT VIOLATE THE LAW! This document is copyrighted by JEDEC and may not be reproduced without permission. Organizations may obtain permi
9、ssion to reproduce a limited number of copies through entering into a license agreement. For information, contact: JEDEC Solid State Technology Association 3103 North 10th Street Suite 240 South Arlington, VA 22201-2107 or call (703) 907-7559 JEDEC Standard No. 51-13 -i- GLOSSARY OF THERMAL MEASUREM
10、ENT TERMS AND DEFINITIONS Introduction In order to facilitate the communication of thermal measurement and data information a clear and well-defined language is necessary. This collection of terms and definitions will help to more accurately describe the thermal performance of various semiconductor
11、packages and packaged devices. JEDEC Standard No. 51-13 -ii- JEDEC Standard No. 51-13 Page 1 GLOSSARY OF THERMAL MEASUREMENT TERMS AND DEFINITIONS (From JEDEC Board ballot JCB-09-21, formulated under the cognizance of the JC-15 Committee on Thermal Characterization.) 1 Scope This document provides a
12、 unified collection of the commonly used terms and definitions in the area of semiconductor thermal measurements. The terms and definitions provided herein extend beyond those used in the JESD51 family of documents to include other often used terms and definitions in the area of semiconductor therma
13、l measurements. 2 Normative references This document is one of a number of JEDEC publications on the thermal characterization of integrated circuit devices. The associated details of test methods, thermal test dice, and test boards are given by the following JEDEC publications: 1 JESD51, “Methodolog
14、y for the Thermal Measurement of Component Packages (Single Semiconductor Devices).” This is the overview document for this series of standards and guidelines. 2 JESD51-1, “Integrated Circuit Thermal Measurement Method - Electrical Test Method” 3 JESD51-2, “Integrated Circuit Thermal Measurement Met
15、hod - Environmental Conditions - Natural Convection (Still Air)” 4 JESD51-3, “Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages” 5 JESD51-4, “Thermal Test Chip Guidelines (Wire Bond-type Chip)” 6 JESD51-5, “Extension of Thermal Test Board Standards for Packages with Dir
16、ect Thermal Attachment Mechanisms” 7 JESD51-6, “Integrated Circuit Thermal Test Method Environmental Conditions - Forced Convection (Moving Air)” 8 JESD51-7, “High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages” 9 JESD51-8, “Integrated Circuit Thermal Test Method Environ
17、mental Conditions - Junction-to-Board” JEDEC Standard No. 51-13 Page 2 2 Normative references (contd) 10 JESD51-9, “Test Boards for Area Array Surface Mount Package Thermal Measurements” 11 JESD51-10, “Test Boards for Through-Hole Perimeter Leaded Package Thermal Measurements” 12 JESD51-11, “Test Bo
18、ards for Through-Hole Area Array Leaded Package Thermal Measurements” 13 JESD51-12, “Guidelines for Reporting and Using Electronic Package Thermal Information” 3 Terms and definitions black body: a perfect radiator or absorber of infrared radiation. chip attach: see DIE BOND. cold plate: a heat abso
19、rber usually operating at some known or fixed temperature. die attachment: see DIE BOND. die bond: the process or method of physically mounting a chip on a surface - package, substrate, header, etc.; also known as DIE ATTACHMENT or CHIP ATTACH. die bond material: material used to attach the die to r
20、est of the package. The most common material is epoxy; solder is often used for high power devices. DUT: Device-Under-Test. electrical test method: a method using electrical signals and measurement to determine junction temperature change as the result of a change in the application of electrical po
21、wer to the DUT over a specific period of time. emissivity: the ratio of the radiant energy emitted by a surface to that emitted by a blackbody at the same temperature. heating current: a current supplied to device-under-test to cause the junction temperature to rise. heating power: the product of HE
22、ATING CURRENT and HEATING VOLTAGE; causing de-vice-under-test junction temperature to rise. JEDEC Standard No. 51-13 Page 3 3 Terms and definitions (contd) heating pulse width: the length of time electrical power is applied to the device-under-test to cause the junction temperature to rise. heating
23、voltage: the voltage across the DUT during the application of HEATING CURRENT. heat sink: an external object in contact with component package for purposes of removing heat from the component. junction temperature: the temperature of the operating portion of a semiconductor device. K Factor: the quo
24、tient of junction temperature change to temperature sensitive parameter change in linear region of temperature sensitive parameter - temperature relationship. K Factor calibration: the measurement and data reduction process that results in values of K factor for the semiconductor device. measurement
25、 current: the current applied to the device-under-test for the measurement of the temperature sensitive parameter. measurement delay time: time from removal of heating conditions to the start of the measurement sample window. peak junction temperature: the highest temperature on the semiconductor ch
26、ip due to power dissipation internal to the semiconductor chip; if there are significant multiple peaks, then location information must be provided. radiation: the transmission of heat via electromagnetic waves. sample window time: length of time during which the temperature sensitive parameter is m
27、easured after HEATING POWER is removed. spatial resolution: the diameter of a spot whose size is determined from the half-power points resulting from a point infrared source. temperature-sensitive parameter: an electrical parameter of a semiconductor device that varies directly with junction tempera
28、ture in a linear or very nearly linear fashion. thermal characterization parameter: parameter characterizing the behavior of the package. The two most commonly used thermal characterization parameters are JTand JBdefined in JESD51-2 and JESD51-6 that measure the temperature relationship between junc
29、tion-to-top and junction-to-board. While the units are C/W, they are not resistances because the temperature difference is divided by the total power, not the power flowing between the two areas. JEDEC Standard No. 51-13 Page 4 3 Terms and definitions (contd) thermal equilibrium: a condition in whic
30、h no heat-producing power is applied to the device-under-test and the device junction temperature (TJ) is equal to the ambient temperature (TA) in the immediate vicinity of the device. (Thermal steady-state at zero applied power) thermal impedance: a measure of the dynamic heat flow restriction from
31、 a point of high temperature to a point of lower temperature. In most cases, dynamic heat-flow means a transient. thermal resistance: a measure of the steady-state heat flow from a point of higher temperature to a point of lower temperature, calculated by dividing the temperature difference by the h
32、eat flow between the two points. thermal resistance, junction-to-ambient: the thermal resistance from the operating portion of a semiconductor device to a natural convection (still-air) environment surrounding the device. thermal resistance, junction-to-case: the thermal resistance from the operatin
33、g portion of a semiconductor device to outside surface of the package (case) closest to the chip mounting area when that same surface is properly heat sunk so as to minimize temperature variation across that surface; the package interface surface can be on either the top or bottom of the package. th
34、ermal resistance, junction-to-fluid: the thermal resistance from the operating portion of a semiconductor device to a fluid environment surrounding the device. thermal resistance, junction-to-lead: the thermal resistance from the operating portion of a semiconductor device to lead either most closel
35、y associated with heat removal or otherwise specified. thermal resistance, junction-to-moving air: the thermal resistance from the operating portion of a semiconductor device to a forced convection (moving-gas) environment surrounding the device; the gas is assumed to be air unless otherwise defined
36、. thermal resistance, junction-to-reference point: the thermal resistance from the operating portion of a semiconductor device to a defined reference point within the specified environment surrounding the device. thermal resistance, junction-to-defined environment: the thermal resistance from the op
37、erating portion of a semiconductor device to a defined nonstandard environment surrounding the device. thermal steady-state: a condition in which the power entering the device-under-test (DUT) is equal to the power leaving the DUT; the device junction temperature (TJ) will have reached a stable valu
38、e. JEDEC Standard No. 51-13 Page 5 4 Symbols and units Note: Temperature may be expressed in Kelvin (K) or centigrade (C) units. Symbol Units Description TSP The change in the Temperature Sensitive Parameter; units dependent on parameter used JAK/W Junction-to-Ambient Thermal Resistance JBK/W Juncti
39、on-to-Board Thermal Resistance JBK/W Junction-to-Board Thermal Characterization Parameter. A thermal metric derived from the difference in junction temperature (TJ) and board temperature (TB) divided by total heating power (PH); applicable to arrayed-connection packages. The thermal environment must
40、 be specified. JCK/W Junction-to-Case Thermal Resistance JCbotK/W Junction-to-Case Thermal Resistance with heat flow through package bottom JCtopK/W Junction-to-Case Thermal Resistance with heat flow through package top JFK/W Junction-to-Fluid Thermal Resistance JLK/W Junction-to-Lead Thermal Resist
41、ance JLK/W Junction-to-Lead Thermal Characterization Parameter. A thermal metric derived from the difference in junction temperature (TJ) and lead temperature (TL) divided by total heating power (PH); applicable mostly to leaded device packages. The thermal environment must be specified. JMAK/W Junc
42、tion-to-Moving Air Thermal Resistance JRK/W Junction-to-Reference Thermal Resistance JTK/W Junction-to-Top Thermal Characterization Parameter. A thermal metric derived from the difference in junction temperature (TJ) and package top temperature (TT) divided by total heating power (PH). The thermal e
43、nvironment must be specified. JXK/W Junction-to-defined point (X) Thermal Resistance VFmV The change in temperature sensing voltage due to the applied HEATING POWER to the device. IHA Heating Current IMmA Measurement Current K K/mV K/ K Factor for diode sensor K Factor for resistive sensor PHW Heati
44、ng Power RJAK/W Junction-to-Ambient Thermal Resistance RJCK/W Junction-to-Case Thermal Resistance RJLK/W Junction-to-Lead Thermal Resistance RJMAK/W Junction-to-Moving Air Thermal Resistance RJRK/W Junction-to-Reference Thermal Resistance JEDEC Standard No. 51-13 Page 6 4 Symbols and units (contd) S
45、ymbol Units Description RJXK/W Junction-to-defined point (X) Thermal Resistance TAK Ambient Temperature TBK Board Temperature, measured on the board at the package long-side center TFK Fluid Temperature in immediate area of the package tHs Heating Time tHsss Steady State Heating Time TJK Junction Te
46、mperature TJK Junction Temperature Change TJ(Peak)K Peak Junction Temperature; if multiple peaks, then term refers to the highest peak TLK Lead Temperature tMDs Measurement Delay Time TTK The device package temperature; usually top-center on the greatest exposed package surface tSWs Sample Window Ti
47、me VHV Heating Voltage ZJXK/W Junction-to-defined point (X) Thermal Impedance STANDARD IMPROVEMENT FORM JEDEC JESD51-13 The purpose of this form is to provide the Technical Committees of JEDEC with input from the industry regarding usage of the subject standard. Individuals or companies are invited
48、to submit comments to JEDEC. All comments will be collected and dispersed to the appropriate committee(s). If you can provide input, please complete this form and return to: JEDEC Attn: Publications Department 3103 North 10thStreet Suite 240 South Arlington, VA 22201-2107 Fax: 703.907.7583 1. I reco
49、mmend changes to the following: Requirement, clause number Test method number Clause number The referenced clause number has proven to be: Unclear Too Rigid In Error Other 2. Recommendations for correction: 3. Other suggestions for document improvement: Submitted by Name: Phone: Company: E-mail: Address: City/State/Zip: Date:
