1、JEDEC SOLID STATE TECHNOLOGY ASSOCIATIONJESD8-14A.01SEPTEMBER 2007JEDECSTANDARD1.0 V +/- 0.1 V (Normal Range) and 0.7 V - 1.1 V (Wide Range) Power SupplyVoltage and Interface Standard for Nonterminated Digital Integrated Circuits(Minor revision of JES8-14A, November 2005)NOTICEJEDEC standards and pu
2、blications contain material that has been prepared, reviewed, and approvedthrough the JEDEC Council level and subsequently reviewed and approved by the EIA General Counsel.JEDEC standards and publications are designed to serve the public interest through eliminatingmisunderstandings between manufact
3、urers and purchasers, facilitating interchangeability andimprovement of products, and assisting the purchaser in selecting and obtaining with minimum delay theproper product for use by those other than JEDEC members, whether the standard is to be used eitherdomestically or internationally.JEDEC stan
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5、ications.The information included in JEDEC standards and publications represents a sound approach to productspecification and application, principally from the solid state device manufacturer viewpoint. Within the No claims to be in conformance with this standard may be made unless all requirements
6、stated in thestandard are met.Inquiries, comments, and suggestions relative to the content of this JEDEC standard or publication shouldbe addressed to JEDEC Solid State Technology Association, 2500 Wilson Boulevard, Arlington, VA22201-3834, (703)907-7559 or www.jedec.org.Published byJEDEC Solid Stat
7、e Technology Association 20072500 Wilson BoulevardArlington, VA 22201-3834This documentmay be downloaded free of charge, however JEDEC retains the copyright on this material. By downloading this file the individual agrees not to charge for or resell the resulting material.Price: Please refer to the
8、current Catalog of JEDEC Engineering Standards and Publications oat www.jedec.orgPrinted in the U.S.A.All rights reservedPLEASE! DONT VIOLATE THE LAW ! This document is copyrighted by JEDEC and may not be reproduced without permission. Organizations may obtain permission to reproduce a limited numbe
9、r of copies through entering into a license agreem ent. For inform ation, contact: JEDEC Solid State Technology Association 2500 W ilson Boulevard Arlington, Virginia 22201-3834 or call (703) 907-7559 JEDEC Standard No. 8-14A.01Page 11.0 V +/- 0.1 V (NORMAL RANGE) AND 0.7 V - 1.1 V (WIDE RANGE) POWE
10、R SUPPLY VOLTAGE AND INTERFACE STANDARD FOR NONTERMINATED DIGITAL INTEGRATED CIRCUITS(From JEDEC Board Ballot JCB-01-102 and JCB-05-81, formulated under the cognizance of the JC-16 Committee on Interface Technology.)1 ScopeThis standard defines power supply voltage ranges, dc interface and switching
11、 parameters for a high speed, low voltage family of nonterminated digital circuits driving/driven by parts of the same family, or mixed families which comply with the input receiver specifications. The specifications in this standard represent a minimum set of interface specifications for CMOS compa
12、tible circuits.The purpose of this standard is to provide a standard of specification for uniformity, multiplicity of sources, elimination of confusion, and ease of device specification and design by users. Clause 2.3 describes normal dc electrical characteristics and clause 2.4 (added in revision A
13、) describes the optional chracteristics for Schmitt trigger operation.2 Standard specificationsAll voltages are referenced to ground except where noted.2.1 Absolute maximum continuous ratingsNOTE 1 Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Expo
14、sure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum conditions is not implied.NOTE 2 Not to exceed 1.4 V.NOTE 3 The maximum voltage allowed between any two signal (input, output or input/output) pins or an
15、y signal pin and VDDmust be less than 1.6 V.Supply Voltage, VDD-0.4 V to 1.4 Vdc Input Voltage, VIN(except I/O pins) (note 1, 2 and 3) -0.4 V to VDD+ 0.4 Vdc Output Voltage, VOUT(including I/O pins) (note 2 and 3) -0.4 V to VDD+ 0.4 Vdc Input Diode Current, IIK(VIVDD) +/- 20 mAdc Output Diode Curren
16、t, IOK(VOVDD) +/- 20 mAJEDEC Standard No. 8-14A.01Page 22 Standard specifications (contd)2.2 Recommended operating conditions2.2.1 Normal rangeNOTE 1 Specified by manufacture to be commercial, industrial, and/or military grade.2.2.2 Wide rangeNOTE 1 Specified by manufacture to be commercial, industr
17、ial, and/or military grade.2.3 DC electrical characteristics2.3.1 Normal rangeVDD(min)= 0.9 V and VDD(max)= 1.1 V across operating temperature range - Note 1 and 2NOTE 1 VDDof the sending and receiving devices must track within 0.1 V to maintain adequate dc margins. NOTE 2 For VIHand VIL, VDDrefers
18、to the receiving device. For VOHand VOL, VDD refers to the sending device.Symbol Parameter Operating RangeVDDPower Supply Voltage 0.9 V to 1.1 VTAOperating Temperature Note 1Symbol Parameter Operating RangeVDDPower Supply Voltage 0.7 V to 1.1 VTAOperating Temperature Note 1Symbol Parameter Test Cond
19、ition MIN MAX UnitVDDSupply Voltage 0.9 1.1 VVIHInput High Voltage 0.65 VDDVDD+ 0.2 VVILInput Low Voltage -0.2 0.35 VDDVVOHOutput High Voltage IOH= -2 mA 0.75 VDDVVOLOutput Low Voltage IOL= 2 mA 0.25 VDDVJEDEC Standard No. 8-14A.01Page 32.3 DC electrical characteristics (contd)2.3.2 Wide rangeVDD(mi
20、n)= 0.7 V and VDD(max)= 1.1 V across operating temperature range - Note 1 and 2NOTE 1 VDDof the sending and receiving devices must track within 0.1 V to maintain adequate dc margins. NOTE 2 For VIHand VIL, VDDrefers to the receiving device. For VOHand VOL, VDD refers to the sending device.2.4 Option
21、al DC electrical characteristics for Schmitt trigger operation2.4.1 Optional Schmitt trigger operation - Normal rangeVDD(min)= 0.9 V and VDD(max)= 1.1 V across operating temperature range - Note 1 and 2NOTE 1 VDDof the sending and receiving devices must track within 0.1 V to maintain adequate dc mar
22、gins.NOTE 2 For Vt+ (VP) and Vt (Vn), VDDrefers to the receiving device. For VOHand VOL, VDD refers to the sending device.Symbol Parameter Test Condition MIN MAX UnitVDDSupply Voltage 0.7 1.1 VVIHInput High Voltage 0.7 VDDVDD+ 0.2 VVILInput Low Voltage -0.2 0.3 VDDVVOHOutput High Voltage IOH= -100 u
23、A VDD - 0.1 VVOLOutput Low Voltage IOL= 100 uA 0.1 VSymbol Parameter Test Condition MIN MAX UnitVDDSupply Voltage - 0.9 1.1 VVt+ (VP) Positive Going Threshold VoltageVOUT VOH(min)0.4 VDD0.7 VDDVVt (Vn) Negative going Threshold VoltageVOUT VOH(min)0.35 VDD0.75 VDDVVt (Vn) Negative going Threshold Vol
24、tageVOUT VOL(max)0.25 VDD0.65 VDDVVh (Vt) Hysteresis Voltage Vt+ - Vt 0.1 VDD0.5 VDDVVOHOutput High Voltage IOH= -100 uA VDD- 0.1 VVOLOutput Low Voltage IOL= 100 uA 0.1 VDDVJEDEC Standard No. 8-14A.01Page 53 Test conditions for Optional Schmitt trigger operation (contd)Figure 1 DC characteristic mea
25、surement circuit of Schmitt Trigger inputJEDEC Standard No. 8-14A.01Page 6Annex A (informative) Differences betwe en JESD8-14A.01 and JESD8-14AThis table briefly describes most of the changes made to entries that appear in this standard, JESD8-14A.01, compared to its predecessor, JESD8-14A (November
26、 2005). If the change to a concept involves any words added or deleted (excluding deletion of accidentally repeated words), it is included. Some punctuation changes are not included.Page Description of change3 The table in Section 2.4.1 was updated to properly reflect that the VOHand VOLTestConditio
27、ns should be in mA not uA.A.1 Differences betwe en JESD8-14A and JESD8-14This table briefly describes most of the changes made to entries that appear in this standard, JESD8-14A, compared to its predecessor, JESD8-14 (December 2001). If the change to a concept involves any words added or deleted (ex
28、cluding deletion of accidentally repeated words), it is included. Some punctuation changes are not included.Page Description of change3 Added subclauses 2.4 and 2.4.14 Added subclause 2.4.24 Added Clause 3 and its subclauses5 Added Figure 1Rev. 9/02Standard Improvement Form JEDEC JESD8-14A.01The pur
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