1、NOT MEASUREMENT SENSITIVE MIL-PRF-32006 29 June 2004 PERFORMANCE SPECIFICATION PROGRAMMABLE CONTROLLER, NAVAL SHIPBOARD This specification is approved for use by all Departments and Agencies of the Department of Defense. 1. SCOPE 1.1 Scope. This specification covers the requirements for a high-end,
2、rack-mounted, module type programmable controller for naval shipboard use. The terms programmable controller and programmable logic controller (PLC) are used interchangeably throughout this specification. 2. APPLICABLE DOCUMENTS 2.1 General. The documents listed in this section are specified in sect
3、ion 3, 4, or 5 of this specification. This section does not include documents cited in other sections of this specification or recommended for additional information or as examples. While every effort has been made to ensure the completeness of this list, document users are cautioned that they must
4、meet all specified requirements of documents cited in section 3, 4, or 5 of this specification, whether or not they are listed. 2.2 Government documents. 2.2.1 Specifications, standards, and handbooks. The following specifications, standards, and handbooks form a part of this document to the extent
5、specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. FEDERAL STANDARDS FED-STD-595/26307 Gray, Semigloss DEPARTMENT OF DEFENSE SPECIFICATIONS MIL-DTL-2212 Contactors and Controllers, Electric Motor AC or DC, and Associated Switc
6、hing Devices MIL-E-2036 Enclosure for Electric and Electronic Equipment, Naval Shipboard MIL-S-901 Shock Tests, H.I. (High Impact) Shipboard Machinery, Equipment, and Systems, Requirements For Beneficial comments, recommendations, additions, deletions, clarifications, etc. and any data, that may imp
7、rove this document should be sent to: Commander, Naval Sea Systems Command, ATTN: SEA 05Q, 1333 Isaac Hull Avenue, SE, Stop 5160, Washington Navy Yard DC 20376-5160 or emailed to commandstandardsnavsea.navy.mil. AMSC N/A FSC 5998, with the subject line “Document Comment”. Since contact information c
8、an change, you may want to verify the currency of this address information using the ASSIST Online database at www.dodssp.daps.milProvided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-32006 DEPARTMENT OF DEFENSE STANDARDS MIL-STD-167-1 Mechanical V
9、ibrations of Shipboard Equipment (Type I - Environmental and Type II - Internally Excited) MIL-STD-461 Requirements for the Control of Electromagnetic Interface - Characteristics of Subsystems and Equipment (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch or w
10、ww.dodssp.daps.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.3 Non-Government publications. The following documents form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the docum
11、ents are those cited in the solicitation or contract. INSTITUTE OF ELECTRICAL AND ELECTRONIC ENGINEERS IEEE 802.3 Information Technology - Telecommunications and Information Exchange between Systems - LAN/MAN Specific Requirements - Part 3: Carrier Sense Multiple Access with Collision Detection (CSM
12、A/CD) Access Method and Physical Layer Specifications IEEE C95.1 IEEE Standard for Safety Levels with Respect to Human Exposure to Radio Frequency Electromagnetic Fields, 3kHz to 300 GH (Applications for copies are available from the IEEE Service Center, 445 Hoes Lane, Piscataway, NJ 08855-1331 or w
13、ww.ieee.org.) INTERNATIONAL ELECTROTECHNICAL COMMISSION IEC 61131-2 Programmable Controllers Part 2: Equipment Requirements and Tests IEC 61131-3 Programmable Controllers Part 3: Programming Languages (Applications for copies are available from the IEC, UBS SA, 1201 Geneva, Switzerland or www.iec.ch
14、.) NATIONAL ELECTRICAL MANUFACTURERS ASSOCIATION 250 Enclosures for Electrical Equipment (1000 Volts Maximum) ICS 2 Industrial Control and Systems: Controllers, Contactors and Overload Relays, Rated Not More Than 2000 Volts AC or 750 Volts DC (Applications for copies should be addressed to the Natio
15、nal Electrical Manufacturing Association, 2101 L Street, NW Suite 300, Washington DC 20037 or www.nema.org.) ELECTRONICS INDUSTRIES ALLIANCE EIA 232 Interface Between Data Terminal Equipment and Data (Applications for copies should be addressed to the IHS, 15 Inverness Way, East Englewood, Colorado
16、80155-6800 or .) 2.4 Order of precedence. In the event of a conflict between the text of this document and the references cited herein (except for related associated specifications or specification sheets), the text of this document takes precedence. Nothing in this document, however, supersedes app
17、licable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 First article. When specified (see 6.2), a sample shall be subjected to first article inspection in accordance with 4.2. 3.2 Materials. The contractor shall select materials capable of meeting all of the
18、operational and environmental requirements specified herein. The materials specified in this specification are recommended, but are not mandatory. 2 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-32006 3.2.1 Recycled, recovered, or environme
19、ntally preferable materials. Recycled, recovered, or environmentally preferable materials should be used to the maximum extent possible, provided that the material meets or exceeds the operational and maintenance requirements, and promotes economically advantageous life cycle costs. 3.2.2 Included p
20、arts. The controller shall be supplied with a module mounting rack, Central Processing Unit (CPU), input/output scanner, inputs, outputs, network interface(s), memory, power supply, power and interface cables, and software necessary to function as a complete and operable PLC system. The PLC system m
21、ay include an enclosure as needed to meet the requirements specified herein or as cited in the solicitation or contract. 3.3 Design. The PLC shall be designed to allow an easy interface to existing systems. The processor, input and output circuitry shall have a modular field expandable design. The P
22、LC design shall allow for expansion of the system by the addition of hardware and/or user software. 3.3.1. Component compatibility. The PLC system shall have downward compatibility whereby all new system components can be interchanged with similar modules to reduce obsolescence. The PLC system shall
23、 be open distributed and scaleable with a reconfigurable architecture and shall maximize the use of current commercial technology. 3.3.2 Front panel. The front panel of the programmable controller shall include a holder and a connector for a lithium or equivalent battery. 3.3.3 Sharp edges. The PLC
24、shall be designed with no sharp edges, which could cause cuts or abrasions to the operator. 3.4 Performance characteristics. 3.4.1 Reliability. The mean time between failure (MTBF) shall be a minimum of 20,000 operating hours. All components of the PLC system shall not require maintenance more frequ
25、ently than annually. 3.4.2 Duty. The PLC shall be constructed to operate for continuous duty and general-purpose service as specified in MIL-C-2212. 3.4.3 Diagnostics. The PLC system shall have resource and diagnostic control at all system levels. The PLC system shall provide diagnostics capabilitie
26、s to allow troubleshooting down to the lowest replaceable unit. Diagnostics shall be of power up and on-line type. The PLC shall be capable of supporting a device that will display diagnostic results, status of selectable addresses, and the suspected modules that could cause the failure. The elimina
27、tion of suspected failed modules shall be a maximum of three of the most likely modules that could cause that particular failure. 3.4.4 Logic function. The internal wiring of the controller shall be fixed, and all logic functions that shall be performed in a given application shall be programmed int
28、o its memory. 3.4.5 Serial port. The PLC shall have one dedicated serial port that supports Electronic Industries Alliance (EIA) 232 signals. It shall be accessible in control logic and provide support for Master and Slave SCADA communication protocol systems. Alternatively, it shall be usable for p
29、rogramming purposes or for access to peripheral devices such as bar code scanners, CRTs, etc. 3.4.6 Electrical service. The PLC shall operate in compliance with an electrical service of either 120 VAC, single phase, in the frequency range from 47 to 63 Hz, or 24 VDC (see 6.2). 3.4.7 Cooling. All sys
30、tem modules, main and expansion chassis shall provide free airflow convection cooling. No internal fans or other means of cooling, except heat sinks, shall be permitted. 3.4.8 Central processing unit. 3.4.8.1 Function. The PLC Central Processing Unit (CPU) shall be a self-contained unit and shall pr
31、ovide control program execution, I/O scanning and support remote or local programming. 3.4.8.2 Discrete and analog points. The processor shall be capable of addressing a minimum of 10,000 discrete points or 1,000 analog points. Processor shall be capable of communicating with 50 physical locations e
32、ach containing I/O as a minimum or as specified on section 6.2. 3 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-32006 3.4.8.3 Multiple independent, asynchronous scans. The PLC processor shall use designated scans for processing of input and
33、 output information, program logic, and background processing of other processor functions (see 6.2). Input and output devices located in the same backplane (local I/O) as the CPU shall produce at the rate of the configured Requested Packet Interval (RPI), and for inputs enabled for Change of State
34、(COS), at the time any point changes state. Scan rates for devices located in backplanes other than that in which the processor is located shall be user selectable and shall range from 2 to 100 milliseconds (ms). 3.4.8.4 Features. The processor shall contain the following performance features as a m
35、inimum: a. 16K user memory words capability. b. Battery-backed CMOS RAM. c. Ladder logic, Sequential Function Chart (SFC), and structured-text programming support compliant with the IEC 61131-3 standard. d. Configurable EIA 232 port for programming. e. Advanced instruction set including file handlin
36、g, sequencer, diagnostic, shift register, immediate-I/O, and program control instructions. f. Multiple main control programs for segregation of control tasks. g. Processor input interrupts and global status flags. h. Programmable fault response for reacting to a fault before the system goes down. i.
37、 Timed-interrupt routine for examining specific information at specific time intervals. 3.4.8.5 Removable programmable devices. The operating system and application specific program files shall be contained in removable programmable devices that allow for easy field replacement. 3.4.8.6 Fault indica
38、tion. The CPU shall perform internal diagnostic checks and give visual indication to the user by illuminating a “green” indicator when no fault is detected and a “red” indicator when a fault is detected as specified (see 6.2). 3.4.8.7 Data bits. The CPU shall be capable of addressing at least 48,000
39、 words comprised of 16 data bits. 3.4.8.8 User program. The user programs and data shall be contained in non-volatile, battery-backed memory. 3.4.8.9 Firmware. The operating system shall be contained in non-volatile firmware. 3.4.8.10 Memory. The controller shall contain no less then 100 kilobytes o
40、f base memory. It shall provide the capability to increase the memory up to at least 2 megabytes or as required (see 6.2). 3.4.8.11 Mode selector switch. The processor mode shall be selectable by a key switch mounted on the front panel of the CPU. The key switch shall allow the selection of the foll
41、owing modes: a. RUN - No control logic edits possible, program always executing. b. PROGRAM - Programming allowed, program execution disabled. c. REMOTE - Programming terminal can make edits and change processor mode, including TEST mode, whereby the logic executes and inputs are monitored, but edit
42、s are not permanently active unless assembled. 3.4.8.12 Processor fault. The PLC shall provide a visual indication of a PLC processor fault. By default, a PLC processor fault shall cause analog control signals to fail in the last state and digital control signals to fail in the low state. The PLC sh
43、all provide the capability to change the analog and digital control signal state in response to a failure. If the fault is caused by a memory problem, it shall be possible to clear the fault using a procedure to boot the PLC from the EEPROM or FLASHPROM memory. The devices associated with the contro
44、l signals shall remain in the last state, with the exception of signals that require a continuous output voltage. 3.4.8.13 Power loss. A total loss of 120 VAC supplying the PLC shall cause the PLC system to shutdown. All control signals associated with that PLC shall fail in the low state. Loss of 2
45、4-VDC PLC power supply shall prevent commands associated with that PLC from being energized. Status change signals that do not have alarms 4 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-32006 associated with them shall display the open sta
46、te of the digital contact. Control signals that rely on 24-VDC power from the PLC cabinet shall fail to energize. 3.4.8.14 Input and output devices. Input and output devices located in the same backplane (local I/O) as the CPU shall be capable of being scanned synchronously in under 0.5 ms. Concurre
47、nt with this I/O update time, the processing of a typical logic program shall not exceed 0.5 to 2 ms for 1024 instructions with a maximum overhead of 4.5 ms. 3.4.8.15 Remote input and output devices. Input and output devices located remotely should be capable of being scanned in under 10 ms for a 57
48、.6-kilobyte/sec transfer rate, under 7 ms for a 115.2-kilobyte/sec transfer rate, and under 3 ms for a 230.4-kilobyte/sec transfer rate. 3.4.9 Chassis. The I/O chassis shall be capable of holding the CPU, communication modules and I/O modules. The chassis size shall be a minimum of 5 incremental siz
49、es ranging between 4 and 20 module slots. 3.4.9.1 Indicators. The main chassis front panel shall include two-color indicators showing the following status information: a. PROGRAM or RUN mode of the CPU. b. The RUN/FAULT status of the CPU. c. ENABLED/DISABLED state of outputs. d. State of the I/O adapters. e. Data I/O forces PRESENT/ACTIVE. f. Remote device communicating via the inter-processor communications link. g. Status of the Ethernet transceiver port. h. Data transfer activity over
