1、American National StandardDeveloped byfor Information Technology RapidIOTMInterconnect SpecificationANSI INCITS 413-2007ANSIINCITS413-2007RapidIO Trade AssociationANSIINCITS 413-2007American National Standardfor Information Technology RapidIOTMInterconnect SpecificationSecretariatInformation Technol
2、ogy Industry CouncilApproved February 2, 2007American National Standards Institute, Inc.Approval of an American National Standard requires review by ANSI that therequirements for due process, consensus, and other criteria for approval havebeen met by the standards developer.Consensus is established
3、when, in the judgement of the ANSI Board ofStandards Review, substantial agreement has been reached by directly andmaterially affected interests. Substantial agreement means much more thana simple majority, but not necessarily unanimity. Consensus requires that allviews and objections be considered,
4、 and that a concerted effort be madetowards their resolution.The use of American National Standards is completely voluntary; theirexistence does not in any respect preclude anyone, whether he has approvedthe standards or not, from manufacturing, marketing, purchasing, or usingproducts, processes, or
5、 procedures not conforming to the standards.The American National Standards Institute does not develop standards andwill in no circumstances give an interpretation of any American NationalStandard. Moreover, no person shall have the right or authority to issue aninterpretation of an American Nationa
6、l Standard in the name of the AmericanNational Standards Institute. Requests for interpretations should beaddressed to the secretariat or sponsor whose name appears on the titlepage of this standard.CAUTION NOTICE: This American National Standard may be revised orwithdrawn at any time. The procedure
7、s of the American National StandardsInstitute require that action be taken periodically to reaffirm, revise, orwithdraw this standard. Purchasers of American National Standards mayreceive current information on all standards by calling or writing the AmericanNational Standards Institute.American Nat
8、ional StandardPublished byAmerican National Standards Institute, Inc.25 West 43rd Street, New York, NY 10036Copyright 2007 by Information Technology Industry Council (ITI)All rights reserved.No part of this publication may be reproduced in anyform, in an electronic retrieval system or otherwise,with
9、out prior written permission of ITI, 1250 Eye Street NW, Washington, DC 20005. Printed in the United States of AmericaCAUTION: The developers of this standard have requested that holders of patents that may be re-quired for the implementation of the standard disclose such patents to the publisher. H
10、owever, nei-ther the developers nor the publisher have undertaken a patent search in order to identify which, ifany, patents may apply to this standard. As of the date of publication of this standard, followingcalls for the identification of patents that may be required for the implementation of the
11、 standard,notice of one or more such claims has been received. By publication of this standard, no positionis taken with respect to the validity of this claim or of any rights in connection therewith. The knownpatent holder(s) has (have), however, filed a statement of willingness to grant a license
12、underthese rights on reasonable and nondiscriminatory terms and conditions to applicants desiring to ob-tain such a license. Details may be obtained from the publisher. No further patent search is con-ducted by the developer or publisher in respect to any standard it processes. No representation ism
13、ade or implied that this is the only license that may be required to avoid infringement in the use ofthis standard.iContentsForeword iiIntroduction .ivOverview of the Standard.vExtensionsxTerminology .xConventions xiReferenced Documents xiPart 1: Input/Output Logical SpecificationPart 2: Message Pas
14、sing Logical SpecificationPart 3: Common Transport SpecificationPart 4: Physical Layer 8/16 LP-LVDS SpecificationPart 5: Globally Shared Memory Logical SpecificationPart 6: 1X/4X LP-Serial Physical Layer SpecificationPart 7: System and Device Inter-operability SpecificationPart 8: Error Management E
15、xtensions SpecificationPart 9: Flow Control Logical Layer Extensions SpecificationPart 10: Data Streaming Logical SpecificationPart 11: Multicast Extensions SpecificationAnnex 1: Software/System Bring Up SpecificationiiForeword (This foreword is not part of American National Standard ANSI INCITS 413
16、-2007.)ANSI INCITS 413-2006 is based on ISO/IEC 18372 and provides the text of that In-ternational Standard for use as the American National Standard. This standard wasdeveloped as an International Standard by ISO Committee 25 and reviewed and sub-mitted for approval as an American National Standard
17、 by the RapidIO(tm) Trade As-sociation. The foreword of the International Standard appears verbatim below.1) ISO (International Organization for Standardization) and IEC (International Elec-trotechnical Commission) form the specialized system for worldwide standardization.National bodies that are me
18、mbers of ISO or IEC participate in the development of In-ternational Standards through technical committees established by the respective or-ganization to deal with particular fields of technical activity. ISO and IEC technicalcommittees collaborate in fields of mutual interest. Other international
19、organizations,governmental and non-governmental, in liaison with ISO and IEC, also take part inthe work.2) In the field of information technology, ISO and IEC have established a joint techni-cal committee, ISO/IEC JTC 1. Draft International Standards adopted by the jointtechnical committee are circu
20、lated to national bodies for voting. Publication as an In-ternational Standard requires approval by at least 75 % of the national bodies castinga vote.3) All users should ensure that they have the latest edition of this publication.4) No liability shall attach to IEC or ISO or its directors, employe
21、es, servants oragents including individual experts and members of their technical committees andIEC or ISO National Committees for any personal injury, property damage or otherdamage of any nature whatsoever, whether direct or indirect, or for costs (includinglegal fees) and expenses arising out of
22、the publication, use of, or reliance upon, thisISO/IEC publication or any other IEC or IEC/ISO publications.5) Attention is drawn to the normative references cited in this publication. Use of thereferenced publications is indispensable for the correct application of this publication.6) Attention is
23、drawn to the possibility that some of the elements of this InternationalStandard may be the subject of patent rights. ISO and IEC shall not be held responsi-ble for identifying any or all such patent rights.International Standard ISO/IEC 18372 was prepared by subcommittee 25: Intercon-nection of inf
24、ormation technology equipment, of ISO/IEC joint technical committee 1:Information technology.This document is published as a “camera ready copy”.Requests for interpretation, suggestions for improvement or addenda, or defect re-ports are welcome. They should be sent to InterNational Committee for Inf
25、ormationTechnology Standards (INCITS), ITI, 1250 Eye Street, NW, Suite 200, Washington,DC 20005.This standard was processed and approved for submittal to ANSI by INCITS. Com-mittee approval of this standard does not necessarily imply that all committee mem-bers voted for its approval. At the time it
26、 approved this standard, INCITS had thefollowing members:iiiKaren Higginbottom, ChairJennifer Garner, SecretaryOrganization Represented Name of RepresentativeAIM Global Dan MullenCharles Biss (Alt.)Apple Computer, Inc. David MichaelElectronic Industries Alliance Edward Mikoski, Jr.David Thompson (Al
27、t.)EMC Corporation Gary RobinsonFarance, Inc. .Frank FaranceTimothy Schoechle (Alt.)GS1 US.Frank SharkeyJames Chronowski (Alt.)Mary Wilson (Alt.)Hewlett-Packard Company .Karen HigginbottomSteve Mills (Alt.)Scott Jameson (Alt.)IBM CorporationRonald F. SillettiPeter Schirling (Alt.)IEEEJudith GormanTe
28、rry DeCourcelle (Alt.)Robert Pritchard (Alt.)Jodi Haasz (Alt.)Bob Labelle (Alt.)Intel .Philip WennblomDave Thewlis (Alt.)Jesse Walker (Alt.)Grace Wei (Alt.)Lexmark International .Don WrightDwight Lewis (Alt.)Paul Menard (Alt.)Microsoft CorporationJim HughesDon Stanwyck (Alt.)Mike Ksar (Alt.)Isabelle
29、 Valet-Harper (Alt.)National Institute of Standards for example, 0xnn may be a5-, 6-, 7-, or 8-bit value.Referenced DocumentsThe following referenced documents are indispensable for the application of this doc-ument. For dated references, only the edition cited applies. For undated references,the la
30、test edition of the reference document (including any amendments) applies.ISO/IEC 8802-3, Ed. 7 (under consideration), Information technology - Telecommuni-cations and information exchange between systems- Local and metropolitan areanetworks Specific requirements: Part 3: Carrier sense multiple acce
31、ss with colli-sion detection (CSMA/CD) access method and physical layer specifications. xiiRev. 1.3, 06/2005RapidIOInterconnect Specification Part 1: Input/Output Logical SpecificationTable of Contents3ANSI INCITS 413-2007 (Part 1)Chapter 1 Overview1.1 Introduction. 111.2 Overview. 111.3 Features of
32、 the Input/Output Specification. 121.3.1 Functional Features. 121.3.2 Physical Features 121.3.3 Performance Features . 121.4 Contents 131.5 Terminology 131.6 Conventions 13Chapter 2 System Models2.1 Introduction. 152.2 Processing Element Models 152.2.1 Processor-Memory Processing Element Model 152.2
33、.2 Integrated Processor-Memory Processing Element Model 162.2.3 Memory-Only Processing Element Model . 162.2.4 Processor-Only Processing Element. 172.2.5 I/O Processing Element 172.2.6 Switch Processing Element. 172.3 System Issues 182.3.1 Operation Ordering. 182.3.2 Transaction Delivery. 202.3.2.1
34、Unordered Delivery System Issues. 202.3.2.2 Ordered Delivery System Issues. 212.3.3 Deadlock Considerations 21Chapter 3 Operation Descriptions3.1 Introduction. 233.2 I/O Operations Cross Reference . 243.3 I/O Operations. 243.3.1 Read Operations 253.3.2 Write and Streaming-Write Operations 253.3.3 Wr
35、ite-With-Response Operations. 263.3.4 Atomic (Read-Modify-Write) Operations 263.4 System Operations 273.4.1 Maintenance Operations . 273.5 Endian, Byte Ordering, and Alignment 274Table of ContentsANSI INCITS 413-2007 (Part 1)Chapter 4 Packet Format Descriptions4.1 Request Packet Formats 314.1.1 Addr
36、essing and Alignment . 324.1.2 Field Definitions for All Request Packet Formats 324.1.3 Type 0 Packet Format (Implementation-Defined) 354.1.4 Type 1 Packet Format (Reserved) 354.1.5 Type 2 Packet Format (Request Class). 354.1.6 Type 34 Packet Formats (Reserved). 364.1.7 Type 5 Packet Format (Write C
37、lass). 364.1.8 Type 6 Packet Format (Streaming-Write Class). 374.1.9 Type 7 Packet Format (Reserved) 384.1.10 Type 8 Packet Format (Maintenance Class) . 384.1.11 Type 911 Packet Formats (Reserved). 404.2 Response Packet Formats . 404.2.1 Field Definitions for All Response Packet Formats . 404.2.2 Ty
38、pe 12 Packet Format (Reserved) 414.2.3 Type 13 Packet Format (Response Class) 414.2.4 Type 14 Packet Format (Reserved) 414.2.5 Type 15 Packet Format (Implementation-Defined) 41Chapter 5 Input/Output Registers5.1 Register Summary. 435.2 Reserved Register and Bit Behavior. 445.3 Extended Features Data
39、 Structure. 455.4 Capability Registers (CARs) 475.4.1 Device Identity CAR (Configuration Space Offset 0x0). 475.4.2 Device Information CAR (Configuration Space Offset 0x4). 475.4.3 Assembly Identity CAR (Configuration Space Offset 0x8). 475.4.4 Assembly Information CAR (Configuration Space Offset 0x
40、C) 485.4.5 Processing Element Features CAR (Configuration Space Offset 0x10). 485.4.6 Switch Port Information CAR (Configuration Space Offset 0x14). 495.4.7 Source Operations CAR (Configuration Space Offset 0x18). 495.4.8 Destination Operations CAR (Configuration Space Offset 0x1C) 505.5 Command and
41、 Status Registers (CSRs) 52ANSI INCITS 413-2007 (Part 1)Table of Contents55.5.1 Processing Element Logical Layer Control CSR (Configuration Space Offset 0x4C) 525.5.2 Local Configuration Space Base Address 0 CSR (Configuration Space Offset 0x58). 525.5.3 Local Configuration Space Base Address 1 CSR
42、(Configuration Space Offset 0x5C) 536Table of ContentsANSI INCITS 413-2007 (Part 1)List of Figures7ANSI INCITS 413-2007 (Part 1)2-1 A Possible RapidIO-Based Computing System152-2 Processor-Memory Processing Element Example162-3 Integrated Processor-Memory Processing Element Example.162-4 Memory-Only
43、 Processing Element Example .172-5 Processor-Only Processing Element Example172-6 Switch Processing Element Example .183-1 Read Operation .253-2 Write and Streaming-Write Operations 263-3 Write-With-Response Operation 263-4 Atomic (Read-Modify-Write) Operation273-5 Maintenance Operation.273-6 Byte A
44、lignment Example283-7 Half-Word Alignment Example283-8 Word Alignment Example 283-9 Data Alignment Example294-1 Type 2 Packet Bit Stream Format.364-2 Type 5 Packet Bit Stream Format.374-3 Type 6 Packet Bit Stream Format.384-4 Type 8 Request Packet Bit Stream Format.394-5 Type 8 Response Packet Bit S
45、tream Format 404-6 Type 13 Packet Bit Stream Format.415-1 Example Extended Features Data Structure .46List of Figures8ANSI INCITS 413-2007 (Part 1)9List of TablesANSI INCITS 413-2007 (Part 1)4-1 Request Packet Type to Transaction Type Cross Reference 314-2 General Field Definitions for All Request P
46、ackets.334-3 Read Size (rdsize) Definitions 334-4 Write Size (wrsize) Definitions 344-5 Transaction Fields and Encodings for Type 2 Packets .364-6 Transaction Fields and Encodings for Type 5 Packets .374-7 Specific Field Definitions and Encodings for Type 8 Packets .394-8 Response Packet Type to Tra
47、nsaction Type Cross Reference404-9 Field Definitions and Encodings for All Response Packets .405-1 I/O Register Map 435-2 Configuration Space Reserved Access Behavior445-3 Bit Settings for Device Identity CAR .475-4 Bit Settings for Device Information CAR 475-5 Bit Settings for Assembly Identity CAR
48、 485-6 Bit Settings for Assembly Information CAR485-7 Bit Settings for Processing Element Features CAR485-8 Bit Settings for Switch Port Information CAR.495-9 Bit Settings for Source Operations CAR 495-10 Bit Settings for Destination Operations CAR.505-11 Bit Settings for Processing Element Logical
49、Layer Control CSR 525-12 Bit Settings for Local Configuration Space Base Address 0 CSR .525-13 Bit Settings for Local Configuration Space Base Address 1 CSR .5310List of TablesANSI INCITS 413-2007 (Part 1)11ANSI INCITS 413-2007 (Part 1)Chapter 1 Overview1.1 IntroductionThis chapter provides an overview of the RapidIO Part 1: Input/Output Logical Specification, including a description of the relationship between this specification and the other specifications of the RapidIO interconnect.1.2 OverviewThe RapidIO Part 1: Input/Output Logical Specification is one of the RapidIO logical
