1、a MIL-C-48483C 9 0b 2003039 082 LINCH-POUND I MIL-C-48483C(AR) O9 Mav 1995 (see 6.4) MILITARY SPECIFICATION CIRCUIT CARD ASSEMBLY - COMPARATOR, TYPE I This specification is approved for use by the U.S. Army Armament, Research, Development and Engineering Center (ARDEC) and is available for use by al
2、l Departments and Agencies of the Department of Defense. 1. SCOPE 1.1 Scope. This specification establishes the requirements and quality assurance provisions for the Circuit Card Assembly Comparator Type I, 11732530 (see 6.1). 2. APPLICABLE DOCUMENTS 2.1 Government documents. 2.1.1 Specifications, s
3、tandards and handbooks. The follow- ing specifications, standards and handbooks form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents shall be those listed in the issue of the Department of Defense Index of Specifications and Standards
4、 (DODISS) and supplement thereto, cited in the solicitation (see 6.2). SPECIFICATIONS MILITARY MIL-F-13926 - Fire Control Materiel, General Specification Governing the Manufacture and Inspection of Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use
5、 to improving this document should be addressed to: Commander, U.S. Army ARDEC, ATTN: AMSTA-AR-EDE-S, Picatinny Arsenal, New Jersey 07806-5000 by using the Standardization Document Improvement Proposal (DD Form 1426) appearing at the end of this document or by letter. AMSC N/A PISTRIBUTI ON STATEMEN
6、T A . unlimited. Approved for public release; distribution is Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-C-48483C W 999990b 2003020 8T4 = . MIL-1-45607 - Inspection Equipment; Acquisition, Maintenance, and Disposition of STANDARDS MILITARY M
7、IL-STD-100 - Engineering Drawing Practices MIL-STD-454 - Standard General Requirements for MIL-STD-810 - Environmental Test Methods MIL-STD-2000 - Standard Requirements for Soldered MIL-STD-2073-1 - Procedures for Development and Electronic Equipment Electrical and Electronic Assemblies Application
8、of Packaging Requirements (Unless otherwise indicated, copies of federal and military specifications, standards and handbooks are available from: DODSSP - Customer Service, Standardization Documents Order Desk, 700 Robbins Avenue, Bldg 4D, Philadelphia, PA 19111-5094.) 2.1.2 Other Government documen
9、ts, drawings and publications. The following other Government documents, drawings and publications form a part of this document to the extent specified herein. Unless otherwise specified, the issue shall be those in effect on date of the solicitation. U.S. Army Armament Research Development and Engi
10、neering Center (ARDEC) DRAWINGS 11732530 - Circuit Card Assembly - Comparator, Type 1 (Copies of Government drawings required by contractors in connection with specific acquisition functions should be obtained from the contracting activity or as directed by the contracting activity.) 2.2 Order of pr
11、ecedence. In the event of a conflict between the text of this document and the references cited herein (except for related associated detail specifications, specification sheets or MS standards), the text of this document shall take precedence. Nothing in this document, however, supersedes applicabl
12、e laws and regulations unless a specific exemption has been obtained (See control provisions for additional precedence criteria). 2 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-3. REQUIREMENTS 3.1 Fabrication. The Comparator, Type I circuit card a
13、ssembly, herein referred to as the assembly, shall be manufactured in accordance with Drawing 11732530 and drawings pertaining thereto and, when assembled, shall meet the requirements of this specification (see 4.5.1). 3.1.1 Function. The assembly shall provide the following: a. Compare the computer
14、 power, ammo select, - epsilon and eta signals for correct, predetermined values and provide logic for decoding results of the comparisons. b. General logic signals necessary for illuminating either a card malfunction lamp or a computer OK lamp. 3.1.2 General specifications. (see 4.6.3) 3.1.2.1 Manu
15、facture and inspection. The following provisions of MIL-F-13926 apply: a. Dimensions and tolerances b, Effect of protective coating on dimension (Inorganic c. Part identification and marking d. Workmanship (including applicable portions of type coatings) MIL-STD-2000 and MIL-STD-454, Requirement 9)
16、3.1.2-2 Standards of manufacture. 3.1.2.2.1 Assembly and soldering. The requirements of MIL-STD-2000 shall apply, as a minimum. 3.1.2.2.2 Interchangeability. The assembly shall be manufactured in accordance with the interchangeability requirements as specified in MIL-STD-100. 3.1.3 Ambient condition
17、s. Standard ambient conditions shall be as follows: a. Temperature 730 + 180F b. Relative humidity 50 percent + 30 percent c. Atmospheric pressure 28.5 + 2.0 -3.0 in. Hg. 3.2 First article. When specified in the contract or purchase order (see 6.21, the contractor shall furnish sample units for firs
18、t article inspection and approval (see 4.4). 3.3 Performance. Unless otherwise specified, the assembly shall meet the performance requirements specified herein under standard ambient conditions of 3.1.3. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-
19、,-MIL-C-48483C W 9999906 2003022 677 3.3.1 Computer Al and A2 cards fail comparator logic. (see 4.6.1) 3.3.1.1 Phase 1. With the power sources (items 2.1, 2.2, 2.4 and 2.6 of Table I), lamp loads (items 1.1 and 1.2 of Table I), and interconnections (item 4 of Table I) applied to the assembly; and wi
20、th the items input conditions of Table II established in any item number order, the corresponding lamp illumination conditions shall be specified in Table II. 3.3.1.2 Phase 2. With the power sources (items 2.1, 2.2, 2.4 and 2.6 of Table I), lamp loads (item 1.1 of Table I), and interconnections (ite
21、m 4 of Table I) applied to the assembly and with pins B7 and A23 connected to ground pins A3, B3, the signal source (item 3.2 of Table I) applied and adjusted to +12.469 + 0.005V rms phase 2, and with the signal source (item 3.1 of Table I) applied and: a. With item 3.1 of Table I voltage adjusted t
22、o the nominal center point +2.023 - + 0.005V dc, lamp 1.1 shall extinguish. b. With item 3.1 of Table I voltage increased from the nominal voltage, lamp 1.1 shall illuminate. This change shall occur with item 3.1 voltage adjusted within the outward bound upper limit +2.243 to +2-354V dc. c. With ite
23、m 3.1 of Table I voltage decreased from the outward bound upper limit, lamp 1.1 shall extinguish. This change shall occur with item 3.1 voltage adjusted within the inward bound upper limit range +2.221 to 2.325V dc. d. With item 3.1 of Table I voltage decreased from the inward bound upper limit, lam
24、p 1.1 shall illuminate. This change shall occur with item 3.1 voltage adjusted within the outward bound lower limit range +1.698 to +1.805V dc. J e. With item 3.1 of Table I voltage increased, lamp 1.1 shall extinguish. This change shall occur with item 3.1 voltage adjusted within the inward bound l
25、ower limit range +1.727 to +1.828V dc. 4 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-c flIL-C-48483C m 7999906 2003023 503 MIL-C-48483C (AR) TABU3 I. Loads, power, signals and interconnections. Item Conditions Characteristics Conditions 1. o 1.1
26、1.2 2.0 2.1 2.2 2.3 2.4 2.5 2.6 3. O 3.1 3.2 3.3 3.4 Loads Power sources 24V dc 15V dc 1OV dc 5.250V dc -lOV dc -15V dc Signal sources Selectable : O to 7V dc Selectable : O to 17V dc Selectable : -6 to -14V dc Selectable : o to 5v rms 400 Hz 24V lamp in series with 24V dc (Item 2.1) 24V lamp in ser
27、ies with 24V dc (Item 2.1) Tolerance: +2V dc Rippie: 200-m pp max Current: 500 ma min Tolerance: +0.30V dc Rippie: 20 mV pp max Current: 500 ma min Tolerance: +O.OlOV dc Rippie: 20 hv pp max Current: 500 ma min Tolerance: +0.15V dc or as othe - +1 Hz Phase: 2 Connected between the following pins: Al
28、2(-) and 24V dc (see Item 2.1) Als(-) and 24Vdc (see Item 2.1) Applied between pin( s B16(-) and load lantps Items 1.1 and 1.2 (+) (Al, B1) (+) and (A3, B3) (-1, and between pins as specified and between pins as specified (A30, B30) (+) and Ai3, B13 (-1, and between pins as specified A22(+) and (A3,
29、 B3) (-1, Al7(-) and (A3, B3) (+I, and between pins as specif ied and between pins as specified When specified: A4(-) and (A3, B3) (+), Applied to pin A5(+) with return to pins A3, B3 Applied to pin B9(+) with return to pins (A3,B3) Applied to pin B6 (- with return to pins (A3, B3) Applied to pin A2
30、9 with return to pins (A3, B3) 5 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-TABLJ3 I. Loads, power, signals and interconnections. (Cont) item Conditions Characteristics Conditions 3.5 3.6 3.7 3.8 3.9 3.10 4.0 Selectable : o to 5v rms, Selectable
31、 : o to 5v rms 400 Hz Selectable : o to 5v rms, 400 Hz Selectable : o to 9v rms 400 Hz 30V P-P, 400 HZ (rn) 30V P-P, 400 HZ (W) Inter- connections Tolerances: +O.O05V rms; 21 Hz Phase: 1 (180O out-of- phase with phase 2 in item 3.4) Tolerances : +O.O05V rms, or as otherwise specif ied; +1 Hz Phase:
32、2 Tolerances : +O.OOSV rms; 21 Hz Phase: 1 (180O out-of- phase with phase 2 in item 3.6) Tolerances : +O.O05V rms, or other- wise specified; +1 Hz Phase: 2 Square wave Tolerances : +0.50V; - +1 Hz Phase: 1 Square wave Tolerances : +0.50V; +1 Hz Phase: 2 (1800 out-of- phase with phase 1 in Item 3.9)
33、- - - - - - - - - - Applied to pin A28 with return to pins (A3, B3) Applied to pins B29 with return to pins (A3, B3) Applied to pin E26 with return to pins (A3, B3) Applied to pin A2 with return to pins (A3, B3) Applied to pin A20 with return to pins (A3, B3) Applied to pin B20 with return to pins (
34、A3, B3) interconnections of the following pins: Pin A5 With Pins A6, B5 B4, and B2 Pins A3, B3, with pins Al3, B13, and B8 6 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-; -4 01 O rl k O u (d k (d o u 4 -4 (d w o a k (d u N 4 a c (d 4 k a, ci 1 E
35、O u 7 H H w GI 4 !a a rn c -rl pi c, (d rn c O -4 c, -4 a c O U c, 3 a c H MIL-C-48483C 9999906 2003025 386 D X wl 4 z m O O O . +I O O O m . m O O O +I m w w N . F Ln O O O +I m N O N 7 O - I I X (d E O O O . 7 m O O O +I 0-l W w N 7 Ln O O O +I m N O N 7 O N I X m O O O +I O O O m m O O O +I m W w
36、 N 7 X E a m W F F O m 4 z I 4 z ln O O O . +I 0-l W Cu X E a cn w 7 4 z F w I 4 z m O O O +I O O O m m O O O +I m w w N . 7 m O O O +I m N O N . O O m X I m O O O . +I O O O m X E cn N m . F 7 X (d E o3 m w 7 - O CD I 4 z m O O O . +I O O O m X (d E m N m 7 7 X (u E CO m ul 7 7 P mm rn fl) E E3 a,a
37、,(d ciu u H CI -4 -rl 7 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-3.3.1.3 Phase 3. With the power sources (items 2.1, 2.2, 2.4 and 2.6 of Table I), lamp load (item 1.2 of Table I), and interconnections (item 4 of Table I) applied to the assembl
38、y and with pins B7 and A23 connected to ground pins A3, B3, item 3.1 of Table I applied and adjusted to +2.023 + 0.005V dc, item 3.8 of Table I applied and adjusted to 5.000 - +-O.O05V rms phase 2, and with item 3.2 of Table I applied and: a. With item 3.2 of Table I voltage adjusted to the nominal
39、center point of +12.496 - + 0.005V dc, lamp 1.2 shall be extinguished. b. With item 3.2 of Table I voltage increased from the nominal voltage, lamp 1.2 shall be illuminated. This change shall occur with item 3.2 voltage adjusted within the outward bound upper limit range +13.102 to +13.439V dc. c. W
40、ith item 3.2 of Table I voltage decreased from the outward bound upper limit, lamp 1.2 shall be extinguished. This change shall occur with voltage adjusted within the inward bound upper limit range +13.043 to +13.361V dc. inward bound upper limit, lamp 1.2 shall be illuminated. This change shall occ
41、ur with item 3.2 voltage adjusted within the outward bound lower limit range +11.529 to +11.835V dc. d. With item 3.2 of Table I voltage decreased from the e. With item 3.2 of Table I voltage increased from the outward bound lower limit, lamp 1.2 shall be extinguished. This change shall occur with i
42、tem 3.2 voltage adjusted within the inward bound lower limit range +11.604 to +11.895V dc. 3.3.2 Computer -lOV comparator logic. With the power sources (items 2.2, 2.3, 2.4 and 2.6 of Table I), interconnections (item 4 of Table I), and the signal source (item 3.8 of Table I) applied to the assembly
43、and adjusted to 5.000 - + 0.005V rms phase 2 and: (see 4.6.1.2) a. With the input signal source item 3.3 of Table I applied at the value -10.000 + 0.01OV dc, nominal voltage, the output level at pin B27 shall-be at logic level one, 5.0 +0.5/-2.6V dc, measured with respect to pins A13, B13. b. With a
44、 decrease in the input signal item 3.3 of Table I from the nominal voltage, the output level at pin B27 shall change to logic level zero, 0.0 + 0.5V dc. The input signal voltage item 3.3 of Table I shal fall within the outward bound lower limit range -10.201 - + 0.049V dc. c. With an increase in the
45、 input signal voltage item 3.3 of Table I from the outward bound lower limit, the output 8 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-C-48483C m 9999906 2003027 159 m level at pin B27 shall change to logic level one, 5.0 +0.5/-2.6 V dc. The
46、input signal voltage item 3.3 of Table I shall fall within the inward bound lower limit range -10.182 + 0.047V dc. - d. With an increase in the input signal voltage item 3.3 of Table I from the inward bound lower limit, the output level at pin B27 shall change to logic level zero, 0.0 +0.5/-2.6V dc.
47、 The input signal voltage item 3.3 of Table I shall fall within the outward bound upper limit range -9.797 - + 0.049V dc. of Table I from the outward bound upper limit, the output level at pin B27 shall change to logic level one, 5.0 +OS5/-2.6V dc. The input signal voltage item 3.3 of Table I shall
48、fall within the inward bound upper limit range -9.816 - + 0.047V dc. e. With a decrease in the input signal voltage item 3.3 3.3.3 AC Ref 2 (comp) comparator. With the power sources (items 2.2, 2.3, 2.4 and 2.6 of Table I), interconnections (item 4 of Table I), and the signal source (item 3.3 of Tab
49、le I) applied to the assembly and adjusted to -10.000 - + 0.01OV dc and: (see 4.6.1.3) a. With the signal source item 3.8 of Table I applied at the value +5.000 + 0.005V rms phase 2, the output level at pin B27 shall be at logic-level one, 5.0 +0.5/-2.6V dc, measured with respect to pins A13, B13, 5.0. b. With the signal source item 3.8 of Table I applied at the value +9.000 + 0.005V rms phase 2, the o
