1、BRITISH STANDARD BS EN 190108:1994 Incorporating Amendment Nos. 1 and 2 Specification for Harmonized system of quality assessment for electronic components Familyspecification TTL advanced SCHOTTKY digital integrated circuits Series 54 AS, 74 AS The European Standard EN 190108 has the status of a Br
2、itish StandardBSEN190108:1994 BSI 04-2000 ISBN 0 580 35808 9 Amendments issued since publication Amd. No. Date of issue Comments 8120 February 1994 8374 September 1994 Indicated by a sideline in the marginBSEN190108:1994 BSI 04-2000 i Contents Page National foreword ii Foreword 2 Foreword iii Text o
3、f CECC 190108 1BSEN190108:1994 ii BSI 04-2000 National foreword This British Standard has been prepared under the direction of the Electronic Components Standards Committee. It is identical with CENELEC Electronic Components Committee (CECC) 90108:1987 “Harmonized system of quality assessment for el
4、ectronic components. Family specification: TTL advanced SCHOTTKY digital integrated circuits”. In 1994 the CENELEC Electronic Components Committee (CECC) accepted CECC90108:1987 with Amendment1 as European Standard EN190108:1994. This standard is a harmonized specification within the CECC System. Th
5、is standard supersedes BS CECC90108:1986 which is withdrawn. Terminology and conventions. The text of the CECC specification has been approved as suitable for publication as a British Standard without deviation. Some terminology and certain conventions are not identical with those used in British St
6、andards; attention is drawn especially to the following. The comma has been used as a decimal marker. In British Standards it is current practice to use a full point on the baseline as the decimal marker. Cross-references. The British Standard which implements CECC00100 is BS9000: “General requireme
7、nts for a system for electronic components of assessed quality” Part 2:1983 “Specification for national implementation of CECC basic rules and rules of procedure”. The Technical Committee has reviewed the provisions of IEC747, IEC748 and IEC749, to which reference is made in the text, and has decide
8、d that they are acceptable for use in conjunction with this standard. Scope. This standard lists the ratings, characteristics and inspection requirements which shall be included as mandatory requirements in accordance with BS CECC90100 in any detail specification for these devices. Detail specificat
9、ion layout. The front page layout of detail specifications released to BS CECC family or blank detail specification will be in accordance with BS9000 Circular Letter No.15. International Standards a Corresponding British Standards IEC 68-2-30:1980 BS 2011 Basic environmental testing procedures Part2
10、.1 Db:1981 Test Db and guidance: Damp heat, cyclic (12+12 hour cycle) (Identical) CECC 90000:1985 BS CECC 90000:1985 Harmonized system of quality assessment for electronic components. Generic specification: Monolithic integrated circuits (Identical) CECC 90100:1986 BS CECC 90100:1986 Harmonized syst
11、em of quality assessment for electronic components: Sectional specification: Digital monolithic integrated circuits (Identical) a Undated in text.BSEN190108:1994 BSI 04-2000 iii A British Standard does not purport to include all the necessary provisions of a contract. Users of British Standards are
12、responsible for their correct application. Compliance with a British Standard does not of itself confer immunity from legal obligations. Summary of pages This document comprises a front cover, an inside front cover, pagesi to iv, theENtitle page, page 2, the CECC title page, pages ii to iv, pages1 t
13、o6 and aback cover. This standard has been updated (see copyright date) and may have had amendments incorporated. This will be indicated in the amendment table on the inside front cover.iv blankEUROPEAN STANDARD NORME EUROPENNE EUROPISCHE NORM EN190108 May1994 UDC Supersedes CECC 90108 Issue 2:1987
14、Descriptors: Quality, electronic components, TTL advanced Schottky digital integrated circuits English version Family Specification: TTL Advanced Schottky Digital Integrated Circuits Series54AS, 74AS Spcification de famille: Circuitsintgrslogiques TTL Schottkyavance Sries 54AS, 74AS Familienspezifik
15、ation: DigitaleintegrierteTTLAdvanced Schottky-Schaltungen Serien 54AS, 74AS This European Standard was approved by the CENELEC Electronic Components Committee (CECC) on8 May1994. CENELEC members are bound to comply with CEN/CENELEC Internal Regulations which stipulate the conditions for giving this
16、 European Standard the status of a national standard without any alteration. Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the General Secretariat of the CECC or to any CENELEC member. This European Standard exists in three offic
17、ial versions (English, French, German). A version in any other language made by translation under the responsibility of a CENELEC member into its own language and notified to the CECC General Secretariat has the same status as the official versions. CENELEC members are the national electrotechnical
18、committees of Austria, Belgium, Denmark, Finland, France, Germany, Greece, Iceland, Ireland, Italy, Luxembourg, Netherlands, Norway, Portugal, Spain, Sweden, Switzerland, and UnitedKingdom. The membership of the CECC is identical, with the exception of the national electrotechnical committees of Gre
19、ece, Iceland and Luxembourg. CECC European Committee for Electrotechnical Standardization Comit Europen de Normalisation Electrotechnique Europisches Komitee fr Elektrotechnische Normung Central Secretariat: rue de Stassart 35, B-1050 Brussels 1994 Copyright reserved to CENELEC members Ref. No. EN19
20、0108:1994 EEN190108:1994 BSI 04-2000 2 Foreword The CENELEC Electronic Components Committee (CECC) is composed of those member countries of the European Committee for Electrotechnical Standardization (CENELEC) who wish to take part in a harmonized System for electronic components of assessed quality
21、. The object of the System is to facilitate international trade by the harmonization of the specifications and quality assessment procedures for electronic components, and by the grant of an internationally recognized Mark, or Certificate, of Conformity. The components produced under the System are
22、thereby acceptable in all member countries without further testing. This European Standard was prepared by CECCWG9, “Integrated Circuits”. The text of the draft based on document CECC90108 Issue 2:1987 (with A1) was submitted to the formal vote for conversion to a European Standard; together with th
23、e voting report, circulated as document CECC(Secretariat)3544 it was approved by CECC as EN190108 on8May1994. The following dates were fixed: latest date of announcement of the ENatnational level (doa) 1994-09-01 latest date of publication ofan identical nationalstandard a (dop) 1995-03-01 latest da
24、te of withdrawal ofconflicting nationalstandards a (dow) 1996-03-01 a National Standard (excluding National implementation of IECQ Specifications)EN190108:1994 ii BSI 04-2000 Contents Page Foreword iii 1 Limiting conditions of use for the family 1 2 Recommended operating conditions and associated ch
25、aracteristics for the family 1 3 Test methods and procedures 2 4 Inspection requirements 6 Figure 1 Diagram for switching parameters 3 Figure 2 Signal waveform at the input of the component under test 3EN190108:1994 BSI 04-2000 iii Foreword The CENELEC Electronic Components Committee (CECC) is compo
26、sed of those member countries of the European Committee for Electrotechnical Standardization (CENELEC) who wish to take part in a harmonized System for electronic components of assessed quality. The object of the System is to facilitate international trade by the harmonization of the specifications
27、and quality assessment procedures for electronic components, and by the grant of an internationally recognized Mark, or Certificate, of Conformity. The components produced under the System are thereby accepted by all member countries without further testing. This specification has been formally appr
28、oved by the CECC, and has been prepared for those countries taking part in the System who wish to issue national harmonized specifications for TTL ADVANCED SCHOTTKY DIGITAL INTEGRATED CIRCUITS. It should be read in conjunction with the current regulation for the CECC System. At the date of printing
29、of this specification the member countries of the CECC are Austria, Belgium, Denmark, Finland, France, Germany, Ireland, Italy, theNetherlands, Norway, Portugal, Spain, Sweden, Switzerland, and the UnitedKingdom. Preface This Family Detail Specification was prepared by CECC WG9 “INTEGRATED CIRCUITS”
30、. It is based, wherever possible, on the Publications of the International Electrotechnical Commission and in particular on IEC747: Semiconductor devices: Discrete devices and integrated circuits, IEC748: Semiconductor devices: Integrated circuits, IEC749: Semiconductor devices: Mechanical and clima
31、tic test methods. It contains general information on TTL Advanced Schottky digital integrated circuits and defines the common characteristics for this family of integrated circuits. Together with the device type detail specification (DS) of a component usually prepared nationally, this family detail
32、 specification forms a complete detail specification. The text of this second issue consists of the text of CECC90108 Issue1 (1985) amended in accordance with the ratified new material introduced by the following document. In accordance with the decision of the CECC Management Committee this specifi
33、cation is published initially in French and English. The German text will follow as soon as it has been prepared. Effective date This second Issue of CECC90108 shall become effective for all new qualification approvals on1 April1987. Issue1 will continue to remain effective to cover all past approva
34、ls. Document Date of Voting Report on the Voting CECC(Secretariat)1970 October 1986 CECC(Secretariat)2014EN190108:1994 iv BSI 04-2000EN190108:1994 BSI 04-2000 1 1 Limiting conditions of use for the family (Not for inspection purposes) 1.1 Maximum continuous supply voltage 1.2 Maximum input voltage 1
35、.2.1 Max. input voltage 1.2.2 Max. input voltage between multiple emitter transistor inputs V II : + 5,5 V 1.3 Minimum and maximum operating ambient temperatures 1.4 Minimum and maximum storage temperatures 2 Recommended operating conditions and associated characteristics for the family (Not for ins
36、pection purposes) (See also relevant DS) These conditions apply to the total operating temperature range, unless otherwise prescribed. 2.1 Positive supply voltage V CC : 4,5 to 5,5 V 2.2 Most negative low level input voltage at an input current I IK= 18 mA V IKB : 1,2 V 2.3 Minimum low level input v
37、oltage V ILB : 0 V 2.4 Maximum low level input voltage V ILA : 0,8 V 2.5 Minimum high level input voltage V IHB : 2 V 2.6 Maximum high level input voltage 2.7 Load factors 2.7.1 Unit load current 1) At low level voltage: 0,5 mA 2) At high level voltage: 20 A V CC : 0,5 V + 7,0 V V I : 0,5 V + 7,0 V
38、T amb ( C) 54 AS 74 AS min. 55 0 max. + 125 + 70 T stg :65 C min. (unless otherwise specified in the DS) + 150 C max. V IHA : 5,5 V 7,0 V (for inputs which are not I/O Ports) EN190108:1994 2 BSI 04-2000 2.7.2 Input load factor (fan-in) 2.7.3 Output loading capability (fan-out) 2.8 Most positive low
39、level output voltage at an output current of0,5 mA the higher output loading capability (unless otherwise prescribed in the DS) V OLA : 0,5 V 2.9 Most negative high level output voltage at an output current of 20A the higher output loading capability 2.10 Most positive high level output voltage V OH
40、A : 5,5 V 2.11 DC noise margin at low level (V ILA V OLA ) V NL : 0,3 V 2.12 DC noise margin at high level (V OHB V IHB ) 3 Test methods and procedures 3.1 Dynamic characteristics Unless otherwise prescribed in the relevant DS, the following dynamic measurement conditions are applicable. 3.1.1 Gener
41、al diagram Measurements of dynamic characteristics are performed in accordance with the general diagram of Figure 1. 1) At low level input voltage (see DS for the relevant input) 2) At high level input voltage 1) At low level output voltage (see DS for the relevant output) 2) At high level output vo
42、ltage V OHB : 2,5 V (standard outputs) 2,4 V (buffer outputs) 2 V (bus driver outputs) V NH : 0,5 V (standard outputs) 0,4 V (buffer outputs) 0 V (bus driver outputs) EN190108:1994 BSI 04-2000 3 NOTE 1The inductances of the connections and of the components used, and the impedance of the continuous
43、sources shall be so low as to make the error negligible. NOTE 2One or more pulse generators can be used according to the measurement to be performed. 3.1.2 Pulse generator and driving circuit The following conditions shall be met: output impedance of pulse generator: 507 10% impedance of the driving
44、 circuit cable from the generator, including the test equipment: 507 10% Signal applied to the inputs of the component under test (seeFigure 2). Low level input voltage: 0,3 V 0,1 V High level input voltage: 3,5 V 0,2 V Rise time of the input signal: t r= 2 ns 0,2 ns (measured from10% to90% of the s
45、tep amplitude) Fall time of the input signal: t f= 2 ns 0,2 ns (measured from90% to10% of the step amplitude) Pulse width: t W= 0,5s Pulse repetition frequency: u 1MHz Figure 1 Diagram for switching parameters Figure 2 Signal waveform at the input of the component under testEN190108:1994 4 BSI 04-20
46、00 3.1.3 Component under test load circuit: (see3.1.4) not tested input(s) of the component under test are biased according to the characteristics to be tested (see DS) power supply V CC= 4,5 V to 5,5 V for multiple devices the inputs of circuit(s) not under test shall be left unconnected reference
47、point for time measurements shall be taken at the voltage of1,3V 3.1.4 Load circuit in accordance withFigure 1 (see3.1.1) the capacitors and the resistors include probe and jig capacitance and resistance the DS prescribes the load circuit(s) A Load circuit for totem pole outputs NOTER 1and C 1values
48、 can be different from the values given above. In this case see DS. B Load circuit for open-collector outputs Standard outputs Buffer outputs R 1(7) * * C 1(pF) * * NOTER 1and C 1can be different from values given in the above table. In this case see DS. * Under consideration C Load circuit for thre
49、e-state outputsEN190108:1994 BSI 04-2000 5 3.2 Conditions for the electrical endurance tests See SS/4.2.2. Unless otherwise specified in the relevant DS, the inputs are biased for the highest I CC . Maximum output loading capability is applied (I OHor I OLaccording to high or low level conditions). If the temperature limits of the device are exceeded, the DS shall prescribe the relevant test conditions (seeSS/4.2). Parameter S t PHL O t PLH O t PZL C O: Open t PZH O
