BS EN 62137-2004 Environmental and endurance testing - Test methods for surface-mount boards of area array type packages FBGA BGA FLGA LGA SON and QFN《环境和耐用试验 区域阵列式包装件表面安装板的试验方法FBG.pdf

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1、BRITISH STANDARD BS EN 62137:2004 Incorporating Corrigendum No.1 Environmental and endurance testing Test methods for surface-mount boards of area array type packages FBGA, BGA, FLGA, LGA, SON and QFN The European Standard EN 62137:2004 has the status of a British Standard ICS 31.190 Licensed Copy:

2、Wang Bin, na, Fri Aug 05 08:22:47 BST 2005, Uncontrolled Copy, (c) BSIBS EN 62137:2004 This British Standard was published under the authority of the Standards Policy and Strategy Committee on 22 September 2004 BSI 13 May 2005 ISBN 0 580 44505 4 National foreword This British Standard is the officia

3、l English language version of EN 62137:2004, including corrigendum February 2005. It is identical with IEC 62137:2004, including corrigendum January 2005. The UK participation in its preparation was entrusted to Technical Committee EPL/501, Electronic assembly technology, which has the responsibilit

4、y to: A list of organizations represented on this committee can be obtained on request to its secretary. Cross-references The British Standards which implement international or European publications referred to in this document may be found in the BSI Catalogue under the section entitled “Internatio

5、nal Standards Correspondence Index”, or by using the “Search” facility of the BSI Electronic Catalogue or of British Standards Online. This publication does not purport to include all the necessary provisions of a contract. Users are responsible for its correct application. Compliance with a British

6、 Standard does not of itself confer immunity from legal obligations. aid enquirers to understand the text; present to the responsible international/European committee any enquiries on the interpretation, or proposals for change, and keep the UK interests informed; monitor related international and E

7、uropean developments and promulgate them in the UK. Summary of pages This document comprises a front cover, an inside front cover, the EN title page, pages 2 to 26, an inside back cover and a back cover. The BSI copyright notice displayed in this document indicates when the document was last issued.

8、 Amendments issued since publication Amd. No. Date Comments 15607 Corrigendum No. 1 13 May 2005 Changes to Clause 2, Clauses A.2.4.4 and A.3.4.1, Figure A.5 table, Table B2, Annex ZA and Bibliography Licensed Copy: Wang Bin, na, Fri Aug 05 08:22:47 BST 2005, Uncontrolled Copy, (c) BSIEUROPEAN STANDA

9、RD EN 62137 NORME EUROPENNE EUROPISCHE NORM August 2004 CENELEC European Committee for Electrotechnical Standardization Comit Europen de Normalisation Electrotechnique Europisches Komitee fr Elektrotechnische Normung Central Secretariat: rue de Stassart 35, B - 1050 Brussels 2004 CENELEC - All right

10、s of exploitation in any form and by any means reserved worldwide for CENELEC members. Ref. No. EN 62137:2004 E ICS 31.190 Incorporates Corrigendum February 2005English version Environmental and endurance testing - Test methods for surface-mount boards of area array type packages FBGA, BGA, FLGA, LG

11、A, SON and QFN (IEC 62137:2004) Essais denvironnement et dendurance Mthodes dessai pour les cartes montage en surface de botiers de type matriciel FBGA, BGA, FLGA, LGA, SON et QFN (CEI 62137:2004) Umwelt- und Dauerprfung - Prfverfahren fr in Oberflchenmontagetechnik bestckte Leiterplatten mit Area-A

12、rray- Bauelementen der Bauformen FBGA, BGA, FLGA, LGA, SON und QFN (IEC 62137:2004) This European Standard was approved by CENELEC on 2004-07-01. CENELEC members are bound to comply with the CEN/CENELEC Internal Regulations which stipulate the conditions for giving this European Standard the status

13、of a national standard without any alteration. Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the Central Secretariat or to any CENELEC member. This European Standard exists in three official versions (English, French, German). A

14、version in any other language made by translation under the responsibility of a CENELEC member into its own language and notified to the Central Secretariat has the same status as the official versions. CENELEC members are the national electrotechnical committees of Austria, Belgium, Cyprus, Czech R

15、epublic, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, Netherlands, Norway, Poland, Portugal, Slovakia, Slovenia, Spain, Sweden, Switzerland and United Kingdom. Licensed Copy: Wang Bin, na, Fri Aug 05 08:22:47 BST 2005, Un

16、controlled Copy, (c) BSIForeword The text of document 91/444/FDIS, future edition 1 of IEC 62137, prepared by IEC TC 91, Electronics assembly technology, was submitted to the IEC-CENELEC parallel vote and was approved by CENELEC as EN 62137 on 2004-07-01. The following dates were fixed: latest date

17、by which the EN has to be implemented at national level by publication of an identical national standard or by endorsement (dop) 2005-04-01 latest date by which the national standards conflicting with the EN have to be withdrawn (dow) 2007-07-01 Annex ZA has been added by CENELEC. The contents of th

18、e corrigendum of February 2005 have been included in this copy. _ Endorsement notice The text of the International Standard IEC 62137:2004 was approved by CENELEC as a European Standard without any modification. In the official version, for Bibliography, the following notes have to be added for the

19、standards indicated: IEC 60068-2-44 NOTE Harmonized as EN 60068-2-44:1995 (not modified). IEC 60749-1 NOTE Harmonized as EN 60749-1:2003 (not modified). IEC 60749-20 NOTE Harmonized as EN 60749-20:2003 (not modified). IEC 61189-3 NOTE Harmonized as EN 61189-3:1997 (not modified). IEC 61760-1 NOTE Ha

20、rmonized as EN 61760-1:1998 (not modified). IEC 61190-1-1 NOTE Harmonized as EN 61190-1-1:2002 (not modified). IEC 61190-1-2 NOTE Harmonized as EN 61190-1-2:2002 (not modified). IEC 61190-1-3 NOTE Harmonized as EN 61190-1-3:2002 (not modified). _ Page2 EN62137:2004Licensed Copy: Wang Bin, na, Fri Au

21、g 05 08:22:47 BST 2005, Uncontrolled Copy, (c) BSICONTENTS 1 Scope.4 2 Normative references .4 3 Terms and definitions .4 4 Abbreviations .5 5 Solder joint quality test methods.5 5.1 Reflow solderability test for solder joint .5 5.2 Reserved for future use.7 6 Mechanical test methods 8 6.1 Bending t

22、est for solder joint.8 6.2 Drop test for solder joint 8 7 Environment test methods 8 7.1 Temperature cycling test for solder joint8 7.2 Reserved for future use.11 Annex A (informative) Informative test methods for test board Guidance.12 Annex B (informative) Standard mounting process for area array

23、type packages and peripheral terminal type packages (QFN and SON).22 Annex ZA (normative) Normative references to international publications with their corresponding European publications .24 Bibliography25 Figure 1 Temperature measurement of the specimen using thermocouples6 Figure 2 Moistening/ref

24、low process cycle proposed .7 Figure 3 Reflow profile.7 Figure 4 Configuration of one cycle period.9 Figure A.1 Temperature measurement of the specimen using thermocouples 13 Figure A.2 Temperature measurement of the specimen using thermocouples 15 Figure A.3 Measuring methods for peel strength 17 F

25、igure A.4 Standard land shape of the mount reliability test board.20 Figure A.5 Design standard for land shape of packages of peripheral terminal type SON and QFN.21 Table 1 Temperature cycling test conditions 10 Table A.1 Types of mount reliability test board.19 Table A.2 Standard mount reliability

26、 test board layer configuration 20 Table A.3 Design guideline for land size of packages of area array ball/land type BGA, FBGA, LGA, and FLGA20 Table B.1 Stencil design standard for area array terminal type packages.22 Table B.2 Stencil design standard for peripheral terminal type packages .22 Page3

27、 EN62137:2004Licensed Copy: Wang Bin, na, Fri Aug 05 08:22:47 BST 2005, Uncontrolled Copy, (c) BSI ENVIRONMENTAL AND ENDURANCE TESTING TEST METHODS FOR SURFACE-MOUNT BOARDS OF AREA ARRAY TYPE PACKAGES FBGA, BGA, FLGA, LGA, SON AND QFN 1 Scope This International Standard specifies the test method and

28、 guidelines for evaluating the quality and reliability of boards, solder lands, solder process and solder joints of reflow solder mounted area array type packages and peripheral terminal type packages. This standard tests for durability against mechanical and thermal stress received during or after

29、the mounting process of discrete semiconductor devices and of integrated circuits (hereinafter both referred to as semiconductor devices) used mainly for industrial and consumer use equipment. The test method specified in this standard is an integrated one by including the evaluation method of mount

30、ing methods, mounting conditions, printed circuit boards, soldering materials, and so on. It does not specify the evaluation method of the individual semiconductor devices. Mounting conditions, printed wiring boards, soldering materials, and so on significantly affect the result of the test specifie

31、d in this standard. Therefore, the test specified in this standard shall not be regarded as the one to be used to guarantee the mounting reliability of the semiconductor devices. The test method is not necessary if there is no stress (mechanical or others) from any of the tests covered in this stand

32、ard. 2 Normative references The following referenced documents are indispensable for the application of this document. For dated references, only the edition cited applies. For undated references, the latest edition of the referenced document (including any amendments) applies. IEC 60068-1:1988, Env

33、ironmental testing Part 1: General and guidance IEC 60191-6-2:2001, Mechanical standardization of semiconductor devices Part 6-2: General rules for the preparation of outline drawings of surface mounted semiconductor device packages Design guide for 1,50 mm, 1,27 mm and 1,00 mm pitch ball and column

34、 terminal packages IEC 60191-6-5:2001, Mechanical standardization of semiconductor devices Part 6-5: General rules for the preparation of outline drawings of surface mounted semiconductor device packages Design guide for fine-pitch ball grid array (FBGA) JEITA 1ETR-7001:1998, Terms and definitions f

35、or surface mount technology 3 Terms and definitions For the purposes of this document, the terms and definitions for BGA, FBGA and so on, are referred to in IEC 60191-6-2 and IEC 60191-6-5. _ 1Japan Electronics and Information Technology Industries Association. Page4 EN62137:2004Licensed Copy: Wang

36、Bin, na, Fri Aug 05 08:22:47 BST 2005, Uncontrolled Copy, (c) BSI4 Abbreviations FBGA fine-pitch ball grid array BGA ball grid array FLGA fine-pitch land grid array LGA land grid array SON small outline non-leaded package QFN quad flat-pack non-leaded package 5 Solder joint quality test methods 5.1

37、Reflow solderability test for solder joint 5.1.1 Purpose This test method specifies the reflow solderability test for the solder joint, as part of the specification in the standard. It is used to evaluate the solderability of reflow soldering of area-array type packages and peripheral terminal type

38、packages (QFN and SON). 5.1.2 Test specimen The test specimen shall satisfy the following conditions: a) test board design (see Clause A.4); b) standard mounting process (see Annex B); c) resistance to reflow soldering (see Clause A.1), solderability test for test board land (see Clause A.2) and pee

39、l test method for test board land (see Clause A.3). 5.1.3 Test apparatus The test apparatus shall include the following: a) Oven The oven shall maintain the temperature specified in 5.1.4.2. b) Moistening equipment The humidifier shall maintain the temperature and humidity specified in 5.1.4.2. No r

40、eaction shall occur to the material of the oven at high temperatures. The water used for the test shall be purified water or deionized water, with pH 6,0 to pH 7,2 at 23 C, and with a resistivity of 500 m or higher. c) Infrared reflow/air reflow furnace The infrared reflow/air reflow furnace shall m

41、eet the heating process conditions specified in 5.1.4.4. 5.1.4 Test procedure 5.1.4.1 Initial measurement The initial measurement shall be carried out according to the items and conditions specified in the individual standard. 5.1.4.2 Moisture treatment The moisture treatment is desirable for the te

42、st because a soldering defect may occur with moisture. “Defect of soldering” is defined in ETR-7001 as general failure of soldering. Page5 EN62137:2004Licensed Copy: Wang Bin, na, Fri Aug 05 08:22:47 BST 2005, Uncontrolled Copy, (c) BSIa) Pre-treatment Unless otherwise specified in the individual st

43、andard, the specimen subject to the moistening reflow pre-treatment in b) shall be baked in the oven at (125 5) C for 24 h or more. b) Moistening process (1) The specimen shall be moistened as specified in the individual standard. If there is no such specification mentioned in the individual standar

44、d, the specimen shall be subject to the moistening condition at 30 C, with a relative humidity of 70 % for 96 h. c) Moistening process (2) When the specimen is subjected to the reflow process twice, the specimen reflow soldered on the test board shall be moistened once again under the moistening con

45、dition as specified in the individual standard. In this case, by taking into consideration the moistening reflow characteristic of the test board, it is desirable to set both the moisture soaking conditions and the moistening time for the repeat version of the test. In general, it is desirable to se

46、t the moistening condition to 30 C, with a relative humidity of 70 %, or to 30 C, with a relative humidity of 85 % up to 165 h maximum. 5.1.4.3 Test conditions a) Reflow profile measurement The infrared reflow/air reflow furnace shall meet the heating process conditions specified in Figure 3. The te

47、mperature of the specimen shall be measured at measurement Point A (the centre on the top of the package) and measurement point B (the soldered inner part of the terminal), shown in Figure 1. Figure 1 Temperature measurement of the specimen using thermocouples b) Test process. The board to be tested

48、 shall carry out the evaluation under similar conditions to that of the actual usage of the board. A proposal is shown in Figure 2. Solder ball Measurement point A Measurement point B Thermocouple Adhesives Mold resin Board IEC 630/04 Page6 EN62137:2004Licensed Copy: Wang Bin, na, Fri Aug 05 08:22:4

49、7 BST 2005, Uncontrolled Copy, (c) BSI Pre-treatment at (125 5) C for 24 h or more Moistening process at 30 C, RH 70 % x hour Reflow process Moistening process at 30 C, RH 70 % x hour Reflow process IEC 631/04 Figure 2 Moistening/reflow process cycle proposed 5.1.4.4 Reflow heating Mount the specimen on the mount reliability test board on which the solder paste has been printed as described

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