1、BSI Standards PublicationIP-XACT, Standard Structure for Packaging, Integrating, and Reusing IP within Tool FlowsBS IEC 62014-4:2015National forewordThis British Standard is the UK implementation of IEC 62014-4:2015.The UK participation in its preparation was entrusted to TechnicalCommittee EPL/501,
2、 Electronic Assembly Technology.A list of organizations represented on this committee can be obtained onrequest to its secretary.This publication does not purport to include all the necessary provisions ofa contract. Users are responsible for its correct application. The British Standards Institutio
3、n 2015.Published by BSI Standards Limited 2015ISBN 978 0 580 89378 0ICS 25.040Compliance with a British Standard cannot confer immunity fromlegal obligations.This British Standard was published under the authority of theStandards Policy and Strategy Committee on 30 April 2015.Amendments/corrigenda i
4、ssued since publicationDate Text affectedBRITISH STANDARDBS IEC 62014-4:2015IEC 62014-4 Edition 1.0 2015-03 INTERNATIONAL STANDARD IP-XACT, Standard Structure for Packaging, Integrating, and Reusing IP within Tool Flows INTERNATIONAL ELECTROTECHNICAL COMMISSION ICS 25.040 ISBN 978-2-8322-2265-2 Warn
5、ing! Make sure that you obtained this publication from an authorized distributor. IEEE Std 1685-2009 Registered trademark of the International Electrotechnical Commission BS IEC 62014-4:2015Copyright 2010 IEEE. All rights reserved. ixContents1. Overview 11.1 Scope 11.2 Purpose. 21.3 Design environme
6、nt. 21.4 IP-XACT Enabled implementations 61.5 Conventions used. 71.6 Use of color in this standard 121.7 Contents of this standard 122. Normative references. 133. Definitions, acronyms, and abbreviations 153.1 Definitions . 153.2 Acronyms and abbreviations . 214. Interoperability use model . 234.1 R
7、oles and responsibilities 234.2 IP-XACT IP exchange flows . 245. Interface definition descriptions 275.1 Definition descriptions. 275.2 Bus definition. 275.3 Abstraction definition 305.4 Ports . 315.5 Wire ports 325.6 Qualifiers . 345.7 Wire port group 365.8 Wire port mode constraints 385.9 Wire por
8、t mirrored-mode constraints 395.10 Transactional ports. 415.11 Transactional port group 435.12 Extending bus and abstraction definitions . 445.13 Clock and reset handling 476. Component descriptions 496.1 Component. 496.2 Interfaces 526.3 Interface interconnections 526.4 Complex interface interconne
9、ctions 546.5 Bus interfaces. 566.6 Component channels 676.7 Address spaces. 696.8 Memory maps 816.9 Remapping . 976.10 Registers. 1026.11 Models . 1206.12 Component generators . 1516.13 File sets 1536.14 Choices. 165Published by IEC under license from IEEE. 2009 IEEE. All rights reserved. IEC 62014-
10、4 IEEE Std 1685-2009iBS IEC 62014-4:2015x Copyright 2010 IEEE. All rights reserved.6.15 White box elements . 1676.16 White box element reference . 1686.17 CPUs 1707. Design descriptions 1717.1 Design 1717.2 Design component instances 1737.3 Design interconnections. 1757.4 Active, monitored, and moni
11、tor interfaces 1767.5 Design ad hoc connections 1787.6 Design hierarchical connections 1808. Abstractor descriptions 1838.1 Abstractor. 1838.2 Abstractor interfaces 1858.3 Abstractor models 1878.4 Abstractor views 1898.5 Abstractor ports 1918.6 Abstractor wire ports . 1938.7 Abstractor generators. 1
12、959. Generator chain descriptions . 1999.1 generatorChain. 1999.2 generatorChainSelector 2019.3 generatorChain component selector. 2029.4 generatorChain generator. 20310. Design configuration descriptions . 20710.1 Design configuration 20710.2 designConfiguration. 20710.3 generatorChainConfiguration
13、 20910.4 interconnectionConfiguration 21111. Addressing and data visibility 21311.1 Calculating the bit address of a bit in a memory map . 21311.2 Calculating the bus address at the slave bus interface . 21411.3 Address modifications of an interconnection 21411.4 Address modifications of a channel.
14、21511.5 Addressing in the master 21611.6 Visibility of bits . 21611.7 Address translation in a bridge 218Annex A (informative) Bibliography 219Annex B (normative) Semantic consistency rules 221Annex C (normative) Common elements and concepts 245Annex D (normative) Types 263Annex E (normative) Depend
15、ency XPATH 267Published by IEC under license from IEEE. 2009 IEEE. All rights reserved. IEC 62014-4 IEEE Std 1685-2009 iiBS IEC 62014-4:2015Copyright 2010 IEEE. All rights reserved. xiAnnex F (informative) External bus with an internal/digital interface . 271Annex G (normative) Tight generator inter
16、face 273Annex H (informative) Bridges and channels. 351Annex I (informative) IEEE List of Participants. .361 Published by IEC under license from IEEE. 2009 IEEE. All rights reserved. IEC 62014-4 IEEE Std 1685-2009iiiBS IEC 62014-4:2015Published by IEC under license from IEEE. 2009 IEEE. All rights r
17、eserved. IEC 62014-4 IEEE Std 1685-2009 ivBS IEC 62014-4:2015 2 IEC 62014-4 IEEE Std 1685-2009 Published by IEC under license from IEEE. 2009 IEEE. All rights reserved. IP-XACT, STANDARD STRUCTURE FOR PACKAGING, INTEGRATING, AND REUSING IP WITHIN TOOL FLOWS FOREWORD 1) The International Electrotechn
18、ical Commission (IEC) is a worldwide organization for standardization comprising all national electrotechnical committees (IEC National Committees). The object of IEC is to promote international co-operation on all questions concerning standardization in the electrical and electronic fields. To this
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32、 normative references cited in this publication. Use of the referenced publications is indispensable for the correct application of this publication. 9) Attention is drawn to the possibility that implementation of this IEC/IEEE Publication may require use of material covered by patent rights. By pub
33、lication of this standard, no position is taken with respect to the existence or validity of any patent rights in connection therewith. IEC or IEEE shall not be held responsible for identifying Essential Patent Claims for which a license may be required, for conducting inquiries into the legal valid
34、ity or scope of Patent Claims or determining whether any licensing terms or conditions provided in connection with submission of a Letter of Assurance, if any, or in any licensing agreements are reasonable or non-discriminatory. Users of this standard are expressly advised that determination of the
35、validity of any patent rights, and the risk of infringement of such rights, is entirely their own responsibility. Published by IEC under license from IEEE. 2009 IEEE. All rights reserved. IEC 62014-4 IEEE Std 1685-2009vBS IEC 62014-4:2015IEC 62014-4 3 IEEE Std 1685-2009 Published by IEC under licens
36、e from IEEE. 2009 IEEE. All rights reserved. International Standard IEC 62014-4/ IEEE Std 1685-2009 has been processed through IEC technical committee 91: Electronics assembly technology, under the IEC/IEEE Dual Logo Agreement. The text of this standard is based on the following documents: IEEE Std
37、FDIS Report on voting 1685 (2009) 91/1207/FDIS 91/1226/RVD Full information on the voting for the approval of this standard can be found in the report on voting indicated in the above table. The IEC Technical Committee and IEEE Technical Committee have decided that the contents of this publication w
38、ill remain unchanged until the stability date indicated on the IEC web site under “http:/webstore.iec.ch“ in the data related to the specific publication. At this date, the publication will be reconfirmed, withdrawn, replaced by a revised edition, or amended. Published by IEC under license from IEEE
39、. 2009 IEEE. All rights reserved. IEC 62014-4 IEEE Std 1685-2009 viBS IEC 62014-4:2015IEEE Std 1685TM-2009IEEE Standard for IP-XACT, Standard Structure for Packaging, Integrating, and Reusing IP within Tool FlowsSponsor Design Automation Standards Committeeof theIEEE Computer Societyand theIEEE Stan
40、dards Association Corporate Advisory GroupApproved 9 December 2009IEEE SA-Standards BoardPublished by IEC under license from IEEE. 2009 IEEE. All rights reserved. IEC 62014-4 IEEE Std 1685-2009viiBS IEC 62014-4:2015AMBA is a registered trademark of ARM Limited.Design Compiler and VCS are registered
41、trademarks of Synopsys, Inc.SystemC is a registered trademarks of Open SystemC Initiative, Inc. in the United States and other countries. Verilog is a registered trademark of Cadence Design Systems, Inc. in the United States and/or other jurisdictions. W3C is a registered trademark of the World Wide
42、 Web Consortium.XMLSpy is a registered trademark of Altova GmbH in the U.S., the European Union and/or other countries. Grateful acknowledgment is made to The SPIRIT Consortium, Inc., for permission to use thefollowing source material:IP-XACT 1.2 and IP-XACT 1.5Abstract: Conformance checks for eXten
43、sible Markup Language (XML) data designed to describeelectronic systems are formulated by this standard. The meta-data forms that are standardizedinclude: components, systems, bus interfaces and connections, abstractions of those buses, anddetails of the components including address maps, register a
44、nd field descriptions, and file setdescriptions for use in automating design, verification, documentation, and use flows for electronicsystems. A set of XML schemas of the form described by the World Wide Web Consortium (W3C)and a set of semantic consistency rules (SCRs) are included. A generator in
45、terface that is portableacross tool environments is provided. The specified combination of methodology-independentmeta-data and the tool-independent mechanism for accessing that data provides for portability ofdesign data, design methodologies, and environment implementations.Keywords: abstraction d
46、efinitions, address space specification, bus definitions, designenvironment, EDA, electronic design automation, electronic system level, ESL, implementationconstraints, IP-XACT, register transfer level, RTL, SCRs, semantic consistency rules, TGI, tightgenerator interface, tool and data interoperabil
47、ity, use models, XML design meta-data, XMLschemaPublished by IEC under license from IEEE. 2009 IEEE. All rights reserved. IEC 62014-4 IEEE Std 1685-2009 viiiBS IEC 62014-4:2015iv Copyright 2010 IEEE. All rights reserved.I(,ntroductionThe purpose of this standard is to provide the electronic design a
48、utomation (EDA), semiconductor,electronic design intellectual property (IP) provider, and system design communities with a well-definedand unified specification for the meta-data that represents the components and designs within an electronicsystem. The goal of this specification is to enable delive
49、ry of compatible IP descriptions from multiple IPvendors; better enable importing and exporting complex IP bundles to, from, and between EDA tools forsystem on chip (SoC) design environments (DEs); better express configurable IP by using IP meta-data; andbetter enable provision of EDA vendor-neutral IP creation and configuration scripts (generators). The dataand data access specification is designed to coexist and enhance the hardware description languages (HDLs)presently used by designers while providing capabilities lackin
