DLA DSCC-VID-V62 03608 REV A-2008 MICROCIRCUIT DIGITAL-LINEAR CMOS 14-BIT 1 3 8 MSPS ANALOG-TO-DIGITAL CONVERTER MONOLITHIC SILICON.pdf

上传人:visitstep340 文档编号:689055 上传时间:2018-12-30 格式:PDF 页数:20 大小:128.94KB
下载 相关 举报
DLA DSCC-VID-V62 03608 REV A-2008 MICROCIRCUIT DIGITAL-LINEAR CMOS 14-BIT 1 3 8 MSPS ANALOG-TO-DIGITAL CONVERTER MONOLITHIC SILICON.pdf_第1页
第1页 / 共20页
DLA DSCC-VID-V62 03608 REV A-2008 MICROCIRCUIT DIGITAL-LINEAR CMOS 14-BIT 1 3 8 MSPS ANALOG-TO-DIGITAL CONVERTER MONOLITHIC SILICON.pdf_第2页
第2页 / 共20页
DLA DSCC-VID-V62 03608 REV A-2008 MICROCIRCUIT DIGITAL-LINEAR CMOS 14-BIT 1 3 8 MSPS ANALOG-TO-DIGITAL CONVERTER MONOLITHIC SILICON.pdf_第3页
第3页 / 共20页
DLA DSCC-VID-V62 03608 REV A-2008 MICROCIRCUIT DIGITAL-LINEAR CMOS 14-BIT 1 3 8 MSPS ANALOG-TO-DIGITAL CONVERTER MONOLITHIC SILICON.pdf_第4页
第4页 / 共20页
DLA DSCC-VID-V62 03608 REV A-2008 MICROCIRCUIT DIGITAL-LINEAR CMOS 14-BIT 1 3 8 MSPS ANALOG-TO-DIGITAL CONVERTER MONOLITHIC SILICON.pdf_第5页
第5页 / 共20页
点击查看更多>>
资源描述

1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Make correction the title block. Replace footnote 1/ under Table I. Add notes and inch dimensions to figure 1. Drawing updated to reflect current requirements. - ro 08-04-28 R. HEBER Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV A

2、 A A PAGE 18 19 20 REV A A A A A A A A A A A A A A A A A REV STATUS OF PAGES PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 PMIC N/A PREPARED BY RICK OFFICER DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing YY-MM-DD CHECKED BY TOM HESS APPROVED BY RAYMOND MONNIN TITL

3、E MICROCIRCUIT, DIGITAL-LINEAR, CMOS, 14-BIT, 1, 3, 8 MSPS, ANALOG-TO-DIGITAL CONVERTER, MONOLITHIC SILICON SIZE A CODE IDENT. NO. 16236 DWG NO. V62/03608 02-12-12 REV A PAGE 1 OF 20 AMSC N/A 5962-V045-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,

4、-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03608 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance analog-to-digital microcircuit, with an operating temperature range of -55C to +125C. 1.2 Vendor Item

5、 Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/03608 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2

6、.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function Clock frequency 01 THS1401-EP 14-bit, 8 MSPS DSP compatible analog-to- 1 MHz digital converter with internal reference 02 THS1403-EP 14-bit, 8 MSPS DSP compatible analog-to- 3 MHz digital converter with internal r

7、eference 03 THS1408-EP 14-bit, 8 MSPS DSP compatible analog-to- 8 MHz digital converter with internal reference 1.2.2 Case outline(s). The case outline(s) are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 48 MS-026 Plastic quad flat pack 1.2.3 Lead finishes. The lea

8、d finishes are as specified below or other lead finishes as provided by the device manufacture: Finish designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other Provided by IHSNot for ResaleNo reproduction or networking permitted without license fr

9、om IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03608 REV A PAGE 3 1.3 Absolute maximum ratings. 1/ Supply voltage (AVDDto AGND) 4 V Supply voltage (DVDDto DGND) . 4 V Reference input voltage range (VBG) . -0.3 V to AVDD+0.3 V Analog input voltage ra

10、nge . -0.3 V to AVDD+0.3 V Digital input voltage range -0.3 V to DVDD+0.3 V Storage temperature range (TSTG). -65C to 150C Lead temperature 1.6 mm (1/16 inch) from case for 10 seconds . 260C Thermal resistance, junction-to-case (JC) 0.79C/W 2/ Thermal resistance, junction-to-ambient (JA) . 28.8C/W 2

11、/ 1.4 Recommended operating conditions. 3/ Supply voltage range (AVDD, DVDD) . 3 V to 3.6 V High level digital input voltage (VIH) . 2 V minimum Low level digital input voltage (VIL) 0.8 V maximum Load capacitance (CL) . 15 pF maximum Clock frequency (fCLK) : Device type 01 . 0.1 to 1 MHz Device typ

12、e 02 . 0.1 to 3 MHz Device type 03 . 0.1 to 8 MHz Clock duty cycle . 45% to 55% Operating free-air temperature range (TA): Device types 01 and 02 -40C to +125C Device type 03 . -55C to +125C 1/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. The

13、se are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ Informational purpo

14、ses only, not production tested. 3/ Use of this product beyond the manufacturers design rules or stated parameters is done at the users risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. Provided by IHSNot for ResaleNo reprodu

15、ction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03608 REV A PAGE 4 2. APPLICABLE DOCUMENTS JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices (Applications for copies should be addr

16、essed to the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, C

17、AGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electri

18、cal performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3

19、.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. 3.5.3 Block diagram. The block diagram shall be as shown in figure 3. 3.5.4 Timing diagrams. The timing diagrams shall be as shown in figure 4. 3.5.5 Principles of operation. The principles of operation and test circu

20、it shall be as shown in figure 5. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03608 REV A PAGE 5 TABLE I. Electrical performance characteristics. 1/ Limits Tes

21、t Symbol Conditions AVDD= DVDD= 3.3 V unless otherwise specified Temperature, TADevice type Min Max Unit Power supply section Analog supply current IDDAAVDD= 3.6 V -40C TA +125C 01,02 90 mA -55C TA +125C 03 90 Digital supply current IDDDDVDD= 3.6 V -40C TA +125C 01,02 10 mA -55C TA +125C 03 10 Power

22、 AVDD= DVDD= 3.6 V -40C TA +125C 01,02 360 mW -55C TA +125C 03 360 Power down current -40C TA +125C 01,02 20 typical A -55C TA +125C 03 20 typical DC characteristics section Resolution -40C TA +125C 01,02 14 typical Bits -55C TA +125C 03 14 typical Differential nonlinearity DNL -40C TA +125C 01,02 1

23、 LSB -55C TA +125C 03 1 Integral nonlinearity INL Best fit -40C TA +125C 01 2.5 LSB 02 3 -55C TA +125C 03 7.5 Offset error OE IN+, IN-, PGA = 0 dB -40C TA +125C 01,02 0.3 %FSR -55C TA +125C 03 0.3 Gain error GE PGA = 0 dB -40C TA +125C 01,02 1.75 %FSR -55C TA +125C 03 1.75 See footnote at end of tab

24、le. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03608 REV A PAGE 6 TABLE I. Electrical performance characteristics Continued. 1/ Test Symbol Temperature, Limit

25、s Unit Conditions AVDD= DVDD= 3.3 V unless otherwise specified TADevicetype Min Max AC characteristics section Effective number of bits ENOB -40C TA +125C 01,02 11.2 Bits -55C TA +125C 03 11.2 THD fi= 100 kHz -40C TA +125C 01,02 -81 typical dB -55C TA +125C 03 -81 typical Total harmonic distortion f

26、i= 1 MHz -40C TA +125C 02 -78 typical -55C TA +125C 03 -78 typical fi= 4 MHz -55C TA +125C 03 -77 typical Signal-to-noise ratio SNR fi= 100 kHz -40C TA +125C 01,02 72 typical dB -55C TA +125C 03 72 typical fi= 1 MHz -40C TA +125C 02 70 -55C TA +125C 03 70 fi= 4 MHz -55C TA +125C 03 71 typical SINAD

27、fi = 100 kHz -40C TA +125C 01,02 70 typical dB Signal-to-noise ratio + distortion -55C TA +125C 03 70 typical fi= 1 MHz -40C TA +125C 02 69 -55C TA +125C 03 69 fi= 4 MHz -55C TA +125C 03 70 typical SFDR fi = 100 kHz -40C TA +125C 01,02 80 typical dB Spurious free dynamic range -55C TA +125C 03 80 ty

28、pical fi= 1 MHz -40C TA +125C 02 71 -55C TA +125C 03 71 fi= 4 MHz -40C TA +125C 03 80 typical See footnote at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG

29、 NO. V62/03608 REV A PAGE 7 TABLE I. Electrical performance characteristics Continued. 1/ Limits Test Symbol Conditions AVDD= DVDD= 3.3 V unless otherwise specified Temperature, TADevice type Min Max Unit AC characteristics section - continued Analog input bandwidth -40C TA +125C 01,02 140 typical M

30、Hz -55C TA +125C 03 140 typical Reference voltage section Bandgap voltage, internal mode VBG -40C TA +125C 01,02 1.425 1.575 V -55C TA +125C 03 1.425 1.575 Input impedance -40C TA +125C 01,02 40 typical k -55C TA +125C 03 40 typical REF+ -40C TA +125C 01,02 2.5 typical V Positive reference voltage -

31、55C TA +125C 03 2.5 typical REF- -40C TA +125C 01,02 0.5 typical V Negative reference voltage -55C TA +125C 03 0.5 typical REF -40C TA +125C 01,02 2 typical V Reference difference, REF+ - REF- -55C TA +125C 03 2 typical -40C TA +125C 01,02 5 typical % Accuracy, internal reference -55C TA +125C 03 5

32、typical TC -40C TA +125C 01,02 40 typical Temperature coefficient -55C TA +125C 03 40 typical ppm/ C Voltage coefficient VC -40C TA +125C 01,02 200 typical ppm/V -55C TA +125C 03 200 typical See footnote at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without li

33、cense from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03608 REV A PAGE 8 TABLE I. Electrical performance characteristics Continued. 1/ Limits Test Symbol Conditions AVDD= DVDD= 3.3 V unless otherwise specified Temperature, TADevice type Min Max Uni

34、t Analog inputs section. Positive analog input IN+ -40C TA +125C 01,02 0 AVDDV -55C TA +125C 03 0 AVDDNegative analog input IN- -40C TA +125C 01,02 0 AVDDV -55C TA +125C 03 0 AVDDAin = IN+ - IN-, -40C TA +125C 01,02 -Vref Vref V Analog input voltage difference Vref= REF+ - REF- -55C TA +125C 03 -Vre

35、f Vref Input impedance -40C TA +125C 01,02 25 typical k -55C TA +125C 03 25 typical PGA range -40C TA +125C 01,02 0 7 dB -55C TA +125C 03 0 7 PGA step size -40C TA +125C 01,02 1 typical dB -55C TA +125C 03 1 typical PGA gain error -40C TA +125C 01,02 0.25 dB -55C TA +125C 03 0.25 Digital inputs sect

36、ion High level digital input VIH-40C TA +125C 01,02 2 V -55C TA +125C 03 2 Low level digital input VIL-40C TA +125C 01,02 0.8 V -55C TA +125C 03 0.8 Input capacitance CIN-40C TA +125C 01,02 5 typical pF -55C TA +125C 03 5 typical Input current IIN-40C TA +125C 01,02 1 A -55C TA +125C 03 1 See footno

37、te at end of table.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03608 REV A PAGE 9 TABLE I. Electrical performance characteristics Continued. 1/ Limits Test Sym

38、bol Conditions AVDD= DVDD= 3.3 V unless otherwise specified Temperature, TADevice type Min Max Unit Digital outputs section High level digital output VOHIOH= 50 A -40C TA +125C 01,02 2.6 V -55C TA +125C 03 2.6 Low level digital output VOLIOL= 50 A -40C TA +125C 01,02 0.4 V -55C TA +125C 03 0.4 IOZ-4

39、0C TA +125C 01,02 10 A Output current, high impedance -55C TA +125C 03 10 Clock timing (CS low) section Clock frequency fCLK-40C TA +125C 01 0.1 2/ 1 MHz 02 0.1 2/ 3 -55C TA +125C 03 0.1 2/ 8 Output delay time td-40C TA +125C 01,02 25 ns -55C TA +125C 03 25 Latency -40C TA +125C 01,02 9.5 typical Cy

40、cles -55C TA +125C 03 9.5 typical 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily

41、 be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. 2/ This parameter is not production tested. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS C

42、OLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03608 REV A PAGE 10 Case X FIGURE 1. Case outline. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03608 REV

43、A PAGE 11 Case X Dimensions Inches Millimeters Symbol Min Max Min Max A - .047 - 1.20 A1 .037 .041 0.95 1.05 A2 .009 - 0.25 - A3 .001 .005 0.05 0.15 b .006 .010 0.17 0.27 C .005 - 0.13 - D .346 .362 8.80 9.20 D1 .267 .283 6.80 7.20 D2 .216 - 5.50 - E .346 .362 8.80 9.20 E1 .267 .283 6.80 7.20 E2 .21

44、6 - 5.50 - e .019 - 0.50 - L1 .017 .029 0.45 0.75 NOTES: 1. Controlling dimensions are inch, millimeter dimensions are given for reference only. 2. Body dimensions do not include mold flash or protrusion. 3. The package thermal performance may be enhanced by bonding the thermal pad to an thermal pla

45、ne. This pad is electrically and thermally connected to the backside of the die and possibly selected leads. 4. Falls within JEDEC MS-026. FIGURE 1. Case outline Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMB

46、US COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03608 REV A PAGE 12 Device types All Device types All Case outline X Case outline X Terminal number Terminal symbol Terminal number Terminal symbol 1 -IN 25 DGND 2 AVDD26 DVDD3 VBG 27 D2 4 CML 28 D1 5 +REF 29 D0 6 -REF 30 DVDD7 AGND 31 DVDD8 AGND 32 CLK 9 DGND 33 DGND 10 OV 34 DGND 11 D13 35 OE 12 D12 36 WR 13 D11 37 CS 14 DVDD38 NC 15 DGND 39 NC 16

展开阅读全文
相关资源
猜你喜欢
相关搜索

当前位置:首页 > 标准规范 > 国际标准 > 其他

copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
备案/许可证编号:苏ICP备17064731号-1