1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Add device type 02 and case outline Y. Make changes to 1.2.1, Table I, figure 1, figure 2, and 6.3. - ro 06-01-18 R. MONNIN B Add footnote 1/ to section 1.2.2 and footnote 3/ to section 6.3. Update boilerplate paragraphs to current requirements. - PHN 11-12
2、-21 Thomas M. Hess CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV B B B B B B B B B B B B B B B PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1
3、5 PMIC N/A PREPARED BY RICK OFFICER DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing YY-MM-DD CHECKED BY TOM HESS TITLE MICROCIRCUIT, DIGITAL-LINEAR, TRIPLE PROCESSOR SUPERVISORY CIRCUIT, MONOLITHIC SILICON 03-04-08 APPROVED BY RAYMOND MONNIN SIZE A CODE IDENT. NO. 1
4、6236 DWG NO. V62/03629 REV B PAGE 1 OF 15 AMSC N/A 5962-V014-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03629 REV B PAGE 2 1. SCOPE 1.1 Scope. This drawing
5、 documents the general requirements of a high performance triple processor supervisory microcircuit, with an operating temperature range of -55C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes a
6、n administrative control number for identifying the item on the engineering documentation: V62/03629 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 TPS3307-18-EP Triple processor superviso
7、ry circuit 02 TPS3307-33-EP Triple processor supervisory circuit 1.2.2 Case outline(s). The case outline(s) are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 8 MS-012 Plastic small outline Y 1/ 8 MO-187 Plastic small outline with thermal pad 1.2.3 Lead finishes. The
8、 lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other _ 1/ The manufacture has changed lead frames NiPdAu to NiPdAuAg and location of as
9、sembly from their Hana facility to their Shanghai facility. Product with a Lot Trace Code of 1CxxxxH and earlier is a NiPdAu frame from the Hana facility. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO
10、SIZE A CODE IDENT NO. 16236 DWG NO. V62/03629 REV B PAGE 3 1.3 Absolute maximum ratings. 2/ Supply voltage (VDD) 7 V 3/ All other pins . -0.3 V to 7 V 3/ Maximum low output current (IOL) 5 mA Maximum high output current (IOH)-5 mA Input clamp current (IIK), (VIVDD) . 20 mA Output clamp current (IOK)
11、, (VOVDD) . 20 mA Storage temperature range (TSTG) -65C to +150C 4/ Soldering temperature +260C Maximum junction temperature (TJ) . +150C Package thermal impedance (JA): Case X +126C/W 5/ Case Y +58.4C/W 5/ 1.4 Recommended operating conditions. 6/ Supply voltage range (VDD) . 2 V to 6 V Input voltag
12、e (VI) at MR and SENSE 3 pins 0 V to VDD+ 0.3 V Input voltage (VI) at SENSE 1 and SENSE 2 pins 0 V to (VDD+ 0.3 V) VIT/ 1.25 V High level input voltage (VIH) at MR 0.7 x VDDminimum Low level input voltage (VIL) at MR . 0.3 x VDDmaximum Input transition rise and fall rate (t / V) at MR 50 ns / V maxi
13、mum Operating free air temperature range (TA) -55C to +125C 2/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “
14、recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 3/ All voltage values are with respect to GND. For reliable operation the device must not be operated at 7 V for morethan t = 1000 h continuously. 4/ Lo
15、ng term, high temperature storage and / or extended use at maximum recommended operating conditions may result in a reduction of overall device life. 5/ The thermal impedance, JA, for the case X package is determined for JEDEC high-K PCB (JESD51-7). The thermal impedance value for case Y package is
16、determined for Texas Instruments recommended assembly for thermal pad packages. See manufacturer briefs SLMA002 and SLMA004 for more information about utilizing the thermally enhanced package. Thermal impedance, JA, values for the cases X and Y packages using JEDEC low-K PCB (JESD51-3) are 215C/W an
17、d 296C/W, respectively. 6/ Use of this product beyond the manufacturers design rules or stated parameters is done at the users risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. Provided by IHSNot for ResaleNo reproduction or
18、networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03629 REV B PAGE 4 2. APPLICABLE DOCUMENTS JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices (Applications for copies should be addressed to
19、the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code,
20、 or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical perfo
21、rmance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outlines. The case outlines shall be as shown in 1.2.2 and figure 1. 3.5.2 Te
22、rminal connections. The terminal connections shall be as shown in figure 2. 3.5.3 Truth table. The truth table shall be as shown in figure 3. 3.5.4 Logic diagram. The logic diagram shall be as shown in figure 4. 3.5.5 Timing waveforms. The timing waveforms shall be as shown in figure 5. Provided by
23、IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03629 REV B PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol ConditionsTemperature, TA Device type Limits
24、 Unit Min Max Electrical characteristics section High level output voltage VOHVDD= 2 V to 6 V, IOH= -20 A -55C to +125C 01,02 VDD 0.2 V V VDD= 3.3 V, IOH= -2 mA VDD 0.4 V VDD= 6 V, IOH= -3 mA VDD 0.4 V Low level output voltage VOLVDD= 2 V to 6 V, IOL= 20 A -55C to +125C 01,02 0.2 V VDD= 3.3 V, IOL=
25、2 mA 0.4 VDD= 6 V, IOL= 3 mA 0.4 Power-up reset voltage VDD 1.1 V, IOL= 20 A 2/ -55C to +125C 01,02 0.4 V Negative going input threshold voltage -VITSENSE3 pin, VDD= 2 V to 6 V 3/ -55C to +125C 01,02 1.2 1.29 V SENSE1, SENSE2 pins, VSENSE = 1.8 V, VDD= 2 V to 6 V 3/ 1.6 1.73 SENSE1, SENSE2 pins, VSE
26、NSE = 3.3 V, VDD= 2 V to 6 V 3/ 2.8 3.02 SENSE1, SENSE2 pins, VSENSE = 5 V, VDD= 2 V to 6 V 3/ 4.4 4.67 Hysteresis at VSENSEn input Vhys -VIT= 1.25 V -55C to +125C 01,02 2 30 mV -VIT= 1.68 V 2 40 -VIT= 2.93 V 3 60 -VIT= 4.55 V 3 80 See footnotes at end of table. Provided by IHSNot for ResaleNo repro
27、duction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03629 REV B PAGE 6 TABLE I. Electrical performance characteristics Continued. 1/ Test Symbol ConditionsTemperature, TA Device type Limits Unit Min Max E
28、lectrical characteristics section continued. High level input current IHMR pin = 0.7 x VDD, VDD= 6 V -55C to +125C 01,02 -180 A VSENSE1 pin = VDD= 6 V 8 VSENSE2 pin = VDD= 6 V 9 VSENSE3 pin = VDD-1 +1 Low level input current ILMR pin = 0 V, VDD= 6 V -55C to +125C 01,02 -600 A VSENSE1,2,3 pins = 0 V
29、-1 +1 Supply current IDD-55C to +125C 01,02 40 A Input capacitance CIVI= 0 V to VDD-55C to +125C 01,02 10 typical pF Timing requirements section. 4/ Pulse width tWSENSEn pin, VSENSEnL= -VIT- 0.2 V, VSENSEnH= +VIT+ 0.2 V +25C 01,02 6 s MR pin, VIH= 0.7 x VDD, VIL= 0.3 x VDD100 ns Switching characteri
30、stics section. 4/ Delay time tdVI(SENSEn) +VIT+ 0.2 V, MR 0.7 x VDD, figure 5 +25C 01,02 140 280 ms Propagation (delay) time, high-to-low output tPHLMR to RESET , VI(SENSEn) +VIT+ 0.2 V, VIH= 0.7 x VDD, VIL= 0.3 x VDD+25C 01,02 600 ns Propagation (delay) time, low-to-high output tPLHMR to RESET, VI(
31、SENSEn) +VIT+ 0.2 V, VIH= 0.7 x VDD, VIL= 0.3 x VDD+25C 01,02 600 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03629 REV B PAG
32、E 7 TABLE I. Electrical performance characteristics Continued. 1/ Test Symbol ConditionsTemperature, TA Device type Limits Unit Min Max Switching characteristics section continued. 4/ Propagation (delay) time, high-to-low output tPHLSENSEn to RESET , VIH +VIT+0.2 V, VIL -VIT- 0.2 V, MR 0.7 x VDD+25C
33、 01,02 5 s Propagation (delay) time, low-to-high output tPLHSENSEn to RESET, VIH +VIT+0.2 V, VIL -VIT- 0.2 V, MR 0.7 x VDD+25C 01,02 5 s 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product
34、 may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. 2/ The lowest supply voltage at which RESET becomes active. tr, VDD 15 s
35、 / V. 3/ To ensure best stability of the threshold voltage, a bypass capacitor (ceramic 0.1 F) should be placed close to the supply terminals. 4/ Unless otherwise specified, VDD= 2 V to 6 V, RL= 1 M, CL= 50 pF. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from
36、 IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03629 REV B PAGE 8 Case X FIGURE 1. Case outlines. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A C
37、ODE IDENT NO. 16236 DWG NO. V62/03629 REV B PAGE 9 Case X Symbol Dimensions Inches Millimeters Min Max Min Max A - 0.069 - 1.75 A1 0.004 0.010 0.10 0.25 b 0.014 0.020 0.35 0.51 c 0.008 nominal 0.20 nominal D 0.189 0.197 4.80 5.00 e 0.050 1.27 E 0.150 0.157 3.81 4.00 E1 0.228 0.244 5.80 6.20 L 0.016
38、0.044 0.40 1.12 n 8 leads 8 leads NOTE: 1. Controlling dimensions are inches, millimeter dimensions are given for reference only. 2. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.006 inch ( 0.15 mm ). 3. Falls within JEDEC MS-012 variation AA.
39、FIGURE 1. Case outlines. continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03629 REV B PAGE 10 Case Y FIGURE 1. Case outlines. continued. Provided by IHSN
40、ot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03629 REV B PAGE 11 Case Y Symbol Dimensions Inches Millimeters Min Max Min Max A - .042 - 1.07 A1 .001 .005 0.05 0.15 b .009 .014
41、0.25 0.38 c .005 nominal 0.15 nominal D .116 .120 2.95 3.05 e .025 nominal 0.65 nominal E .116 .120 2.95 3.05 E1 .188 .196 4.78 4.98 L .016 .027 0.41 0.69 n 8 leads 8 leads NOTE: 1. Controlling dimensions are millimeter, inch dimensions are given for reference only. 2. Body dimensions do not include
42、 mold flash or protrusion. 3. This package is designed to be soldered to a thermal pad on the board. Refer to technical brief, power pad thermally enhanced package, manufacturers literature number SLMA002 for information regarding recommended board layout. This document is available at http:/. 4. F
43、alls within JEDEC MO-187. FIGURE 1. Case outlines. continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03629 REV B PAGE 12 Device types 01 and 02 Case outli
44、nes X and Y Terminal number Terminal symbol 1 SENSE1 2 SENSE2 3 SENSE3 4 GND 5 RESET 6 RESET 7 MR 8 VDDFIGURE 2. Terminal connections. MR SENSE1 VIT1SENSE2 VIT2SENSE3 VIT3RESET RESET L X X X L H H 0 0 0 L H H 0 0 1 L H H 0 1 0 L H H 0 1 1 L H H 1 0 0 L H H 1 0 1 L H H 1 1 0 L H H 1 1 1 H L H = High
45、voltage level L = Low voltage level X = Dont care FIGURE 3. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03629 REV B PAGE 13 NOTES: 1. R1 and R2 fo
46、rm an internal divider. It determines the threshold on the comparator positive input coming from SENSE 1 pin. 2. R3 and R4 form an internal divider. It determines the threshold on the comparator positive input coming from SENSE 2 pin. FIGURE 4. Logic diagram. Provided by IHSNot for ResaleNo reproduc
47、tion or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03629 REV B PAGE 14 FIGURE 5. Timing waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03629 REV B PAGE 15 4. VERIFICATION 4.1
