1、 REVISIONSLTR DESCRIPTION DATE APPROVEDPrepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV PAGE 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Muhammad A. Akbar DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218 - 3990 Original date of drawing YY - M
2、M - DD CHECKED BY Phu H. Nguyen TITLE MICROCIRCUIT, DIGITAL, SINGLE POSITIVE EDGE TRIGGRERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET, MONOLITHIC SILICON 09-08-10 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/08617 REV PAGE 1 OF 11 AMSC N/A 5962-V069-09 .Provided by IHSNot for Re
3、saleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A CODE IDENT NO. 16236 DWG NO. V62/08617 REV PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance single positive edge t
4、riggered D-type flip-flop with clear and preset microcircuit, with an operating temperature range of -55C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for ide
5、ntifying the item on the engineering documentation: V62/08617 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 SN74LVC2G74-EP Single positive edge triggered D-type flip-flop with clear and p
6、reset. 1.2.2 Case outline(s). The case outlines are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 8 MO-187 Plastic small outline package 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacture: Finis
7、h designator Material A Hot solder dip B Tin-lead plateC Gold plateD PalladiumE Gold flash palladium Z Other 1.3 Absolute maximum ratings. 1/ Supply voltage range ( VCC) . -0.5 V to +6.5 V Input voltage range ( Vi) . -0.5 V to +6.5 V 2/ Voltage range applied to any output in high-impedance or power-
8、off state ( VO) . -0.5 V to +6.5 V 2/ Voltage range applied to any output in the high or low state ( VO) . -0.5 V to VCC+0.5 V 2/ 3/ Maximum input clamp current ( IIK) ( VI 0) -50 mA Maximum output clamp current ( IOK) ( VI 0) . -50 mA Maximum continuous output current (IO) . 50 mA Maximum continuou
9、s current through VCCor GND 100 mA Maximum package thermal impedance ( JA) (case outline X) 227C/W 4/ Storage temperature range (TSTG) -65C to 150C 1/ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional
10、 operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ The input and output negative voltage ratings may be exceeded
11、 if the input and output current rating are observed. 3/ The value of VCCis provided in the recommended operating condition table. 4/ The package thermal impedance is calculated in accordance with JESD 51-7. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IH
12、S-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A CODE IDENT NO. 16236 DWG NO. V62/08617 REV PAGE 3 1.4 Recommended operating conditions. 5/ 6/ Supply voltage ( VCC): For operating . 1.65 V to 5.5 V For data retention only 1.5 V Minimum high level input voltage (VIH): VCC= 1.65
13、V to 1.95 V . 0.65 x VCCV VCC= 2.3 V to 2.7 V 1.7 V VCC= 3.0 V to 3.6 V 2.0 V VCC= 4.5 V to 5.5 V 0.7 x VCCV Maximum low level input voltage (VIL): VCC= 1.65 V to 1.95 V . 0.35 x VCCV VCC= 2.3 V to 2.7 V 0.7 V VCC= 3.0 V to 3.6 V 0.8 V VCC= 4.5 V to 5.5 V 0.3 x VCCV Input voltage ( VI) . 0 V to 5.5
14、V Output voltage (VO) 0 V to 5.5 V Maximum high- level output current (IOH): VCC= 1.65 V -4 mA VCC= 2.3 V -8 mA VCC= 3.0 V -16 mA VCC= 4.5 V -24 mA Maximum low level output current (IOL): VCC= 1.65 V +4 mA VCC= 2.3 V +8 mA VCC= 3.0 V +16 mA VCC= 4.5 V +24 mA Maximum input transition rise or fall tim
15、e rate (t/v) : VCC= 1.8 V 0.15 V 20 ns/V VCC= 2.5 V 0.20 V . 20 ns/V VCC= 3.3 V 0.3 V 10 ns/V VCC= 5.0 V 0.5 V 5 ns/V Operating free-air temperature range ( TA) -55C to +125C 2. APPLICABLE DOCUMENTS JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices JEDEC STD 51-7 High Effective
16、 Thermal Conductivity Test Board for Leaded Surface Mount Packages (Applications for copies should be addressed to the Electronic Industries Alliance (EIA), 2500 Wilson Boulevard, Arlington, VA 22201-3834 or online at http:/www.jedec.org) . _ 5/ Use of this product beyond the manufacturers design ru
17、les or stated parameters is done at the users risk. The manufacturer and /or distributor maintain no responsibility or liability for product used beyond the stated limits. 6/ All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Provided by IHSNot for ResaleNo
18、 reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A CODE IDENT NO. 16236 DWG NO. V62/08617 REV PAGE 4 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown
19、 in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The m
20、aximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The
21、case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. 3.5.3 Function table or truth table. The Function table shall be as shown in figure 3. 3.5.4 Logic diagram. The logic diagram shall be as shown in figure 4. 3.5.5
22、 Load circuit and timing waveforms. The load circuit and timing waveforms shall be as shown in figure 5. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A CODE IDENT NO. 16236 DWG NO. V62
23、/08617 REV PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions 2/ unless otherwise specified VCCLimits Unit Min Max Maximum output high level voltage VOHIOH= -100 A 1.65 V to 5.5 V VCC-0.1 V IOH= -4 mA 1.65 V 1.2 IOH= -8 mA 2.3 V 1.9 IOH= -16 mA 3.0 V 2.4 IOH= -24 mA 3.
24、0 V 2.3 IOH= -24 mA 4.5 V 3.8 Maximum output low level voltage VOLIOL= +100 A 1.65 V to 5.5 V 0.1 V IOL= +4 mA 1.65 V 0.45 IOL= +8 mA 2.3 V 0.3 IOL= +16 mA 3.0 V 0.4 IOL= +24 mA 3.0 V 0.55 IOL= +24 mA 4.5 V 0.55 Input current (data or control inputs) IIVI= 5.5 V or GND 0 V to 5.5 V 5 A Offset curren
25、t IoffVIor V0 = 5.5 V 0 V 10 A Supply current ICCVI= 5.5 V or GND I0 = 0 1.65 V to 5.5 V 10 A Incremental supply current (control inputs) ICC One input at VCC- 0.6 V, other inputs at VCCor GND 3 V to 5.5 V 500 A Input capacitance (control inputs) CIVI= VCCor 0 V 3.3 V 5.0 Typ pF Power dissipation ca
26、pacitance Cpdf = 10 MHz; TA= 25C 3.3 V 37 Typ pF f = 10 MHz; TA= 25C 5.0 V 40 Typ Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A CODE IDENT NO. 16236 DWG NO. V62/08617 REV PAGE 6 TABLE
27、 I. Electrical performance characteristics - Continued. 1/ Test Symbol Conditions 2/ unless otherwise specified VCCLimits Unit Min Max Timing requirements Clock frequency fclock3.3 V 0.3 V 175 MHz 5.0 V 0.5 V 200 Pulse duration tWCLK 3.3 V 0.3 V 2.7 ns 5.0 V 0.5 V 2.0 PREnullnullnullnullnullnullor C
28、LRnullnullnullnullnulllow 3.3 V 0.3 V 1.7 ns 5.0 V 0.5 V 2.0 Setup time, before CLK tSUdata 3.3 V 0.3 V 1.3 ns 5.0 V 0.5 V 1.1 PREnullnullnullnullnullnullor CLRnullnullnullnullnullinactive 3.3 V 0.3 V 1.2 ns 5.0 V 0.5 V 1.2 Hold time, data after CLK th3.3 V 0.3 V 1.2 ns 5.0 V 0.5 V 0.5 Switching Cha
29、racteristics Maximum operating frequency fmax3.3 V 0.3 V 175 MHz 5.0 V 0.5 V 200 Propagation delay time tpdFrom input CLK to output Q 3.3 V 0.3 V 2.2 7.9 ns 5.0 V 0.5 V 1.4 6.1 From input CLK to output Qnull3.3 V 0.3 V 2.6 8.2 ns 5.0 V 0.5 V 1.6 6.4 From input PREnullnullnullnullnullnullor CLRnullnu
30、llnullnullnullTo output Q or Qnull3.3 V 0.3 V 1.7 7.9 ns 5.0 V 0.5 V 1.6 6.1 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature r
31、ange and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design 2/ Over recommended operating free-air temperature range (unless otherwise noted) Provided by IHSNot for ResaleNo reproduction or net
32、working permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A CODE IDENT NO. 16236 DWG NO. V62/08617 REV PAGE 7 Case X Dimension Symbol Millimeters Symbol Millimeters Min Max Min Max A 0.60 0.90 E 2.20 2.40 A1 0.00 0.10 E1 3.00 3.20 b 0.17 0.25 e 0.5
33、0 NOM c 0.13 NOM L 0.20 0.35 D 1.90 2.10 NOTES: 1. All linear dimensions are in millimeters. 2. This drawing is subject to change without notice. 3. Body dimensions do not include mold flash or protrusion not to exceed 0.15 mm (0.006 inches) per side. 4. Falls within JEDEC MO-187 variation CA. FIGUR
34、E 1. Case outline Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A CODE IDENT NO. 16236 DWG NO. V62/08617 REV PAGE 8 Case X Terminal number Terminal symbol 1 CLK 2 D 3 Qnull4 GND 5 Q 6 C
35、LRnullnullnullnullnull7 PREnullnullnullnullnullnull8 VCCFIGURE 2. Terminal connections. INPUTS OUTPUTS PREnullnullnullnullnullnullCLRnullnullnullnullnullCLK D Q QnullL H X X H L H L X X L H L L X X H 1/ H 1/ H H H H L H H L L H H H L X Q0Q0nullnullnullnullH = High voltage level L = Low voltage level
36、 X = Dont care 1/ This configuration is nonstable; that is, it does not persist when PREnullnullnullnullnullnullor CLRnullnullnullnullnullreturns to its inactive(high) level. FIGURE 3. Function table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-D
37、EFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A CODE IDENT NO. 16236 DWG NO. V62/08617 REV PAGE 9 FIGURE 4. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE
38、A CODE IDENT NO. 16236 DWG NO. V62/08617 REV PAGE 10 NOTES: 1. CLincludes probe and jig capacitance. 2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the outp
39、ut is high except when disabled by the output control. 3. All input pulses are supplied by generators have the following characteristics: PRR 10 MHz, ZO= 50 . 4. The outputs are measured one at a time with one input transition per measurement. 5. tPLZand tPZLare the same as tdis. 6. tPZLand tPZHare
40、the same as ten7. tPLHand tPHLare the same as tpd 8. All parameters and waveforms are not applicable to all devices. FIGURE 5. Load circuit and timing waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS
41、, OHIO 43218-3990 SIZE A CODE IDENT NO. 16236 DWG NO. V62/08617 REV PAGE 11 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper hand
42、ling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers standard commercial practices for ele
43、ctrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturers data book. The device manufact
44、urer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of suppl
45、y for the item. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number Top side Marking V62/08617-01XE 01295 SN74LVC2G74MDCUTEP CHB 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering docum
46、entation. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group8505 Forest lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-
