1、 REVISIONSLTR DESCRIPTION DATE APPROVEDPrepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE 18 19 20 21 22 23 24 REV STATUS OF PAGES REV PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 PMIC N/A PREPARED BY RICK OFFICER DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Original
2、date of drawing YY-MM-DD CHECKED BY RAJESH PITHADIA TITLE MICROCIRCUIT, DIGITAL-LINEAR, 8 CHANNEL, CMOS MULTIPLEXER, MONOLITHIC SILICON 11-07-21 APPROVED BY CHARLES F. SAFFLE SIZE A CODE IDENT. NO. 16236 DWG NO. V62/11612 REV PAGE 1 OF 24 AMSC N/A 5962-V057-11 Provided by IHSNot for ResaleNo reprodu
3、ction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/11612 REV PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance 8 channel CMOS multiplexer microcircuit, with an operatin
4、g temperature range of -55C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/11612 - 01 X B Drawing
5、 Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 ADG1408-EP 8 channel CMOS multiplexer 1.2.2 Case outline(s). The case outline(s) are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package
6、style X 16 MO-153-AB Plastic thin shrink small outline 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacture: Finish designator Material A Hot solder dip B Tin-lead plateC Gold plateD PalladiumE Gold flash palladium Z Other Provide
7、d by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/11612 REV PAGE 3 1.3 Absolute maximum ratings. 1/ Positive supply voltage (VDD) to negative supply voltage (VSS) 35 V VDDto ground (
8、GND) . -0.3 V to +25 V VSSto GND . +0.3 V to -25 V Analog inputs, digital inputs 2/ VSS 0.3 V to VDD+ 0.3 V or 30 mA, whichever occurs first Continuous current, source (S) or drain (D) . Table I data + 10% Peak current, S or D (pulsed at 1 ms, 10% duty cycle maximum) 350 mA Storage temperature range
9、 (TSTG) -65C to +150C Junction temperature (TJ) +150C Lead temperature, soldering: Vapor phase (60 seconds) . 215C Infared (15 seconds) 220C Thermal resistance, junction to ambient (JC) 50C/W Thermal resistance, junction to ambient (JA) 150.4C/W 1.4 Recommended operating conditions. 3/ 4/ Operating
10、free-air temperature range (TA) -55C to +125C 1/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended ope
11、rating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ Overvoltages at A, EN, S, or D are clamped by internal diodes. Current should be limited to the maximum ratings given. 3/ Use of this product beyond the manufacture
12、rs design rules or stated parameters is done at the users risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. 4/ All ratings and specifications, please refer to relevant EP datasheet. Provided by IHSNot for ResaleNo reproductio
13、n or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/11612 REV PAGE 4 2. APPLICABLE DOCUMENTS JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices (Applications for copies should be addressed to the JED
14、EC Office, 3103 North 10th Street, Suite 240-S, Arlington, VA 22201-2107 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B.
15、 Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance char
16、acteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connec
17、tions. The terminal connections shall be as shown in figure 2. 3.5.3 Truth table. The truth table shall be as shown in figure 3. 3.5.4 Timing waveforms and test circuits. The timing waveforms and test circuits shall be as shown in figures 4 through 14. Provided by IHSNot for ResaleNo reproduction or
18、 networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/11612 REV PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol ConditionsTemperature, TADevice type Limits Unit Min Max 15 V dual supply. Unless otherwise
19、 specified, VDD= +15 V 10%, VSS= -15 V, 10%, GND = 0 V. Analog switch section. Analog signal range -55C to +125C 01 VSSto VDDV On resistance RONVS= 10 V, IS= -10 mA, +25C 01 4.7 VDD= +13.5 V, VSS= -13.5 V, see figure 4 -55C to +125C 6.7 On resistance match between channels RONVS= 10 V, IS= -10 mA, +
20、25C 01 0.78 -55C to +125C 1.1 On resistance flatness RFLAT(ON)VS= 10 V, IS= -10 mA, +25C 01 0.72 -55C to +125C 0.92 Leakage current section. VDD= +16.5 V, VSS= -16.5 V Source off leakage IS(off) VS= 10 V, VD= 10 V, +25C 01 0.2 nA see figure 5 -55C to +125C 5 Drain off leakage ID(off) VS= 10 V, VD= 1
21、0 V, +25C 01 0.45 nA see figure 5 -55C to +125C 30 Channel on leakage ID, VS= VD= 10 V, +25C 01 1.5 nA IS(on) see figure 6 -55C to +125C 30 Digital inputs section. Input high voltage VINH-55C to +125C 01 2.0 V Input low voltage VINL-55C to +125C 01 0.8 V Input current IINVIN= VGNDor VDD+25C 01 0.005
22、 typical A -55C to +125C 0.1 Digital input capacitance CIN+25C 01 4 typical pF See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/11612 REV PAGE
23、6 TABLE I. Electrical performance characteristics Continued. 1/ Test Symbol ConditionsTemperature, TADevice type Limits Unit Min Max 15 V dual supply continued. Unless otherwise specified, VDD= +15 V 10%, VSS= -15 V, 10%, GND = 0 V. Dynamic characteristics section. 2/ Transition time tTRANSITIONVS=
24、10 V, RL= 100 , +25C 01 170 ns CL= 35 pF, see figure 7 -55C to +125C 240 Break before make time delay tBBMVS1= VS2= 10 V, RL= 100 , +25C 01 50 typical ns CL= 35 pF, see figure 8 -55C to +125C 19 Active high digital input on time tON(EN)VS= 10 V, RL= 100 , +25C 01 120 ns CL= 35 pF, see figure 9 -55C
25、to +125C 165 Active high digital input off time tOFF(EN)VS= 10 V, RL= 100 , +25C 01 120 ns CL= 35 pF, see figure 9 -55C to +125C 170 Charge injection VS= 0 V, RS= 0 , CL= 1 nF, see figure 10 +25C 01 -50 typical pC Off isolation f = 1 MHz, RL= 50 , CL= 5 pF, see figure 11 +25C 01 -70 typical dB Chann
26、el to channel crosstalk f = 1 MHz, RL= 50 , CL= 5 pF, see figure 12 +25C 01 -70 typical dB Total harmonic distortion, THD+N f = 20 Hz to 20 kHz, RL= 110 , 15 VPP, see figure 13 +25C 01 0.025 typical % -3 dB bandwidth RL= 50 , CL= 5 pF, see figure 14 +25C 01 60 typical MHz Insertion loss f = 1 MHz, R
27、L= 50 , CL= 5 pF, see figure 14 +25C 01 0.24 typical dB See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/11612 REV PAGE 7 TABLE I. Electrical p
28、erformance characteristics Continued. 1/ Test Symbol ConditionsTemperature, TADevice type Limits Unit Min Max 15 V dual supply continued. Unless otherwise specified, VDD= +15 V 10%, VSS= -15 V, 10%, GND = 0 V. Dynamic characteristics section continued. 2/ Source capacitance off CS(off) f = 1 MHz +25
29、C 01 14 typical pF Drain capacitance off CD(off) f = 1 MHz +25C 01 80 typical pF Drain and source capacitance (on) CD, CS(on) f = 1 MHz +25C 01 135 typical pF Power requirements section. VDD= +16.5 V, VSS= -16.5 V Positive supply current IDDDigital inputs = 0 V or VDD+25C 01 0.002 typical A -55C to
30、+125C 1 Digital inputs = 5 V +25C 220 typical -55C to +125C 420 Negative supply current ISSDigital inputs = 0 V, 5 V, or VDD+25C 01 0.002 typical A -55C to +125C 1 Positive power supply voltage VDD-55C to +125C 01 4.5 V Negative power supply voltage VSS-55C to +125C 01 16.5 V See footnotes at end of
31、 table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/11612 REV PAGE 8 TABLE I. Electrical performance characteristics Continued. 1/ Test Symbol ConditionsTemperature, TAD
32、evice type Limits Unit Min Max 12 V single supply . Unless otherwise specified, VDD= +12 V 10%, VSS= 0 V, GND = 0 V. Analog switch section. Analog signal range -55C to +125C 01 0 to VDDV On resistance RONVS= 0 V to 10 V, IS= -10 mA, +25C 01 8 VDD= 10.8 V, VSS= 0 V, see figure 4 -55C to +125C 11.2 On
33、 resistance match between channels RONVS= 0 V to 10 V, IS= -10 mA, +25C 01 0.82 -55C to +125C 1.1 On resistance flatness RF(ON)VS= 0 V to10 V, IS= -10 mA, +25C 01 2.5 -55C to +125C 2.8 Leakage current section. VDD= 13.2 V Source off leakage IS(off) VS= 1 V and 10 V, +25C 01 0.2 nA VD= 10 V and 1 V,
34、see figure 5 -55C to +125C 5 Drain off leakage ID(off) VS= 1 V and 10 V, +25C 01 0.45 nA VD= 10 V and 1 V, see figure 5 -55C to +125C 37 Channel on leakage ID, VS= VD= 1 V or 10 V, +25C 01 0.44 nA IS(on) see figure 6 -55C to +125C 32 Digital inputs section. Input high voltage VINH-55C to +125C 01 2.
35、0 V Input low voltage VINL-55C to +125C 01 0.8 V Input current IINVIN= VGNDor VDD+25C 01 0.005 typical A -55C to +125C 0.1 Digital input capacitance CIN+25C 01 5 typical pF See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-
36、,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/11612 REV PAGE 9 TABLE I. Electrical performance characteristics Continued. 1/ Test Symbol ConditionsTemperature, TADevice type Limits Unit Min Max 12 V single supply - continued. Unless otherwise specified, VDD= +12 V 10
37、%, VSS= 0 V, GND = 0 V. Dynamic characteristics section. 2/ Transition time tTRANSITIONVS= 8 V, RL= 100 , +25C 01 260 ns CL= 35 pF, see figure 7 -55C to +125C 380 Break before make time delay tBBMVS1= VS2= 8 V, RL= 100 , +25C 01 90 typical ns CL= 35 pF, see figure 8 -55C to +125C 40 Active high digi
38、tal input on time tON(EN)VS= 8 V, RL= 100 , +25C 01 210 ns CL= 35 pF, see figure 9 -55C to +125C 285 Active high digital input off time tOFF(EN)VS= 8 V, RL= 100 , +25C 01 145 ns CL= 35 pF, see figure 9 -55C to +125C 200 Charge injection VS= 6 V, RS= 0 , CL= 1 nF, see figure 10 +25C 01 -12 typical pC
39、 Off isolation f = 1 MHz, RL= 50 , CL= 5 pF, see figure 11 +25C 01 -70 typical dB Channel to channel crosstalk f = 1 MHz, RL= 50 , CL= 5 pF, see figure 12 +25C 01 -70 typical dB -3 dB bandwidth RL= 50 , CL= 5 pF, see figure 14 +25C 01 36 typical MHz Insertion loss f = 1 MHz, RL= 50 , CL= 5 pF, see f
40、igure 14 +25C 01 0.5 typical dB See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/11612 REV PAGE 10 TABLE I. Electrical performance characterist
41、ics Continued. 1/ Test Symbol ConditionsTemperature, TADevice type Limits Unit Min Max 12 V single supply continued. Unless otherwise specified, VDD= +12 V 10%, VSS= 0 V, GND = 0 V. Dynamic characteristics section - continued. 2/ Source capacitance off CS(off) f = 1 MHz +25C 01 25 typical pF Drain c
42、apacitance off CD(off) f = 1 MHz +25C 01 165 typical pF Drain and source capacitance (on) CD, CS(on) f = 1 MHz +25C 01 200 typical pF Power requirements section. VDD= 13.2 V Positive supply current IDDDigital inputs = 0 V or VDD+25C 01 0.002 typical A -55C to +125C 1 Digital inputs = 5 V +25C 220 ty
43、pical -55C to +125C 420 Positive power supply voltage VDDVSS= 0 V, GND = 0 V -55C to +125C 01 5 16.5 V See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG
44、 NO. V62/11612 REV PAGE 11 TABLE I. Electrical performance characteristics Continued. 1/ Test Symbol ConditionsTemperature, TADevice type Limits Unit Min Max 5 V dual supply . Unless otherwise specified, VDD= +5 V 10%, VSS= -5 V, 10%, GND = 0 V. Analog switch section. Analog signal range -55C to +12
45、5C 01 VSSto VDDV On resistance RONVS= 4.5 V, IS= -10 mA, +25C 01 9 VDD= +4.5 V, VSS= -4.5 V, see figure 4 -55C to +125C 12 On resistance match between channels RONVS= 4.5 V, IS= -10 mA, +25C 01 0.78 -55C to +125C 1.1 On resistance flatness RFLAT(ON)VS= 4.5 V, IS= -10 mA, +25C 01 2.5 -55C to +125C 3
46、Leakage current section. VDD= +5.5 V, VSS= -5.5 V Source off leakage IS(off) VS= 4.5 V, VD= 4.5 V, +25C 01 0.2 nA see figure 5 -55C to +125C 5 Drain off leakage ID(off) VS= 4.5 V, VD= 4.5 V, +25C 01 0.45 nA see figure 5 -55C to +125C 20 Channel on leakage ID, VS= VD= 4.5 V, +25C 01 0.3 nA IS(on) see
47、 figure 6 -55C to +125C 22 Digital inputs section. Input high voltage VINH-55C to +125C 01 2.0 V Input low voltage VINL-55C to +125C 01 0.8 V Input current IINVIN= VGNDor VDD+25C 01 0.005 typical A -55C to +125C 0.1 Digital input capacitance CIN+25C 01 5 typical pF See footnotes at end of table. Provided by IHSNot for ResaleNo reprodu
