DLA DSCC-VID-V62 12617 REV A-2012 MICROCIRCUIT DIGITAL LOW CAPACITANCE LOW CHARGE INJECTION 5 V +12 V iCMOS QUAD SPST SWITCHES MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Correct the operating temperature range in section 1.3 and the pin out in section 1.2.2. - phn 12-09-20 Thomas M. Hess Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV A A A A A A A A A A A A A PAGE 1 2 3

2、 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY Phu H. Nguyen DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil Original date of drawing YY MM DD CHECKED BY Phu H. Nguyen TITLE MICROCIRCUIT, DIGITAL, LOW CAPACITANCE, LOW CHARGE INJECTION, 15 V/+12 V iCMOS QUAD SPST SWITCHES, MONOL

3、ITHIC SILICON 12-04-09 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/12617 REV A PAGE 1 OF 13 AMSC N/A 5962-V104-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236

4、 DWG NO. V62/12617 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance low capacitance, low charge injection, 15 V/+12 V iCMOS quad SPST switches microcircuit, with an operating temperature range of -55C to +125C. 1.2 Vendor Item Drawing Administrat

5、ive Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/12617 - 01 X B Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See

6、 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 ADG1212-EP Low capacitance, low charge injection, 15 V/+12 V iCMOS quad SPST switches 1.2.2 Case outline(s). The case outlines are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 16 JEDEC MO-153-AB

7、Lead thin Shrink Small Outline Package 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other Provided by IHSNot

8、for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12617 REV A PAGE 3 1.3 Absolute maximum ratings. 1/ VDDto VSS35 V VDDto GND . -0.3 V to +35 V VSSto GND +0.3 V to -25 V Analog inputs VSS- 0.3 V

9、 to VDD+ 0.3 V 2/ or 30 mA which ever occurs first Digital inputs GND - 0.3 V to VDD+ 0.3 V 2/ or 30 mA which ever occurs first Peak current, S or D 100 mA (pulsed at 1 ms, 10% duty cycles max) Continuous current per channel, S or D 25 mA Operating temperature range . -55C to +125C Storage temperatu

10、re range . -65C to 150C Junction temperature 150C 16 lead TSSOP, JAThermal impedance (4 layer board) . 112C/W Lead temperature, soldering . As per JEDEC J-STD 020 2. APPLICABLE DOCUMENTS JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEP95 Registered and Standard Outlines for Semiconductor Devices

11、 J-STD-020 Joint IPC/JEDEC standard for moisture/reflow sensitivity classification for nonhermetic solid state surface mount devices. (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240S, Arlington

12、, VA 22201.) 1/ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implie

13、d. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. 2/ Over voltages at IN, S, or D are clamped by internal diodes. Current should be limited to the maximum ratings given. Provided by IHSNot for ResaleNo reproduction or networking permitted without li

14、cense from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12617 REV A PAGE 4 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or

15、 logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performa

16、nce characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Termina

17、l connections. The terminal connections shall be as shown in figure 2. 3.5.3 Terminal function. The terminal function shall be as shown in figure 3. 3.5.4 Truth table. The truth table shall be as shown in figure 4. 3.5.5 Functional block diagram. The functional block diagram shall be as shown in fig

18、ure 5. 3.5.6 Off leakage. The off leakage shall be as shown in figure 6. 3.5.7 On leakage. The on leakage shall be as shown in figure 7. 3.5.8 Off Isolation. The Off isolation shall be as shown in figure 8. 3.5.9 Channel-to-channel crosstalk. The channel-to-channel crosstalk shall be as shown in fig

19、ure 9. 3.5.10 On Resistance. The on resistance shall be as shown in figure 10. 3.5.11 Bandwidth. The bandwidth shall be as shown in figure 11. 3.5.12 THD + Noise. The THD + Noise shall be as shown in figure 12. 3.5.13 Switching times. The switching times shall be as shown in figure 13. 3.5.14 Charge

20、 injection. The charge injection shall be as shown in figure 14. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12617 REV A PAGE 5 TABLE I. Electrical performance character

21、istics. 1/ Test Symbol Conditions 2/ Limits Unit 25C -40C to +85C -40C to +125C Min Max Min Max Min Max Analog switch Analog signal range VDDto VSSV On Resistance RONVS= 10 V, IS= -1 mA See Figure 10 120 TYP VDD= +13.5 V, VSS= -13.5 V 190 230 260 On Resistance match between channel RONVS= 10 V, IS=

22、-1 mA 2.5 TYP 6 10 11 On Resistance flatness RFLAT(ON)VS= -5V/0 V/+V; IS= -1 mA 20 TYP 57 72 79 Leakage currents (VDD= +16.5 V, VSS= -16.5 V) Source off leakage IS(Off)VS= 10 V, VD= 10 V See Figure 6 0.02 TYP nA 0.1 0.6 1 Drain off leakage ID(Off)VS= 10 V, VD= 10 V See Figure 6 0.02 TYP 0.1 0.6 1 Ch

23、annel on leakage ID, IS(On)VS= VD= 10 V See Figure 7 0.02 TYP 0.1 0.6 1 Digital inputs Input high voltage VINH2.0 V Input low voltage VINL0.8 Input current IINLor IINH0.005 TYP 0.1 A Digital input capacitance CIN2.5 TYP pF Dynamic characteristics 3/ tONRL= 300 , CL= 35 pF, VS= 10 V; See Figure 13 65

24、 TYP ns 80 95 110 tOFFRL= 300 , CL= 35 pF, VS= 10 V; See Figure 13 80 TYP 100 115 135 Charge injection VS= 0 V, RS= 0 , CL= 1 nF, see Figure 14 -0.3 TYP pC Off isolation RL= 50 , CL= 5 pF, f = 1 MHz, See figure 8 80 TYP dB Channel to channel crosstalk RL= 50 , CL= 5 pF, f = 1 MHz, See figure 9 90 TY

25、P Total harmonic distortion + Noise RL= 10 k, 5 V rms, f = 20 Hz to 20 kHz, See figure 12 0.15 TYP % -3 dB bandwidth RL= 50 , CL= 5 pF, See Figure 11 1000 TYP MHz CS(Off)VS= 0 V, f = 1 MHz 1.1 pF CD(Off)1.2 CD, CS(On)3 Power requirements (VDD= +16.5 V, VSS= -16.5 V) IDDDigital inputs = 0 V or VDD0.0

26、01 TYP 1.0 A IDDDigital inputs = 5 V 220 TYP 420 ISSDigital inputs = 0 V or VDD0.001 TYP 1.0 ISSDigital inputs = 5 V 0.001 TYP 1.0 See footnote at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE

27、 A CODE IDENT NO. 16236 DWG NO. V62/12617 REV A PAGE 6 TABLE I. Electrical performance characteristics - Continued. 1/ Test Symbol Conditions 4/ Limits Unit 25C -40C to +85C -40C to +125C Min Max Min Max Min Max Analog switch Analog signal range 0 V to VDDV On Resistance RONVS=0 V to10 V, IS= -1 mA

28、See Figure 10 300 TYP VDD= 10.8 V, VSS= 0 V 475 567 625 On Resistance match between channel RONVS= 0 V to10 V, IS= -1 mA 4.5 TYP 12 26 27 On Resistance flatness RFLAT(ON)VS= -3V/6 V, 9 V/+V; IS= -1 mA 60 TYP Leakage currents (VDD= 13.2 V, VSS= 0 V) Source off leakage IS(Off)VS= 10 V, VD= 10 V See Fi

29、gure 6 0.02 TYP nA 0.1 0.6 1 Drain off leakage ID(Off)VS= 10 V, VD= 10 V See Figure 6 0.02 TYP 0.1 0.6 1 Channel on leakage ID, IS(On)VS= VD= 10 V See Figure 7 0.02 TYP 0.1 0.6 1 Digital inputs Input high voltage VINH2.0 V Input low voltage VINL0.8 Input current IINLor IINH0.001 TYP 0.1 A Digital in

30、put capacitance CIN3 TYP pF Dynamic characteristics 3/ tONRL= 300 , CL= 35 pF, VS= 8 V; See Figure 13 80 TYP ns 105 125 140 tOFFRL= 300 , CL= 35 pF, VS= 8 V; See Figure 13 90 TYP 115 140 165 Charge injection VS= 6 V, RS= 0 , CL= 1 nF, see Figure 14 0 TYP pC Off isolation RL= 50 , CL= 5 pF, f = 1 MHz

31、, See figure 8 80 TYP dB Channel to channel crosstalk RL= 50 , CL= 5 pF, f = 1 MHz, See figure 9 90 TYP -3 dB bandwidth RL= 50 , CL= 5 pF, See Figure 11 900 TYP MHz CS(Off)VS= 0 V, f = 1 MHz 1.4 pF CD(Off)1.5 CD, CS(On)3.9 Power requirements (VDD= +16.5 V, VSS= -16.5 V) IDDDigital inputs = 0 V or VD

32、D0.001 TYP 1.0 A ISSDigital inputs = 5 V 220 TYP 420 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters

33、may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. 2/ VDD= 15 V 10%, VSS= - 15 V 10%, GND = 0 V, unless otherwise noted. 3/ Guaranteed by design, not subject to production test. 4/ VDD= 12 V 10%, VSS= 0 V, G

34、ND = 0 V, unless otherwise noted Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12617 REV A PAGE 7 Case X ebE E1D1 816 9AA1SEE DETAIL ASEATINGPLANEcL0-8DETAIL APIN 1IDENTIF

35、IERDimensions Symbol Millimeters Symbol Millimeters Min Max Min Max A 1.20 E 4.30 4.50 A1 0.05 0.15 E1 6.40 BSC b 0.19 0.30 e 0.65 BSC c 0.09 0.20 L 0.45 0.75 D 4.90 5.10 NOTES: 1. All linear dimensions are in millimeters. 2. Falls within JEDEC MO-15-AB3. FIGURE 1. Case outline. Provided by IHSNot f

36、or ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12617 REV A PAGE 8 Case outline X Terminal number Terminal symbol Terminal number Terminal symbol 1 IN1 9 IN3 2 D1 10 D3 3 S1 11 S3 4 VSS12 NC 5

37、GND 13 VDD6 S4 14 S2 7 D4 15 D2 8 IN4 16 IN2 NOTES: 1. NC = No Connect. Do not connect to this pin. FIGURE 2. Terminal connections. Case outline X Terminal Description Number Mnemonic 1 IN1 Logic control input. 2 D1 Drain terminal. This pin can be an input or output. 3 S1 Source terminal. This pin c

38、an be an input or output. 4 VSSMost negative power supply potential. 5 GND Ground (0 V) reference. 6 S4 Source terminal. This pin can be an input or output. 7 D4 Drain terminal. This pin can be an input or output. 8 IN4 Logic control input. 9 IN3 Logic control input. 10 D3 Drain terminal. This pin c

39、an be an input or output. 11 S3 Source terminal. This pin can be an input or output. 12 NC No connection. 13 VDDMost positive power supply potential. 14 S2 Source terminal. This pin can be an input or output. 15 D2 Drain terminal. This pin can be an input or output. 16 IN2 Logic control input. FIGUR

40、E 3. Terminal function. Input INx Switch condition 1 On 0 Off FIGURE 4. Truth table Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12617 REV A PAGE 9 IN1S1D1IN2S2D2IN3S3D3I

41、N4S4D4NOTES: 1. Switches shown are for logic 1 input. FIGURE 5. Functional block diagram. AAS DVSVDIS(OFF)ID(OFF)S DVSIDSION=V1/IDSV1FIGURE 6. Off Leakage. FIGURE 7. On Leakage Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COL

42、UMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12617 REV A PAGE 10 VDDVDD0.1 F 0.1 FVSSVSSSD50NETWORKANALYZER5050VSVOUTINVINGNDRLOff Isolation = 20 log VOUTVSFIGURE 8. Off isolation. VDDVDD0.1 F 0.1 FVSSVSSNETWORKANALYZER50VSGNDRL50RS1S2DVOUTChannel-to-channel crosstalk = 20 log VOUTVSFIGURE 9.

43、 Channel-to-channel crosstalk. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12617 REV A PAGE 11 AVDID(ON)S DNCNC=NO CONNECTFIGURE 10. On resistance. VDDVDD0.1 F 0.1 FVSSV

44、SSSDNETWORKANALYZER5050VSVOUTINVINGNDRLInsertion loss = 20 log VOUTWITH SwitchVOUTWITOUT SWITCHFIGURE 11. Bandwidth VDDVDD0.1 F 0.1 FVSSVSSSDVSVOUTINVINGND 10 kRLRSVP-PAUDIO PRECISIONFIGURE 12. THD + Noise Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-

45、,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12617 REV A PAGE 12 VDDVDD0.1 F 0.1 FVSSVSSS D300INGNDRLVS35 pFCLVOUTVOUTVIN90%50%ONtOFFtFIGURE 13. Switching times. VDDVDDVSSVSSS DINGNDVS1 nFCLVOUTVOUTVINRSOFFONVOUTVOUT=CLxQINJFIGURE 14. Charge injection. Provided by

46、 IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/12617 REV A PAGE 13 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection an

47、d test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers standard commercial practices for electrostatic discharge sensit

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