DLA SMD-5962-76036 REV E-2006 MICROCIRCUIT DIGITAL BIPOLAR LOW POWER SCHOTTKY TTL COUNTER MONOLITHIC SILICON《硅单片计算器肖脱基小功率TTL双极数字微型电路》.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED B Add vendor, FSCM 04713. Delete min limits from IILand prop delays. Change FMAX. Editorial changes throughout. 86-01-02 N. A. HAUCK C Convert to military drawing format. Delete vendors CAGE 34335, CAGE 07263, CAGE 27014 and CAGE 18324. Add logic d

2、iagram. Table I, change: fMAX(CL= 50 pF, subgroups 10 and 11) from 15 MHz to 14 MHz. tPHL2and tPLH2(CL= 15 pF, subgroups 10 and 11) from 33 ns to 34 ns. Figure 2, truth table, for CLR(H) under mode, change “Preset (Asyn.)“ to “CLEAR/RESET“. Add LCC package (add changes). Editorial changes throughout

3、. 87-10-01 R. P. EVANS D Update to reflect latest changes in format and requirements. Editorial changes throughout. - les 03-05-09 R. MONNIN E Make correction to the 3.5 Marking paragraph to remove the 5962- option. - ro 06-04-03 R. MONNIN CURRENT CAGE CODE 67268 THE ORIGINAL FIRST PAGE OF THIS DRAW

4、ING HAS BEEN REPLACED. REV SHET REV SHET REV STATUS REV E E E E E E E E E E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY T. E. GORDON DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY ROBERT R. GONZALAS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING

5、IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY N. A. HAUCK AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 76-11-24 MICROCIRCUIT, DIGITAL, BIPOLAR, LOW POWER SCHOTTKY TTL, COUNTER, MONOLITHIC SILICON AMSC N/A REVISION LEVEL E SIZE A CAGE CODE 14933 76036 SHEET 1 OF 10 DSCC FORM

6、2233 APR 97 5962-E287-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76036 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawi

7、ng describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 76036 01 X X Drawing number Device type (see 1.2.1) Case outline(

8、see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54LS192 Synchronous 4-bit up/down decade counter, with clear enable 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-S

9、TD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolu

10、te maximum ratings. Supply voltage range . -0.5 V dc to +7.0 V dc Input voltage range . -1.5 V dc at -18 mA to +5.5 V dc Storage temperature range -65C to +150C Maximum power dissipation (PD) 190 mW 1/ Lead temperature (soldering, 10 seconds) +300C Junction temperature (TJ) +175C Thermal resistance,

11、 junction-to-case (JC): Cases E, F, and 2 See MIL-STD-1835 1.4 Recommended operating conditions. Supply voltage range (VCC) 4.5 V dc minimum to 5.5 V dc maximum Minimum high level input voltage (VIH) 2.0 V dc Maximum low level input voltage (VIL) . 0.7 V dc Case operating temperature range (TC) -55C

12、 to +125C _ 1/ Must withstand the added PDdue to short circuit test; e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76036 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET

13、 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the

14、solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTM

15、ENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 R

16、obbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unl

17、ess a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufactu

18、rer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This

19、 QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance

20、with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordan

21、ce with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.3 Electrical performance characteristics. Un

22、less otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical test

23、s for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76036 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 4 DSCC FORM 2234 APR 97 TABLE I.

24、Electrical performance characteristics. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroupsDevice type Limits Unit Min Max High level output voltage VOHVCC= 4.5 V, IOH= -0.4 mA, VIH= 2.0 V, VIL= 0.7 V 1, 2, 3 01 2.5 V Low level output voltage VOLVCC= 4.5 V, IOL= 4.0 mA,

25、 VIH= 2.0 V, VIL= 0.7 V 1, 2, 3 01 0.4 V Input clamp voltage VICVCC= 4.5 V, IIN= -18 mA 1 01 -1.5 V Low level input current IILVCC= 5.5 V, VIL= 0.4 V 1, 2, 3 01 -0.4 mA High level input current IIH1VCC= 5.5 V, VIH= 2.7 V 1, 2, 3 01 20 A IIH2VCC= 5.5 V, VIH= 5.5 V 1, 2, 3 01 100 A Short circuit outpu

26、t current IOSVCC= 5.5 V, VOUT= 0.0 V 1/ 1, 2, 3 01 -15 -130 mA Supply current ICCVCC= 5.5 V 1, 2, 3 01 34 mA Functional tests See 4.3.1c 7 01 9 01 25 MHz Maximum clock frequency fMAX VCC= 5.0 V, RL= 2 k 5% CL= 15 pF 10% 10, 11 15 9 20 CL= 50 pF 10% 10, 11 14 tPHL19 01 24 ns VCC= 5.0 V, RL= 2 k 5% CL

27、= 15 pF 10% 10, 11 34 9 29 Propagation delay time, output from count-up to carry 2/ CL= 50 pF 10% 10, 11 41 tPLH19 01 26 ns CL= 15 pF 10% 10, 11 36 9 31 CL= 50 pF 10% 10, 11 45 tPHL29 01 24 ns CL= 15 pF 10% 10, 11 34 9 29 Propagation delay time, output from count-down to borrow CL= 50 pF 10% 10, 11

28、41 tPLH29 01 24 ns CL= 15 pF 10% 10, 11 34 9 29 CL= 50 pF 10% 10, 11 41 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76036 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990

29、 REVISION LEVEL E SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroupsDevice type Limits Unit Min Max tPHL39 01 47 ns Propagation delay time, output from either count to Q VCC= 5.0

30、 V, RL= 2 k 5% CL= 15 pF 10% 10, 11 68 9 52 2/ CL= 50 pF 10% 10, 11 72 tPLH39 01 38 ns CL= 15 pF 10% 10, 11 53 9 43 CL= 50 pF 10% 10, 11 60 tPHL49 01 40 ns Propagation delay time, output from load to Q CL= 15 pF 10% 10, 11 56 9 45 CL= 50 pF 10% 10, 11 63 tPLH49 01 40 ns CL= 15 pF 10% 10, 11 56 9 45

31、CL= 50 pF 10% 10, 11 63 tPHL59 01 35 ns Propagation delay time, output from clear to Q CL= 15 pF 10% 10, 11 49 9 40 CL= 50 pF 10% 10, 11 56 1/ Not more than one output should be shorted at a time, and the duration of the short-circuit condition should not exceed one second. 2/ Propagation delay time

32、 testing may be performed using either CL= 15 pF or CL= 50 pF. However, the manufacturer must certify and guarantee that the microcircuits meet the switching test limits specified for a 50 pF load. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STAN

33、DARD MICROCIRCUIT DRAWING SIZE A 76036 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 6 DSCC FORM 2234 APR 97 Device type 01 Case outlines E and F 2 Terminal number Terminal symbol 1 B NC 2 QBB 3 QAQB4 DOWN QA5 UP DOWN 6 QCNC 7 QDUP 8 GND QC9 D QD10 C GND 11 LOAD NC

34、12 CO D 13 BO C 14 CLR LOAD 15 A CO 16 VCCNC 17 - - - BO 18 - - - CLR 19 - - - A 20 - - - VCCNC = No connection FIGURE 1. Terminal connections. CLR LOAD CPU CPD MODE H X X X Reset / clear L L X X Preset (Asyn.) L H H H No change L H CP H Count up L H H CP Count down H = High voltage level. L = Low v

35、oltage level. X = Dont care condition. CP = Clock pulse FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76036 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET

36、7 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76036 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 8 DSCC FORM 2234 APR 97 3.5 Ma

37、rking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in com

38、pliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer

39、in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirem

40、ents herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects t

41、his drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and

42、 inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria sha

43、ll apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the

44、inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to b

45、urn-in are optional at the discretion of the manufacturer. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a

46、. Tests shall be as specified in table II herein. b. Subgroups 4, 5, 6, and 8 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroup 7 shall include verification of the truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDA

47、RD MICROCIRCUIT DRAWING SIZE A 76036 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 9 DSCC FORM 2234 APR 97 TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical param

48、eters (method 5004) - Final electrical test parameters (method 5004) 1*, 2, 3, 9 Group A test requirements (method 5005) 1, 2, 3, 7, 9, 10*, 11* Groups C and D end-point electrical parameters (method 5005) 1, 2, 3 * PDA applies to subgroup 1. * Subgroups 10 and 11, if not tested, shall be guaranteed to the specified limits in table I. 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 100

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