1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED F Convert to military drawing format. Change Code Ident. No. to 67268. Change max. clock frequency at temp. subgroups 10 and 11 at 15 pF. Add LCC package. 87-10-17 N. A. Hauck G Update to reflect latest changes in format and requirements. Editorial
2、 changes throughout. -les 03-01-07 Raymond Monnin H Update to reflect latest changes in format and requirements. Correct paragraph in 3.5. Editorial changes throughout. les 05-08-16 Raymond Monnin THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. CURRENT CAGE CODE 67268 REV SHET REV SHET RE
3、V STATUS REV H H H H H H H H H H H H OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Joseph A. Kerby DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTM
4、ENTS APPROVED BY N. A. Hauck MICROCIRCUIT, DIGITAL, LOW-POWER SCHOTTKY TTL, COUNTERS, MONOLITHIC AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 76-03-19 SILICON AMSC N/A REVISION LEVEL H SIZE A CAGE CODE 14933 76009 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E453-05 Provided by IHSNot
5、 for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76009 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-ST
6、D-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 76009 01 E X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Devi
7、ce type. The device type identify the circuit function as follows: Device type Generic number Circuit function 01 54LS191 Synchronous, up/down counter with down/up mode control 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designa
8、tor Terminals Package style E GDIP1-T16 or CDIP2-T16 16 dual-in-line F GDFP2-F16 or CDFP3-F16 16 flat 2 CQCC1-N20 20 square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage . -0.5 V dc to +7.0 V dc Input voltag
9、e range . -1.5 V dc at -18 mA to +5.5 V dc Storage temperature range -65C to +150C Maximum power dissipation (PD) 1/ . 192mW Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditi
10、ons. Supply voltage range (VCC) . 4.5 V dc minimum to 5.5 V dc maximum Minimum high level input voltage (VIH) . 2.0 V dc Maximum low level input voltage (VIL) 0.7 V dc Case operating temperature range (TC) -55C to +125C _ 1/ Maximum power dissipation is defined as VCCx ICC, and must withstand the ad
11、ded PDdue to short-circuit test; e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76009 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 3 DSCC FORM 2234 APR 97 2. APPLICAB
12、LE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT
13、 OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-10
14、3 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadel
15、phia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been ob
16、tained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qual
17、ified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quali
18、ty Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to id
19、entify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal
20、 connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the
21、 electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in
22、 table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-S
23、TANDARD MICROCIRCUIT DRAWING SIZE A 76009 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 4 DSCC FORM 2234 APR 97 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. T
24、he compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved so
25、urce of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conform
26、ance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and revie
27、w. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted wi
28、thout license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76009 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgr
29、oupsDevice type Limits Unit Min Max High level output voltage VOH VCC = 4.5 V, IOH = -400 A VIN= 0.7 V or 2.0 V 1, 2, 3 All 2.5 V Low level output voltage VOL VCC= 4.5 V, IOL= 4 mA VIN= 0.7 V or 2.0 V 1, 2, 3 All 0.4 V Input clamp voltage VIC VCC= 4.5 V, IIN= -18 mA, TC= +25C 1 All -1.5 V High level
30、 input current, enable input IIH1 VCC= 5.5 V, VIN= 2.7 V 1, 2, 3 All 60 A High level input current, other inputs IIH2 1, 2, 3 All 20 A High level input current, enable input IIH3 VCC= 5.5 V, VIN= 5.5 V 1, 2, 3 All 0.3 mA High level input current, other inputs IIH4 1, 2, 3 All 0.1 mA Low level input
31、current, enable input IIL1 VCC= 5.5 V, VIN= 0.4 V 1, 2, 3 All -1.2 mA Low level input current, other inputs IIL2 1, 2, 3 All -0.4 mA Short-circuit output current IOS VCC= 5.5 V 1/ 1, 2, 3 All -20 -100 mA Supply current ICCVCC= 5.5 V 1, 2, 3 All 35 mA Functional tests See 4.3.1c 7 All fMAX 9 All 20 M
32、Hz VCC= 5.0 V, RL= 2 k 5% CL= 15 pF 10% 10, 11 All 12 MHz 9 15 Maximum clock frequency 2/ CL= 50 pF 10% 10, 11 All 10 MHz tPHL150 ns CL= 15 pF 10% 10, 11 All 70 ns 9 55 Propagation delay time, high to low level, load to QA, QB, QC, QDCL= 50 pF 10% 10, 11 All 77 ns tPLH133 CL= 15 pF 10% 10, 11 All 46
33、 ns 9 38 Propagation delay time, low to high level, load to QA, QB, QC, QDCL= 50 pF 10% 10, 11 All 53 ns tPHL240 CL= 15 pF 10% 10, 11 All 56 ns 9 45 Propagation delay time, high to low level, data A, B, C , D to QA, QB, QC, QDCL= 50 pF 10% 10, 11 All 63 ns See footnotes at end of table. Provided by
34、IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76009 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test S
35、ymbol Conditions -55C TC +125C unless otherwise specified Group A subgroupsDevice type Limits Unit Min Max tPLH29 All 32 ns VCC= 5.0 V, RL= 2 k 5% CL= 15 pF 10% 10, 11 All 45 ns 37 Propagation delay time, low to high level, data A, B, C , D to QA, QB, QC, QD2/ CL= 50 pF 10% 10, 11 All 52 ns tPHL39 2
36、4 CL= 15 pF 10% 10, 11 All 34 ns 29 Propagation delay time, high to low level, clock to ripple clock CL= 50 pF 10% 10, 11 All 41 ns tPLH39 20 CL= 15 pF 10% 10, 11 All 28 ns 25 Propagation delay time, low to high level, clock to ripple clock CL= 50 pF 10% 10, 11 All 35 ns tPHL49 36 CL= 15 pF 10% 10,
37、11 All 50 ns 41 Propagation delay time, high to low level, clock to QA, QB, QC, QDCL= 50 pF 10% 10, 11 All 57 ns tPLH49 24 CL= 15 pF 10% 10, 11 All 34 ns 29 Propagation delay time, low to high level, clock to QA, QB, QC, QDCL= 50 pF 10% 10, 11 All 41 ns tPHL59 52 CL= 15 pF 10% 10, 11 All 73 ns 57 Pr
38、opagation delay time, high to low level, clock to maximum CL= 50 pF 10% 10, 11 All 80 ns tPLH59 42 CL= 15 pF 10% 10, 11 All 59 ns 47 Propagation delay time, low to high level, clock to maximum CL= 50 pF 10% 10, 11 All 66 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction
39、or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76009 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C un
40、less otherwise specified Group A subgroupsDevice type Limits Unit Min Max tPHL69 All 45 ns VCC= 5.0 V, RL= 2 k 5% CL= 15 pF 10% 10, 11 All 63 ns 50 Propagation delay time, high to low level, down/up to ripple clock 2/ CL= 50 pF 10% 10, 11 All 70 ns tPLH69 45 CL= 15 pF 10% 10, 11 All 63 ns 50 Propaga
41、tion delay time, low to high level, down/up to ripple clock CL= 50 pF 10% 10, 11 All 70 ns tPHL79 33 CL= 15 pF 10% 10, 11 All 46 ns 38 Propagation delay time, high to low level, down/up to maximum CL= 50 pF 10% 10, 11 All 53 ns tPLH79 33 CL= 15 pF 10% 10, 11 All 46 ns 38 Propagation delay time, low
42、to high level, down/up to maximum CL= 50 pF 10% 10, 11 All 53 ns tPHL89 33 CL= 15 pF 10% 10, 11 All 46 ns 38 Propagation delay time, high to low level, enable to ripple clock CL= 50 pF 10% 10, 11 All 53 ns tPLH89 33 CL= 15 pF 10% 10, 11 All 46 ns 38 Propagation delay time, low to high level, enable
43、to ripple clock CL= 50 pF 10% 10, 11 All 53 ns 1/ Not more than one output should be shorted at a time, and the duration of the short-circuit condition should not exceed one second. 2/ Propagation delay time testing may be performed using either CL= 15 pF or CL= 50 pF. However, the manufacturer must
44、 certify and guarantee that the microcircuits meet the switching test limits specified for a 50 pF load. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76009 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-39
45、90 REVISION LEVEL H SHEET 8 DSCC FORM 2234 APR 97 Device types 01 01 Case outlines E, F 2 Terminal number Terminal symbols Terminal symbols 1 B N/C 2 QBB 3 QAQB4 CTEN QA 5 D/ U CTEN 6 QCN/C 7 QDD/ U 8 GND QC9 D QD10 C GND 11 LOAD N/C 12 MAX MIN D 13 RCO C 14 CLK LOAD 15 A MAX MIN 16 VCC N/C 17 - - -
46、 RCO 18 - - - CLK 19 - - - A 20 - - - VCC FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76009 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 9 DSC
47、C FORM 2234 APR 97 Up Count Output RIP CLK Down Count Output RIP CLK QDQCQBQAQAQBQCQD0 L L L L H 15 H H H H H 1 L L L H H 14 L H H H H 2 L L H L H 13 H L H H H 3 L L H H H 12 L L H H H 4 L H L L H 11 H H L H H 5 L H L H H 10 L H L H H 6 L H H L H 9 H L L H H 7 L H H H H 8 L L L H H 8 H L L L H 7 H H
48、 H L H 9 H L L H H 6 L H H L H 10 H L H L H 5 H L H L H 11 H L H H H 4 L L H L H 12 H H L L H 3 H H L L H 13 H H L H H 2 L H L L H 14 H H H L H 1 H L L L H 15 H H H H L 0 L L L L L H = High voltage level L = Low voltage level FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 76009 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 10 DSCC FORM 2234 APR 97 FIGURE
