1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED D Add device type 02. Add CAGE 04713 as supplier. Editorial changes throughout. 93-08-20 Monica L. Poelking E Changes in accordance with NOR 5962-R013-94. 93-10-21 Monica L. Poelking F Add device type 03. Add CAGE 27014 as supplier. Editorial chang
2、es throughout. 94-01-05 Monica L. Poelking G Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. LTG 03-07-09 Thomas M. Hess H Made change to paragraph 3.5. Update boilerplate to MIL-PRF-38535 requirements. LTG 05-01-26 Thomas M. Hess J Update boilerplate paragraphs to th
3、e current MIL-PRF-38535 requirements. - LTG 11-07-26 Thomas M. Hess CURRENT CAGE CODE 67268 REV SHET REV SHET REV STATUS REV J J J J J J J J J J J J J OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY Marcia B. Kelleher DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc.
4、dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Monica L. Poelking APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, CMOS, TRIPLE 2-CHANNEL ANALOG MULTIPLEXER/ DEMULTIPLEXER, MONOLITHIC SILICON
5、DRAWING APPROVAL DATE 82-02-04 REVISION LEVEL J SIZE A CAGE CODE 14933 81018 SHEET 1 OF 13 DSCC FORM 2233 APR 97 5962-E434-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 81018 DLA LAND AND MARITIME COLUMBUS, O
6、HIO 43218-3990 REVISION LEVEL J SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown
7、 in the following example: 81018 01 E A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 4053B Triple 2-channel analog multiplexer/dem
8、ultiplexer 02 14053B Triple 2-channel analog multiplexer/demultiplexer 03 4053B Triple 2-channel analog multiplexer/demultiplexer 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or
9、CDIP2-T16 16 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat pack 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VDD): Device type 01 -0.5 V dc to +20 V dc Device types 02 and 03 -0.5 V dc to +18 V dc Input
10、voltage range -0.5 V dc to VDD+ 0.5 V dc DC input current . 10 mA Storage temperature range -65C to +150C Maximum power dissipation (PD): Device types 01 and 03 500 mW 4/ Device type 02 300 mW 4/ Lead temperature (soldering, 10 seconds): Device types 01 and 02 +300C Device type 03 +260C Thermal resi
11、stance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) . +175C _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Voltages referenced to VSSor VEE, w
12、hichever is more negative. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. 4/ For TC= +100C to +125C, derate linearly at 12 mW/C to 200 mW. Provided by IHSNot for ResaleNo reproduction or networking permitted
13、 without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 81018 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage range (VDD): Device type 01 +3.0 V dc to +18 V dc Device types 02 and 03 +3.0 V
14、 dc to +15 V dc Case operating temperature range (TC) . -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issu
15、es of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standar
16、d Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document
17、Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws an
18、d regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qu
19、alified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MI
20、L-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification ma
21、rk in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s). The case outline(s)
22、 shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms
23、 and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 81018 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL J
24、 SHEET 4 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test r
25、equirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may al
26、so be marked as listed in MIL-HDBK-103 (see 6.6 herein). 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in a
27、ccordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted
28、to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, append
29、ix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agen
30、t, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from
31、IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 81018 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions -55C TC+125C unless otherwise specified Group A subgroups Device type Limits
32、Unit Min Max Quiescent supply current IDDVDD= 5 V 1/ VIN= 0.0 V or VDD1, 3 All 5.0 A 2 150VDD= 10 V 1/ VIN= 0.0 V or VDD1, 3 All 10.0 2 300VDD= 15 V 1/ VIN= 0.0 V or VDD1, 3 All 20.0 2 600VDD= 20 V 2/ VIN= 0.0 V or VDD1, 3 01 100 2 3000Low level input voltage VILVDD= 5 V VEE= VSSRL= 1 k to VSSIOL =
33、+2 A VO= 0.5 V or 4.5 V 1, 2, 3 All 1.5 V VDD= 10 V, VEE= VSSRL= 1 k to VSS1/ IOL = +2 A VO= 1.0 V or 9.0 V 1, 2, 3 All 3.0 VDD= 15 V, VEE= VSSRL= 1 k to VSS IOL = +2 A VO= 1.5 V or 13.5 V 1, 2, 3 All 4.0 High level input voltage VIHVDD= 5 V, VEE= VSSRL= 1 k to VSS IOH = -2 A VO= 0.5 V or 4.5 V 1, 2
34、, 3 All 3.5 V VDD= 10 V, VEE= VSSRL= 1 k to VSS1/ IOH = -2 A VO= 1.0 V or 9.0 V 1, 2, 3 All 7.0 VDD= 15 V, VEE= VSSRL= 1 k to VSS IOH = -2 A VO= 1.5 V or 13.5 V 1, 2, 3 All 11.0 Input current IIN VDD= 15 V VIN= 0.0 V or VDD1, 3 02, 03 0.1 A 2 1.0 VDD= 20 V VIN= 0.0 V or VDD2/ 1, 3 01 0.1 2 1.0 Input
35、 capacitance CINVIN= 0.0 V TC= +25C See 4.3.1c 4 01, 02 7.5 pF Control inputs A, B, C 4 03 7.5 Signal (IN/OUT) inputs ax, bx, ay, by, cy, cx 15 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWI
36、NG SIZE A 81018 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Test conditions -55C TC+125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max OFF channe
37、l leakage current (all channels off) IOFF1VDD= 18 V VEE= 0.0 V 1, 3 01 -100 +100 nA 2 -1000 +1000VDD= 15 V VEE= 0.0 V 1, 3 02 -100 +100 2 -1000 +1000VDD= 15 V VEE= 0.0 V 1, 3 03 -200 +200 2 -2000 +2000OFF channel leakage current (any channels off) IOFF2VDD= 18 V VEE= 0.0 V 1, 3 01 -100 +100 2 -1000
38、+1000VDD= 15 V VEE= 0.0 V 1, 3 02 -100 +100 2 -1000 +1000VDD= 15 V VEE= 0.0 V 1, 3 03 -50 +50 2 -500 +500 On-state resistance RONVDD= 5.0 V VEE= 0.0 V VSS= 0.0 V 1 01, 02 1050 2 13003 8001 03 2500 2 35003 2000VDD= 10 V VEE= 0.0 V VSS= 0.0 V 1 01 400 2 5503 3101 02 500 2 5503 4001 03 400 2 5803 310VD
39、D= 15 V VEE= 0.0 V VSS= 0.0 V 1 01 240 2 3203 2001 02 280 2 3203 2201 03 280 2 4003 220Functional test See 4.3.1d 7 All See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 81018 DLA LAND
40、 AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Test conditions -55C TC+125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Propagation delay time, signal inp
41、ut to output tPHL1, tPLH1RL= 200 k CL= 50 pF tr= tf= 20 ns See figure 4 VDD= 5 V 3/ 9 01 1.5 60 ns 10, 11 1.5 78 VDD= 10 V 3/ 9 01 1.5 3010, 11 1.5 39 VDD= 15 V 3/ 9 01 1.5 2010, 11 1.5 26 Propagation delay time, address to signal output tPHL2, tPLH2RL= 10 k CL= 50 pF tr= tf= 20 ns See figure 4 VDD=
42、 5 V 3/ 9 01 1.5 72010, 11 1.5 936 VDD= 10 V 3/ 9 01 1.5 32010, 11 1.5 416 VDD= 15 V 3/ 9 01 1.5 24010, 11 1.5 312 Propagation delay time, inhibit to signal out (channel turning ON) tPZH1, tPZL1RL= 10 k CL= 50 pF tr= tf= 20 ns See figure 4 VDD= 5 V 9 01 1.5 720 10, 11 1.5 936 VDD= 10 V 1/ 9 01 1.5 3
43、2010, 11 1.5 416 VDD= 15 V 1/ 9 01 1.5 24010, 11 1.5 312 Propagation delay time, inhibit to signal out (channel turning OFF) tPHZ1, tPLZ1RL= 1 k CL= 50 pF tr= tf= 20 ns See figure 4 VDD= 5 V 9 01 1.5 450 10, 11 1.5 585 VDD= 10 V 1/ 9 01 1.5 21010, 11 1.5 273 VDD= 15 V 1/ 9 01 1.5 16010, 11 1.5 208 P
44、ropagation delay time, signal input to output tPHL3, tPLH3RL= 10 k CL= 50 pF tr= tf= 20 ns See figure 4 VDD= 5 V 9 02 65 10, 11 97.5 VDD= 10 V 9 02 30 10, 11 39 VDD= 15 V 9 02 20 10, 11 26 Propagation delay time, address to signal output tPHL4, tPLH4VDD= 5 V 9 02 720 10, 11 936 VDD= 10 V 9 02 320 10
45、, 11 416 VDD= 15 V 9 02 240 10, 11 312 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 81018 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 8 DSCC FORM 2234 A
46、PR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Test conditions -55C TC+125C unless otherwise specified Group A subgroups Device Type Limits Unit Min Max Propagation delay time, inhibit to signal out (channel turning ON) tPZH2, tPZL2RL= 10 k CL= 50 pF tr= tf= 20 ns See
47、 figure 4 VDD= 5 V 9 02 720 ns 10, 11 936 VDD= 10 V 9 02 320 10, 11 420 VDD= 15 V 9 02 240 10, 11 330 Propagation delay time, inhibit to signal out (channel turning OFF) tPHZ2, tPLZ2RL= 10 k CL= 50 pF tr= tf= 20 ns See figure 4 VDD= 5 V 9 02 550 10, 11 825 VDD= 10 V 9 02 280 10, 11 420 VDD= 15 V 9 0
48、2 220 10, 11 330 Propagation delay time, signal input to output tPHL5, tPLH5RL= 1 k CL= 50 pF tr= tf= 20 ns See figure 4 VDD= 5 V 4/ 9 03 1.5 55 10, 11 1.5 80 VDD= 10 V 1/ 9 03 1.5 3510, 11 1.5 50 VDD= 15 V 1/ 9 03 1.5 2510, 11 1.5 35 Propagation delay time, address to signal output tPHL6, tPLH6RL= 1 k CL= 50 pF tr= tf= 20 ns See figure 4 VDD= 5 V 4/ 9 03 1.5 100010, 11 1.5 1400 VDD= 10 V 1/ 9 03 1.5 36010, 11 1.5 505 VDD= 15 V 1/ 9 03 1.5 24010, 11 1.5 335 Propagation
