1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED C Split VILinto temperatures. Add figure 4. Add footnotes to table I. Add minimum prop. delays. Change maximum prop. delays. Change in table II. Editorial changes throughout. Change VICtesting and parameter in Table I. Change test conditions for pr
2、opagation delay times, IIL, IIH, and IO. Change figure numbering. 88-05-16 M. A. Frye D Changes in accordance with NOR 5962-R131-92. 92-02-20 Monica L. Poelking E Changes in accordance with NOR 5962-R333-92. 92-10-05 Monica L. Poelking F Redraw with changes. Update to current requirements. Editorial
3、 changes throughout. 05-10-26 Raymond Monnin CURRENT CAGE CODE 67268 REV SHET REV SHET REV STATUS REV F F F F F F F F F F F F F F OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Monica L. Poelking DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Ray Monni
4、n COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED LOW POWER SCHOTTKY, TTL, TRANSCEIVER, AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 26 APRIL 1984 MONOLITHIC
5、SILICON AMSC N/A REVISION LEVEL F SIZE A CAGE CODE 14933 84013 SHEET 1 OF 14 DSCC FORM 2233 APR 97 5962-E026-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84013 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 4
6、3218-3990 REVISION LEVEL F SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in t
7、he following example: 84013 01 C X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ALS242B Quadruple bus transceiver with 3 state o
8、utputs 02 54ALS243A Quadruple bus transceiver with 3 state outputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 dual-in-line D GDFP1-F14 OR CDFP2-F14 14 flat 2 CQ
9、CC1-N20 20 square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range -0.5 V dc minimum to +7.0 V dc maximum Input voltage range (All inputs) . -1.2 V dc at -18 mA to +7.0 V dc Input voltage range (I/O ports
10、) -1.2 V dc at -18 mA to +5.5 V dc Storage temperature range -65C to +150C Maximum power dissipation (PD) 1/ : Device 01 148.5 mW Device 02 203.5 mW Lead temperature range (soldering 10 seconds) 300C Thermal resistance, junction to case (JC). See MIL-M-38510, appendix C Junction temperature (TJ) +17
11、5C 1.4 Recommended operating conditions. Supply voltage (VCC) . 4.5 V dc to 5.5 V dc Minimum high level input voltage (VIH) . 2.0 V dc Operating power dissipation (PD) (outputs open): VIL= +125C . 0.7 V dc VIL= +25C . 0.8 V dc VIL= -55C . 0.8 V dc Normalized fanout (each input) 2/ . 20 maximum Case
12、operating temperature range (TC) . -55C to +125C _ 1/ Maximum power dissipation is defined as VCCx ICCand must withstand the added PDdue to short circuit test; e.g. IO. 2/ The device will fanout in both high and low levels to the specified number of data inputs for the same device type as that being
13、 tested.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84013 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specific
14、ation, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38
15、535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Dr
16、awings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil;quicksearch/ or www.dodssp.daps.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precede
17、nce. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. Provided by IHSNot for ResaleNo re
18、production or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84013 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accor
19、dance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-3
20、8535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications sh
21、all not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The d
22、esign, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth tables.
23、 The truth tables shall be as specified on figure 2. 3.2.4 Logic diagrams. The logic diagrams shall be as specified on figure 3. 3.2.5 Switching circuit and waveforms. The switching circuit and waveforms shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise
24、specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subg
25、roup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marke
26、d on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance s
27、hall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-P
28、RF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be r
29、equired for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the revie
30、wer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84013 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. T
31、est Limits Unit Symbol Conditions 1/ -55C TC+125C unless otherwise specified Device type Group A subgroups Min Max High level output voltage VOH1IOH= -0.4 mA 2.5 V VOH2 OH= -3.0 mA 2.4 VOH3VCC= 4.5 V, VIH= 2.0 V, VIL: +125C = 0.7 V +25C = 0.8 V -55C = 0.8 V 2/ IOH= -12 mA All 1, 2, 3 2 Low level out
32、put voltage VIL= 0.7 V 2 V VOLIOL= 12 mA, VCC= 4.5 V, VIH= 2.0 V, 2/ VIL= 0.8 V All 1, 3 0.4 Input clamp voltage VICVCC= 4.5 V, IIN= -18 mA All 1, 2, 3 -1.2 V Low level input current IILUnused inputs 4.5 V VCC= 5.5 V, VIN= 0.4 V 3/ All 1, 2, 3 -0.1 mA High level input current IIH1VCC= 5.5 V VIN= 2.7
33、 V 3/ Unused inputs = 0.0 V All 1, 2, 3 20 A IIH2VCC= 5.5 V, VIN= 5.5 V, 3/ Unused inputs = 0.0 V I/O ports All 1, 2, 3 0.1 mA IH3VCC= 5.5 V, VIN= 7.0 V, 3/ Unused inputs = 0.0 V control inputs All 1, 2, 3 0.1 mA Supply current 01 20 mA ICCHVCC= 5.5 V 02 1, 2, 3 30 01 26 ICCLVCC= 5.5 V 02 1, 2, 3 35
34、 mA 01 27 ICCZVCC= 5.5 V 02 1, 2, 3 37 mA Output current IOVCC= 5.5 V, VOUT= 2.25 V 4/ All 1, 2, 3 -20 -112 mA Functional tests See 4.3.1c 5/ 7, 8 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DR
35、AWING SIZE A 84013 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions 1/ -55C TC125C unless otherwise specified Device type Group A subgroups Min Max Unit 0
36、1 1 19 ns tPLH02 9, 10, 11 4 15 01 1 14 ns Propagation delay time, A to B, B to A tPHL02 9, 10, 11 4 13 01 4 34 ns tPZH102 9, 10, 11 7 21 01 7 29 ns Propagation delay time, ABG to B tPZL102 9, 10, 11 7 21 01 2 16 ns tPHZ102 9, 10, 11 2 14 01 2 31 ns Propagation delay time, ABG to B tPLZ102 9, 10, 11
37、 3 23 01 4 34 ns tPZH202 9, 10, 11 7 25 01 7 29 ns Propagation delay time, GBA to A tPZL202 9, 10, 11 7 25 01 2 16 ns tHLZ202 9, 10, 11 2 15 01 2 31 ns Propagation delay time, GBA to A tPLZ2VCC= 4.5 V to 5.5 V, CL= 50 pF, R1= 500, R2= 500, See figure 4 6/ 02 9, 10, 11 3 27 1/ Unused inputs that do n
38、ot directly control the pin under test must be put 2.5 V or 0.4 V. The inputs shall not exceed 5.5 V or go less than 0.0 V. No inputs shall be floated. 2/ All outputs must be tested. In the case where only one input at VILmaximum or VIHminimum produces the proper output state, the test must be perfo
39、rmed with each input being selected as the VILmaximum or the VIHminimum input. 3/ For the I/O ports, this limit includes the off-state output current. 4/ The output conditions have been chosen to produce a current that closely approximates one half of the true short circuit output current, IOS. Not
40、more than one output will be tested at one time and the duration of the test condition shall not exceed 1 second. 5/ Functional tests shall be conducted at input test conditions of GND VIL VOLand VOH VIH VCC. 6/ Propagation delay limits are based on single output switching. Unused outputs = 3.5 V or
41、 0.3 V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84013 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 7 DSCC FORM 2234 APR 97 FIGURE 1. Terminal connections. Provided by IHS
42、Not for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84013 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 8 DSCC FORM 2234 APR 97 Device type 01 Inputs Outputs ABG GBA L L A to B H H B to A H L Isolat
43、ion L H Latch A and B (A = B ) Device type 02 Inputs Outputs ABG GBA L L A to B H H B to A H L Isolation L H Latch A and B (A = B) FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84013 DEFEN
44、SE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 9 DSCC FORM 2234 APR 97 Device type 01 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84013 DEFENSE SUPPLY CENTE
45、R COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 10 DSCC FORM 2234 APR 97 Device type 02 FIGURE 3. Logic diagram - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84013 DEFENSE SUPPLY CENTER
46、COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 11 DSCC FORM 2234 APR 97 FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84013 DEFENSE SUPPLY CENTER COLUMB
47、US COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 12 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes probe and jig capacitance. 2. All input pulses have the following characteristics: PRR 10 Mhz, duty cycle = 50%, tr= tf = 3 ns 1 ns. 3. The outputs are measured one at a time with one input transition p
48、er measurement. 4. When measuring propagation delay items of 3-state outputs, switch S1 is open. 5. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. FIGURE 4. Switching waveforms and test circuit - Continued. Provided by IHSNo
