1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED C Update boilerplate to MIL-PRF-38535 requirements. - jak 01-09-05 Thomas M. Hess D Made change to paragraph 3.5. Update boilerplate to MIL-PRF-38535 requirements. LTG 05-01-14 Thomas M. Hess E Update boilerplate paragraphs to the current MIL-PRF-3
2、8535 requirements. - LTG 11-06-22 David J. Corbett CURRENT CAGE CODE 67268 REV SHET REV SHET REV STATUS REV E E E E E E E E E E E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Greg A. Pitz DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRA
3、WING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY D. A. DiCenzo APPROVED BY Nelson A. Hauck MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, HEX BUFFER WITH THREE-STATE OUTPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 85-05-28 REVISION LE
4、VEL E SIZE A CAGE CODE 14933 85001 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E405-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85001 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 2 DS
5、CC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 85001 01 E A Dr
6、awing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HC365 Hex buffer with three-state outputs 1.2.2 Case outline(s). The case outline(s)
7、are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-385
8、35, appendix A. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range -0.5 V dc to VCC+0.5 V dc DC output voltage range -0.5 V dc to VCC+0.5 V dc DC input diode current . 20 mA DC output diode current . 20 mA DC output current (per pin) 35 mA
9、 DC VCCor ground current (per pin) 70 mA Maximum power dissipation (PD) . 500 mW 4/ Lead temperature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) . +175C Storage temperature range (TSTG) . -65C to +150C 1.4 Recommended operating
10、 conditions. Supply voltage range (VCC) +2.0 V dc to +6.0 V dc Case operating temperature range (TC) . -55C to +125C Input rise or fall time: VCC= 2.0 V 0 to 1000 ns VCC= 4.5 V 0 to 500 ns VCC= 6.0 V 0 to 400 ns _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device
11、. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to ground. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C.
12、 4/ For TC= +100C to +125C, derate linearly at 12 mW/C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85001 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 3 DSCC FORM 2234 APR 97 2. APPLI
13、CABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTM
14、ENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK
15、-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2
16、 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents cited in the solicitation or contract. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEDEC Standard No. 7 - Standard for D
17、escription of 54/74HCXXXXX and 54/74HCTXXXXX Advanced High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10thStreet, Suite 240-S Arlington, VA 22201). 2.3 Order of precedence. In the event of a
18、conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual ite
19、m requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transit
20、ional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirement
21、s herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction
22、, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85001 DLA LAND AND MARITI
23、ME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 4 DSCC FORM 2234 APR 97 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specifie
24、d on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electric
25、al performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I.
26、 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked as listed in MIL-HDBK-103 (see 6.6 herein). 3.5.1 Certification/compliance mark. A compliance indicator “C” s
27、hall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of
28、 compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturers product
29、meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification
30、of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation
31、. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85001 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET
32、5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions -55C TC +125C 1/ unless otherwise specified Group A subgroups Limits Unit Min Max High-level output voltage VOHVIN= VIHor VILIOH= -20 A VCC= 2.0 V 1, 2, 3 1.9 V VCC= 4.5 V 1, 2, 3 4.4 VCC= 6.0 V 1, 2
33、, 3 5.9 VIN= VIHor VILIOH= -6.0 mA VCC= 4.5 V 1, 2, 3 3.7 VIN= VIHor VILIOH= -7.8 mA VCC= 6.0 V 1, 2, 3 5.2 Low-level output voltage VOLVIN= VIHor VILIOL= +20 A VCC= 2.0 V 1, 2, 3 0.1 V VCC= 4.5 V 1, 2, 3 0.1 VCC= 6.0 V 1, 2, 3 0.1 VIN= VIHor VILIOL= +6.0 mA VCC= 4.5 V 1, 2, 3 0.4 VIN= VIHor VILIOL=
34、 +7.8 mA VCC= 6.0 V 1, 2, 3 0.4 High-level input voltage VIH2/ VCC= 2.0 V 1, 2, 3 1.5 V VCC= 4.5 V 3.15 VCC= 6.0 V 4.2 Low-level input voltage VIL2/ VCC= 2.0 V 1, 2, 3 0.3 V VCC= 4.5 V 0.9 VCC= 6.0 V 1.2 Input capacitance CINVIN= 0.0 V, TC= +25C See 4.3.1c 4 10 pF Quiescent current ICCVIN= VCCor GND
35、 VCC= 6.0 V 1, 2, 3 160 A Input leakage current IINVIN= VCCor GND VCC= 6.0 V 1, 2, 3 1.0 A Three-state output leakage current IOZVOUT= VCCor GND VCC= 6.0 V 1, 2, 3 10.0 A Functional tests See 4.3.1d 7 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted
36、 without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85001 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Test conditions -55C TC +125C 1/ unless otherwise specified
37、 Group A subgroups Limits Unit Min Max Propagation delay, time, An to Yn tPLH, tPHL4/ CL= 50 pF See figure 4 VCC= 2.0 V 9 120 ns 10, 11 180 VCC= 4.5 V 9 2410, 11 36 VCC= 6.0 V 9 2010, 11 31 Propagation delay, time, output enable, OEn to Yn tPZH, tPZL4/ CL= 50 pF See figure 4 VCC= 2.0 V 9 230 ns 10,
38、11 345 VCC= 4.5 V 9 4410, 11 66 VCC= 6.0 V 9 3710, 11 56 Propagation delay, time, output disable OEn to Yn tPHZ, tPLZ4/ CL= 50 pF See figure 4 VCC= 2.0 V 9 220 ns 10, 11 330 VCC= 4.5 V 9 4410, 11 66 VCC= 6.0 V 9 3710, 11 56 Transition time, output rise and fall times tTHL, tTLH4/ CL= 50 pF See figur
39、e 4 VCC= 2.0 V 9 60 ns 10, 11 90 VCC= 4.5 V 9 1210, 11 18 VCC= 6.0 V 9 1010, 11 15 1/ For a power supply of 5.0 V 10% the worst case output voltage (VOHand VOL) occur for HC at 4.5 V. Thus, the 4.5 V values should be used when designed with this supply. Worst case VINand VILoccur at VCC= 5.5 V and 4
40、.5 V, respectively. (The VIHvalue at VCC= 5.5 V is 3.85 V.) The worst case leakage current (IIN, ICC, and IOZ) occur for CMOS at the higher voltage so the 6.0 V values should be used. Power dissipation capacitance (CPD), typically 150 pF, determines the no load dynamic power consumption, PD= CPD VCC
41、2 f+ICC VCC; and the no load dynamic current consumption, IS= CPDVCCf+ICC. 2/ VIHand VILtests required if applied as forcing functions for VOHor VOL. 3/ AC testing at VCC= 2.0 V and VCC= 6.0 V shall be guaranteed, if not tested, to the limits specified in table I. 4/ Transition times (tTLH, tTHL) sh
42、all be guaranteed, if not tested, to the limits specified in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85001 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 7 DSCC FORM 2234 A
43、PR 97 Device type 01 Case outlines E and F 2 Terminal number Terminal symbol 1 OE1 NC 2 A1 OE1 3 Y1 A1 4 A2 Y1 5 Y2 A2 6 A3 NC 7 Y3 Y2 8 GND A3 9 Y4 Y3 10 A4 GND 11 Y5 NC 12 A5 Y4 13 Y6 A4 14 A6 Y5 15 OE2 A5 16 VCCNC 17 - - - Y6 18 - - - A6 19 - - - OE2 20 - - - VCCNC = No internal connection Pin De
44、scription Symbol Description An (n = 1 to 6) Data inputs Yn (n = 1 to 6) Data outputs OEn (n = 1 or 2) Output enables (active low) FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85
45、001 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 8 DSCC FORM 2234 APR 97 Inputs Outputs OE1 OE2 An Yn H X X Z X H X Z L L H H L L L L H = High voltage level L = Low voltage level X = Irrelevant Z = High impedance FIGURE 2. Truth table. FIGURE 3. Logic diagram. Provided by I
46、HSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85001 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 9 DSCC FORM 2234 APR 97 PARAMETER RLCLS1 S2 tPZH1k 50 pF Open Closed tPZLClosed OpentPHZ1k 50 pF Open
47、 Closed tPLZClosed OpentPLH,tPHL or tTHL,tTLH- 50 pF Open Open NOTES: 1. CL= 50 pF minimum or equivalent (includes test jig and probe capacitance). 2. Waveform 1 is for an output with internal conditions such that the output is low at VOLexcept when disabled by the output control. Waveform 2 is for
48、an output with internal conditions such that the output is high at VOHexcept when disabled by the output control. 3. RL= 1 k or equivalent. 4. Input signal from pulse generator: VIN= 0.0 V to VCC; PRR 1MHz; ZO= 50; tr = 6.0 ns; tf= 6.0 ns; trand tfshall be measured from 0.1 VCCto 0.9 VCC and from 0.9 VCC to 0.1 VCC, respectively; duty cycle = 50 percent. 5. Timing parameters shall be tested at a minimum input frequency of 1 MHz. 6. The outputs are measured one at a time with one transition per measureme
