1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED B Convert to military drawing format. Split VILinto temperatures. Change footnote 1/ in 1.3. Change IILin table I. Change propagation delays. Add footnotes to table I. Editorial changes throughout. Add CAGE 27014 to case 2. Add figure 4. Add VOHat
2、-0.4 mA. Delete IOH, and IOL. Change test conditions for IIL, IIH, and propagation delay times. Change in table II. Renumber figures. 88-05-12 D. R. Cool C Added test condition C to 4.2a(1) and 4.3.2b(1). Added vendor CAGE code 27014 to flat package. Editorial changes throughout. 89-11-02 D. R. Cool
3、 D Changes in accordance with NOR 5962-R255-92. 92-07-10 Monica L. Poelking E Redraw with changes. Update to current requirements. Editorial changes throughout. - gap 05-12-15 Raymond Monnin CURRENT CAGE CODE 67268 THE FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV SHET REV STATUS REV E
4、E E E E E E E E E E E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Larry T. Gauder DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Tim H. Noh COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY D
5、. R. Cool MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED LOW-POWER SCHOTTKY TTL, MULTIPLEXER, AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 85-09-06 MONOLITHIC SILICON AMSC N/A REVISION LEVEL E SIZE A CAGE CODE 14933 85096 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E063-06 Provided by IHSN
6、ot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85096 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-
7、STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 85096 01 E X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 De
8、vice type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ALS253 Dual 1 of 4 data selector/multiplexer with 3-state outputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter De
9、scriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat package 2 CQCC1-N20 20 Square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range -0.5 V
10、 dc minimum to +7.0 V dc maximum Input voltage range -1.5 V dc at -18 mA to +7.0 V dc Storage temperature range -65C to +150C Maximum power dissipation (PD) 1/ . 77 mW Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) . MIL-STD-1835 Junction temperature (TJ+175
11、C 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc minimum to +5.5 V dc maximum Minimum high level input voltage (VIH) 2.0 V dc Maximum low level input voltage (VIL): VIL= +125C 0.7 V dc VIL= +25C . 0.8 V dc VIL= -55C . 0.8 V dc Case operating temperature range (TC) . -55C
12、to +125C _ 1/ Maximum power dissipation is defined as VCCx ICC, and must withstand the added PDdue to short circuit test; e.g., IO. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85096 DEFENSE SUPPLY CENTER COLUM
13、BUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, t
14、he issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface
15、Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil;quicksearch/ or www.dodssp.daps.mil or from
16、the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however,
17、supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this dra
18、wing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity a
19、pproval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A
20、“Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case ou
21、tline(s). The case outline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure
22、 3. 3.2.5 Test circuit and switching waveforms. The test circuit and switching waveforms shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the f
23、ull case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license
24、 from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85096 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In
25、addition, the manufacturers PIN may also be marked. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accord
26、ance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DS
27、CC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided
28、with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers
29、 facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall
30、 be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, C, or D. The test circuit shall be maintained by the man
31、ufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2
32、) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permitted without
33、license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85096 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC +125C unless otherwise specified Group A subgroup
34、s Limits Unit Min MaxHigh level output voltage VOHVCC= 4.5 V, VIH= 2.0 V, IOH= -0.4 mA 1, 2, 3 2.5 V VILat: +125C = 0.7 V -55C = 0.8 V IOH= -1.0 mA 2.4 +25C = 0.8 V 2/ Low level output voltage VOLVCC= 4.5 V, VIL= 0.7 V 2 0.4 V IOL= 12 mA, VIH= 2.0 V VIL= 0.8 V 1, 3 2/ Input clamp voltage VICVCC= 4.5
35、 V, 1, 2, 3 -1.5 V IIN= -18 mA Low level input current IILVCC= 5.5 V, 1, 2, 3 -0.1 mA VIN= 0.4 V, Unused inputs 4.5 V High level input current IIH1VCC= 5.5 V, VIN= 2.7 V, 1, 2, 3 20 A Unused inputs = 0.0 V IIH2VCC= 5.5 V, VIN= 7.0 V, 1, 2, 3 0.1 mA Unused inputs = 0.0 V Output current IOVCC= 5.5 V,
36、1, 2, 3 -20 -112 mA VOUT= 2.25 V 3/ Supply current ICCVCC= 5.5 V Outputs enabled 1, 2, 3 12 mA Outputs disabled 1, 2, 3 14 mA Off-state output current IOZHVCC= 5.5 V, 1, 2, 3 20 A VOUT= 2.7 V IOZLVCC= 5.5 V, 1, 2, 3 -20 OUT= 0.4 V Functional tests See 4.3.1c 4/ 7, 8 See footnotes at end of table. Pr
37、ovided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85096 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continu
38、ed. Test Symbol Conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Limits Unit Min MaxPropagation delay time, tPLH1VCC= 4.5 V to 5.5 V, 9, 10, 11 5 22 ns A, B to any Y CL= 50 pF, R1= 500, R2= 500 tPHL1See figure 4 9, 10, 11 5 32 ns 5/ Propagation delay time, tPLH29, 10, 11 2 12
39、 ns any C to any Y tPHL29, 10, 11 3 21 ns Output enable time, tPZH9, 10, 11 3 16 ns G to any Y tPZL9, 10, 11 2 22 ns Output disable time, tPHZ9, 10, 11 2 10 ns G to any Y tPLZ9, 10, 11 2 14 ns 1/ Unused inputs that do not directly control the pin under test must be 2.5 V or 0.4 V. No unused inputs s
40、hall exceed 5.5 V or go less than 0.0 V. No inputs shall be floated. 2/ All outputs must be tested. In the case where only one input at VILmaximum or VIHminimum produces the proper output state, the test must be performed with each input being selected as the VILmaximum or the VIHminimum input. 3/ T
41、he output conditions have been chosen to produce a current that closely approximates one half of the true short circuit output current, IOS. Not more than one output will be tested at one time and the duration of the test condition shall not exceed 1 second. 4/ Functional tests shall be conducted at
42、 input test conditions of GND VIL VOLand VOH VIH VCC. 5/ Propagation delay limits are based on single output switching. Unused inputs = 3.5 V or 0.3 V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85096 DEFENSE
43、 SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 7 DSCC FORM 2234 APR 97 FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85096 DEFENSE SUPPLY CENTER COLUMBUS
44、 COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 8 DSCC FORM 2234 APR 97 Select Data inputs Output Output inputs control B A C0 C1 C2 C3 G Y X X X X X X H Z L L L X X X L L L L H X X X L H L H X L X X L L L H X H X X L H H L X X L X L L H L X X H X L H H H X X X L L L H H X X X H L H Address inputs
45、 A and B are common to both sections. H = High level L = Low level Z = High impedance X = Irrelevant FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85096 DEFENSE SUPPLY CENTER COLUMBUS COLU
46、MBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 9 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85096 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION
47、 LEVEL E SHEET 10 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes probe and jig capacitance. 2. All input pulses have the following characteristic: PRR 10 MHz, duty cycle = 50%, tr= tf= 3 ns 1 ns. 3. The outputs are measured one at a time with one input transition per measurement. 4. Waveform 1 is for an
48、 output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. 5. When measuring propagation delay items of 3-state outputs, switch S1 is open. FIGURE 4. Test circuit and switching waveforms. Provided by IHSNo
