1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes to propagation delay times in Table I: delete separate specifications for Subgroup 9 at VCC= 5V; change specification for tPLH2and tPHZ. Revise per current boilerplate. ljs 99-01-29 Raymond Monnin B Update to reflect latest changes in for
2、mat and requirements. Editorial changes throughout. -les 05-01-20 Raymond Monnin C Update drawing as part of 5 year review. - jt 11-02-02 C. SAFFLE THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. CURRENT CAGE CODE 67268 REV SHEET REV SHEET REV STATUS REV C C C C C C C C C OF SHEETS SHEET
3、1 2 3 4 5 6 7 8 9 PMIC N/A PREPARED BY David W. Queenan DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY D. A. DiCenzo APPROVED BY Charles Reu
4、sing MICROCIRCUITS, DIGITAL, BIPOLAR, D-TYPE REGISTER, MONOLITHIC SILICON DRAWING APPROVAL DATE 86-10-14 AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-86715 SHEET 1 OF 9 DSCC FORM 2233 APR 97 5962-E203-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license fr
5、om IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86715 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with M
6、IL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-86715 01 E X Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type. The device type identify the circuit function as follows
7、: Device type Generic number Circuit function 01 2918 or 25S18 Quad D-type register with standard and three state outputs 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16
8、 dual-in-line F GDFP2-F16 or CDFP3-F16 16 flat 2 CQCC1-N20 20 square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range -0.5 V dc to +7.0 V dc Input voltage range . -1.5 V dc at -18 mA to +7.0 V dc Storage
9、temperature range . -65C to +150C Maximum power dissipation (PD) 1/ 1.3 W Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +150C DC output current into outputs . +30 mA DC input _ 1/ Maximum power dissipation is d
10、efined as VCCx ICC, and must withstand the added PDdue to short-circuit test; e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86715 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C
11、SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage (VCC) . -4.5 V dc minimum to 5.5 V dc maximum Minimum high level input voltage (VIH) . 2.0 V dc Maximum low level input voltage (VIL) 0.8 V dc Case operating temperature range (TC) -55C to +125C Clock pulse width, VCC
12、= 5.0 V: high . 7 ns minimum low 9 ns minimum Clock pulse width, VCC= 4.5 V to 5.5 V: high . 10.5 ns minimum low 12.5 ns minimum Data setup time, VCC= 5.0 V 5 ns minimum Data hold time, VCC= 5.0 V 3 ns minimum Data setup time, VCC= 4.5 V to 5.5 V 6.5 ns minimum Data hold time, VCC= 4.5 V to 5.5 V 5.
13、0 ns minimum 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation
14、 or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFEN
15、SE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia
16、, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtain
17、ed. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualifie
18、d manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality M
19、anagement (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identi
20、fy when the QML flow option is used. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86715 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3.2 Design, constructi
21、on, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on
22、 figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in tab
23、le I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-
24、PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on th
25、e device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when t
26、he QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing a
27、s an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microci
28、rcuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritime s agent, and the acquiring activity retain the optio
29、n to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5
30、962-86715 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max High level output voltage VOHVCC
31、= 4.5 V, Q IOH= -1 mA 1, 2, 3 All 2.5 V VIN= 0.8 V or 2.0 V Y IOH= -2 mA 2.4 Low level output voltage VOLVCC= 4.5 V, IOL= 20 mA VIN= 0.8 V or 2.0 V 1/ 1, 2, 3 All 0.5 V Input clamp voltage VI CVCC= 4.5 V, IIN= -18 mA 1, 2, 3 All -1.2 V High level input current IIH1VCC= 5.5 V, VIN= 2.7 V 1, 2, 3 All
32、50 A IIH2VCC= 5.5 V, VIN= 5.5 V 1, 2, 3 All 1.0 mA Low level input current IILVCC= 5.5 V, VIN= 0.5 V 1, 2, 3 All -2.0 mA Off-state output current at IOZHVCC= 5.5 V, VOUT= 2.4 V 1, 2, 3 All 50 A Y output IOZLVCC= 5.5 V, VOUT= 0.4 V 1, 2, 3 All -50 A Short circuit output current IOSVCC= 5.5 V, VOUT= G
33、ND 2/ 1, 2, 3 All -40 -100 mA Supply current ICCMeasured with all inputs 4.5 V and all outputs open. VCC= 5.5 V 1, 2, 3 All 130 mA Functional tests See 4.3.1C 7, 8 All Propagation delay time, tPLH1VCC= 4.5 V to 5.5 V, 9, 10, 11 All 11 ns clock to Q tPHL1CL= 15 pF 10%, 9, 10, 11 All 15 ns Propagation
34、 delay time, tPLH2RL1= 1 k 5%, 9, 10, 11 All 15 ns clock to Y (QE low) tPHL2RL2= 280 5% 9, 10, 11 All 15 ns Output enable time tPZH9, 10, 11 All 25 ns tPZL9, 10, 11 All 23 ns Output disable time tPHZVCC= 4.5 V to 5.5 V, CL= 5 pF 10%, 9, 10, 11 All 13.5 ns tPLZRL1= 1 k 5%, RL2= 280 5% 9, 10, 11 All 1
35、3.5 ns 1/ Measured on Q outputs with Y outputs open. Measured on Y outputs with Q outputs open. 2/ Not more than one output should be shorted at a time and the duration of the short circuit condition should not exceed one second. Provided by IHSNot for ResaleNo reproduction or networking permitted w
36、ithout license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86715 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 Device type 01 Case outlines E and F 2 Terminal number Terminal symbol Terminal symbol 1 D0D02 Q0Q03 Y0NC 4 D1Y05 Q1D16 Y1Q17 OE
37、Y18 GND NC 9 CP OE 10 Y2GND 11 Q2CP 12 D2Y213 Y3NC 14 Q3Q215 D3D216 VCCY317 - - - Q318 - - - NC 19 - - - D320 - - - VCCFIGURE 1. Terminal connections. Inputs Outputs OE Clock CP D Q Y Notes H L X NC Z - - - H H X NC Z - - - H L L Z - - - H H H Z - - - L L L L - - - L H H H - - - L - - - - - - L L 1
38、L - - - - - - H H 1 H = High level NC = No change L = Low level = low TO high TRANSITION X = Dont care Z = High impedance NOTE: When OE is LOW the Y output will be in the same logic state as the Q output. FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted wit
39、hout license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86715 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD
40、 MICROCIRCUIT DRAWING SIZE A 5962-86715 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall
41、 be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the
42、manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883.
43、 (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subg
44、roups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) - Final electrical test parameters (method 5004) 1*, 2, 3, 7, 8, 9 Group A test requirements (method 5005) 1, 2, 3, 7, 8, 9, 10, 11 * Groups C and D end-point electrical parameters (method 5005)
45、1, 2, 3 * PDA applies to subgroup 1. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as sp
46、ecified in table II herein. b. Subgroups 4, 5, and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroups 7 and 8 shall include verification of the truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DR
47、AWING SIZE A 5962-86715 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1)
48、Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. (2) TA= +125C, minimum. (3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 5. PACK
