1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A - page 4, IILtest conditions: “Any B“ changed to “Any G“ - page 6, NOTE 1: add “duration of the short circuit test should not exceed one second.“ - page 10, add diode between RL1and the series of three diodes. - Reverse labeling for switches, SW1
2、 and SW2 87-03-17 N. A. Hauck B Update drawing to current requirements. Editorial changes throughout. - gap 09-12-16 Charles F. Saffle Current CAGE is 67268 The original first sheet of this drawing has been replaced. REV SHET REV SHET REV STATUS REV B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6
3、7 8 9 10 11 PMIC N/A PREPARED BY David W. Queenan DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY D. A. DiCenzo APPROVED BY N. A. Ha
4、uck MICROCIRCUIT, DIGITAL, BIPOLAR, OCTAL BUFFER, MONOLITHIC SILICON DRAWING APPROVAL DATE 86-12-21 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 14933 5962-86725 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E429-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from I
5、HS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86725 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance w
6、ith MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-86725 01 R X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as
7、 follows: Device type Generic number Circuit function 01 25S241 Non-inverting octal buffer with three-state outputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 D
8、ual-in-line package S GDFP2-F20 or CDFP3-F20 20 Flat package 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range -0.5 V dc to +7.0 V dc Input voltage range . -1.5 V dc to 7.0 V dc Storage temperature range -65C to +150C
9、Maximum power dissipation (PD) 1/ 2.2 W Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) . +150C DC input current . -30 mA to +5.0 mA DC output current into output . +30 mA 1.4 Recommended operating conditions. Su
10、pply voltage (VCC) +4.5 V dc to +5.5 V dc Minimum high-level input voltage (VIH) . 2.0 V dc Maximum low-level input voltage (VIL) 0.8 V dc Ambient operating temperature range (TA) . -55C to 125C _ 1/ Must withstand the added PDdue to short circuit test (e.g., IOS). Provided by IHSNot for ResaleNo re
11、production or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86725 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The
12、following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufactur
13、ing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Micro
14、circuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this dr
15、awing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordanc
16、e with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535
17、 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall
18、not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The desig
19、n, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The trut
20、h table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full amb
21、ient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license fro
22、m IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86725 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In
23、 addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be ma
24、rked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of complianc
25、e shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MI
26、L-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall b
27、e required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the re
28、viewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspectio
29、n. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon requ
30、est. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except inter
31、im electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86725 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-399
32、0 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Condition 1/ -55C TA +125C (unless otherwise specified) Group A subgroups Limits Unit Min Max High level ouput voltage VOHVCC= 4.5 V VIN= 0.8 V or 2.0 V VB1= 0.8 V, IOH= -3.0 mA 1, 2, 3 2.4
33、V VB1= 0.5 V, IOH= -12.0 mA 1, 2, 3 2.0 V Low-level output voltage VOLVCC= 4.5 V, IOL= 48.0 mA, VIN= 0.8 V or 2.0 V 1, 2, 3 0.55 V Hyteresis (VT+- VT-) VhystVCC= +4.5 V 1, 2, 3 0.2 V Input clamp voltage VICVCC= 4.5 V, IIN= -18 mA 1, 2, 3 -1.2 V High level input current IIN1VCC= 5.5 V, VIN= 2.7 V 1,
34、2, 3 50 A IIN2VCC= +5.5 V, VIN= 5.5 V 1, 2, 3 1.0 mA Low level input current IILVCC= +5.5 V, VIN= 0.5 V Any A 1, 2, 3 -0.4 mA Any G -2.0 Output short circuit current IOSVCC= +5.5 V, VOUT= 0 V 1/ 1, 2, 3 -50 -225 mA Off-state output current IOZHVCC= +5.5 V, VOUT= 2.4 V 1, 2, 3 50 A IOZLVCC= +5.5 V, V
35、OUT= 0.5 V 1, 2, 3 -50 A Supply current ICCHVCC= +5.5 V 1G$ $ $ $= 0.0 V, 2G = 0.0 V, Data = 3.0 V 1, 2, 3 65 mA ICCL1G$ $ $ $= 0.0 V, 2G = 3.0 V, Data = 0.0 V 1, 2, 3 105 mA ICCZ1G$ $ $ $= 3.0 V, 2G = 0.0 V, Data = 0.0 V 1, 2, 3 120 mA Functional testing See 4.3.1c 7, 8 See footnotes at end of tabl
36、e. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86725 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics
37、 - Continued. Test Symbol Condition 1/ -55C TA +125C (unless otherwise specified) Group A subgroups Limits Unit Min Max Propagation delay from Ai to Yi tPLH, tPHLCL= 50 pF, RL1= 1 k, RL2= 90 See figure 4 TA = 25 C 2/ 9 9 ns 3/ 9, 10, 11 12 Propagation delay from output enable to Yi 4/ tPZHTA = 25C 2
38、/ 9 12 ns 3/ 9, 10, 11 13 Propagation delay from output enable to Yi 4/ tPZLTA = 25C 2/ 9 15 ns 3/ 9, 10, 11 18 Propagation delay from output enable to Yi 4/ tPHZ, tPLZTA = 25C 2/ 9 18 ns Propagation delay from output enable to Yi 4/ tPHZCL = 5pF, RL1= 1 k, RL2= 90 See figure 4 TA = 25C 2/ 9 9 ns 3/
39、 9, 10, 11 12 tPLZTA = 25C 2/ 9 15 ns 3/ 9, 10, 11 18 1/ Not more than one output should be shorted at a time. Duration of the short circuit condition should not exceed one second. 2/ VCC= 5.0 V. 3/ VCC= 4.5 V to 5.5 V. 4/ Add 3 ns for 2G Enable/Disable delays Provided by IHSNot for ResaleNo reprodu
40、ction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86725 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networkin
41、g permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86725 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 Inputs Outputs 1G$ $ $ $2G A Y H L X Z L H H H L H L L H = High level L = Low level Z = High impedance X =
42、Irrelevant 1G$ $ $ $controls the 1Y1 to 1Y4 outputs 2G controls the 2Y1 to 2Y4 outputs FIGURE 2. Truth table. FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86725 DEFENSE SUPPLY CENT
43、ER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 Parameter SW1 SW2 tPLHClosed Closed tPHLClosed Closed tPZLOpen Closed tPZHClosed Open tPLZClosed Closed tPHZClosed Closed FIGURE 4. Test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted
44、without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86725 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 10 DSCC FORM 2234 APR 97 TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883, metho
45、d 5005, table I) Interim electrical parameters (method 5004) - - - Final electrical test parameters (method 5004) 1*, 2, 3, 7, 8, 9 Group A test requirements (method 5005) 1, 2, 3, 7, 8, 9, 10*, 11* Groups C and D end-point electrical parameters (method 5005) 1,2,3 * PDA applies to subgroup 1. * Sub
46、group 10 and 11, if not tested, shall be guaranteed to the limits specified in table I. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply
47、. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 4, 5, and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroups 7 and 8 shall include verification of the truth table. 4.3.2 Groups C and D inspections. a. End-point electrical parameters sh
48、all be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. (
