1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changed IOSmin limit in Table I from -30 mA to -20 mA. Boilerplate update, part of 5 year review. ksr 11-01-20 Charles F. Saffle THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED REV SHET REV SHET REV STATUS REV A A A A A A A A A OF SHEE
2、TS SHEET 1 2 3 4 5 6 7 8 9 PMIC N/A PREPARED BY Rick C. Officer DLA LAND AND MARITIME STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY N. A. Hauck MICROCIRCUIT, MEMORY, DIGITAL, BI
3、POLAR PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 87-08-07 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-87528 SHEET 1 OF 9 DSCC FORM 2233 APR 97 5962-E161-11 .Provided by IHSNot for ResaleNo reproduction or networking permitte
4、d without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87528 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits
5、in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87528 01 R_ A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the cir
6、cuit function as follows: Device type Generic number Circuit function 01 PAL18P8A 18-input, 8-output AND-OR programmable array logic 02 PAL18P8B 18-input, 8-output AND-OR programmable array logic 03 PAL18P8AL 18-input, 8-output AND-OR programmable array logic 04 PAL18P8L 18-input, 8-output AND-OR pr
7、ogrammable array logic 05 PAL18P8Q 18-input, 8-output AND-OR programmable array logic 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20, CDIP2-T20 20 dual-in-line package S GDFP2-F20,
8、 CDFP3-F20 20 flat package 2 CQCC1-N20 20 square chip carrier package 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range - -0.5 V to +7.0 V 2/ Input voltage range - -0.5 V to +5.5 V Output voltage applied - -0.5 V to
9、 +7.0 V 2/ Output sink current - -90 mA 2/ Thermal resistance, junction-to-case (JC): Cases R and S - See MIL-STD-1835 Case 2 - 15C/W 3/ Maximum power dissipation (PD) 4/ - 1.2 W Maximum junction temperature (TJ) - +175C Lead temperature (soldering, 10 seconds maximum) +260C Storage temperature - -6
10、5C to +150C 1.4 Recommended operating conditions. Supply voltage (VCC) - +4.5 V dc to +5.5 V dc Input high voltage (VIH) - 2.2 V dc minimum Input low voltage (VIL) - 0.8 V dc maximum Case operating temperature range (TC) - -55C to +125C 1/ All voltages referenced to ground. 2/ Except during programm
11、ing. Current into the output during programming (one second maximum duration) is 200 mA maximum. 3/ When the thermal resistance for this case is specified in MIL-STD-1835 that value shall supersede the value indicated herein. 4/ Must withstand the added PDdue to short circuit test (e.g., IOS). Provi
12、ded by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87528 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards,
13、 and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated
14、Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-
15、780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between
16、 the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements s
17、hall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certificat
18、ion to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These
19、modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical d
20、imensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.2 Truth table. The truth table shall be as specified on figure 2. 3.2.2.1 Unprogramm
21、ed devices. The truth table for unprogrammed devices for contracts involving no altered item drawing shall be as specified on figure 2. When required in groups A, B, or C (see 4.3.1d), the devices shall be programmed by the manufacturer prior to test in a checkerboard pattern (a minimum of 50 percen
22、t of the total number of gates programmed) or to any altered item drawing pattern which includes at least 25 percent of the total number of gates programmed. 3.2.2.2 Programmed devices. The truth tables for programmed devices shall be as specified by an attached altered item drawing. 3.2.3 Case outl
23、ines. The case outlines shall be in accordance with 1.2.2 herein. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test
24、requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87
25、528 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC+125C Group A subgroups Device type Limits Unit Min MaxInput clamp voltage VICVCC= 4.5 V, II= -18 mA, 1, 2, 3 All -1.2
26、V High-level output voltage VOHVCC= 4.5 V, IO= -2.0 mA, 1, 2, 3 All 2.4 V IN= 0.8 V or 2.0 V Low-level output voltage VOLVCC= 4.5 V IO= 12.0 mA 1, 2, 3 01-04 0.5 V VIN= 0.8 V or 2.0 V IO= 8.0 mA 05 High-level Input current IIHVIH= 2.7 V, VCC= 5.5 V 1, 2, 3 All 25 A VIH= 5.5 V, VCC= 5.5 V 1.0 mA Low-
27、level Input current IILVIL= 0.4 V, VCC= 5.5 V 1, 2, 3 All -100 A Supply current ICCVCC= 5.5 V, inputs = GND 1, 2, 3 01,02 180 mA 03,04 90 05 55 Output short circuit IOSVCC= 5.5 V, VO= 0.5 V 1, 2, 3 All -20 -90 mA current 2/ Output leakage current IOZLVO= 0.4 V, VCC= 5.5 V 3/ 1, 2, 3 All -250 A IOZHV
28、O= 2.7 V, VCC= 5.5 V 3/ 1, 2, 3 All 100 A Propagation delay data input to output tPHLVCC= 4.5 V to 5.5 V 9, 10, 11 02 20 ns See figure 3 tested with switch S1closed 01,03 30 04,05 40 Propagation delay data input to output tPLHVCC= 4.5 V to 5.5 V 9, 10, 11 02 20 ns See figure 3 tested with switch S1c
29、losed 01,03 30 04,05 40 Propagation delay input to output enable tPZLVCC= 4.5 V to 5.5 V See figure 3 4/ 5/ 9, 10, 11 02 20 ns 01,03 30 04,05 40 Propagation delay input to output enable tPZH9, 10, 11 02 20 ns 01,03 30 04,05 40 See footnotes at end of table. Provided by IHSNot for ResaleNo reproducti
30、on or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87528 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ -55C TC+125C G
31、roup A subgroups Device type Limits Unit Min Max Propagation delay data input to output tPHZVCC= 4.5 V to 5.5 V 9, 10, 11 02 20 ns See figure 3 4/ 5/ 01,03 30 04,05 40 Propagation delay data input to output tPLZ9, 10, 11 02 20 ns 01,03 30 04,05 40 1/ All voltages are referenced to ground. 2/ Only on
32、e output shorted at a time. Duration of short, not to exceed one second. 3/ VIL= 0.8 V, VIH= 2.0 V. 4/ These parameters are tested at VIL= 0.0 V and VIH= 3.0 V. 5/ For three-state output, output enable times are tested with CL= 50 pF to the 1.5V level; S1is open for high-impedance to high tests and
33、closed for high-impedance to low tests. Output disable times are tested with CL= 5 pF. High to high-impedance tests are made to an output voltage of VOH-0.5 V with S1open; low to high-impedance tests are made to the VOL+0.5 V level with S1closed. 3.5 Marking. Marking shall be in accordance with MIL-
34、PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on th
35、e device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when t
36、he QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as
37、 an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcir
38、cuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option t
39、o review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Processing options. Since the device is capable of being programmed by either the manufacturer or the user to result in a wide variety
40、 of configurations; two processing options are provided for selection in the contract, using an altered item drawing. 3.10.1 Unprogrammed device delivered to the user. All testing shall be verified through group A testing as defined in 3.2.2.1 and table II. It is recommended that users perform subgr
41、oups 7 and 9 after programming to verify the specific program configuration. 3.10.2 Manufacturer-programmed device delivered to the user. All testing requirements and quality assurance provisions herein, including the requirements of the altered item drawing, shall be satisfied by the manufacturer p
42、rior to delivery. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87528 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 Device Types All Case Outlines R and S 2
43、Terminal Number Terminal Symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 I0I1I2 I3I4I5 I6I7I8GND I9I/O0I/O1I/O2I/O3I/O4I/O5I/O6I/O7VCCI0I1I2 I3I4I5 I6I7I8GND I9I/O0I/O1I/O2I/O3I/O4I/O5I/O6I/O7VCCFIGURE 1. Terminal connections. Fusible link type Inputs (all) Outputs (all) A X Z B X L NOTE:
44、X = logic “dont care” state, Z = logic “high impedance” state, and L = logic “low” state FIGURE 2. Truth table (unprogrammed). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87528 DLA LAND AND MARITIME COLUM
45、BUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 Test output loads Device type R1(ohms) R2(ohms) 01 - 04 390 ( 5%) 750 ( 5%) 05 600 ( 5%) 1200 ( 5%) NOTE: Capacitors may be used to bypass VCCduring testing. FIGURE 3. Switching times test circuit. Provided by IHSNot for ResaleNo re
46、production or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87528 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in a
47、ccordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C
