1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add figure 4. Technical changes to 1.3, 1.4, table I, and table II. Change in terminal connections. Change VSPN to case outline 2. Editorial changes throughout. mlp 89-09-05 Michael A. Frye B Changes in accordance with NOR 5962-R108-92 tvn 92-01-
2、10 Monica L. Poelking C Changes in accordance with NOR 5962-R116-93. tvn 93-03-26 Monica L. Poelking D Add package CDFP4-F16. Use new boilerplate. ljs 98-02-04 Raymond Monnin E Modified Figure 4 to be consistent with Table I. ljs 98-08-17 Raymond Monnin F Update to current requirements. Editorial ch
3、anges throughout. gap 06-04-10 Raymond Monnin The original first page of this drawing has been replaced. REV SHET REV SHET REV STATUS REV F F F F F F F F F F F F F OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY Monica L. Poelking DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCU
4、IT DRAWING CHECKED BY Monica L. Poelking COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, ECL, BINARY TO 1-8 AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 87-07-16 DECODER, LOW,
5、MONOLITHIC SILICON AMSC N/A REVISION LEVEL F SIZE A CAGE CODE 67268 5962-87567 SHEET 1 OF 13 DSCC FORM 2233 APR 97 5962-E208-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87567 DEFENSE SUPPLY CENTER COLU
6、MBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete
7、 PIN is as shown in the following example: 5962-87567 01 E X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 10H561 Binary to 1-8 dec
8、oder (low) 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual -in-line F GDFP2-F16 or CDFP3-F16 16 Flat package X CDFP4-F16 16 Flat-package 2 CQCC1-N20 20 Square c
9、hip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range (VEE) . -8.0 V dc to 0.0 V dc Input voltage range . -5.2 V dc to 0.0 V dc Storage temperature range . -65C to +165C Lead temperature (soldering, 10 seconds)
10、 +300C Junction temperature (TJ) +165C Maximum power dissipation (PD) 520 mW Thermal resistance, junction-to-case (JC) See MIL-STD-1835 1.4 Recommended operating conditions. Supply voltage range (VEE) . -5.46 V dc minimum to -4.94 V dc maximum Supply voltage range (VCC) . -0.02 V dc to +0.02 V dc or
11、 +1.98 V dc to +2.02 V dc Ambient operating temperature range(TA) -55C to +125C Minimum high level input voltage (VIH): TA= +25C -0.780 V dc TA= +125C -0.650 V dc TA= -55C . -0.840 V dc Maximum low level input voltage (VIL) -1.950 V dc Provided by IHSNot for ResaleNo reproduction or networking permi
12、tted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87567 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, stand
13、ards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for
14、. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of t
15、hese documents are available online at http:/assist.daps.dla.mil;quicksearch/ or www.dodssp.daps.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing an
16、d the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with M
17、IL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be
18、processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affe
19、ct form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, const
20、ruction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table(s). The truth
21、 table(s) shall be as specified on figure 2. 3.2.4 Logic diagram(s). The logic diagram(s) shall be as specified on figure 3. 3.2.5 Test circuit and switching waveforms. Test circuit and switching waveforms shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwis
22、e specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full ambient operating temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87
23、567 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 4 DSCC FORM 2234 APR 97 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. M
24、arking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the
25、option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordanc
26、e with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-
27、VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided wit
28、h each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers fa
29、cility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be
30、 in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the man
31、ufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2
32、) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permitted without
33、license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87567 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TA +125C Group A subgroups Limits Unit unless othe
34、rwise specified Min Max Cases E, F, 2 and X Quiescent tests 1/ VIHVIL-0.780 -1.950 1 -1.010 -0.780 -0.650 -1.950 2 -0.860 -0.650 High level output voltage VOHOutputs terminated through 100 to -2 V. -0.840 -1.950 3 -1.060 -0.840 V -0.780 -1.950 1 -1.950 -1.580 -0.650 -1.950 2 -1.950 -1.535 Low level
35、output voltage VOLVCC= 0.0 V VEE= -5.2 V 2/ -0.840 -1.950 3 -1.950 -1.610 V -1.110 -1.480 1 -1.010 -0.780 -0.960 -1.465 2 -0.860 -0.650 High level threshold output voltage VOHA-1.160 -1.510 3 -1.060 -0.840 V -1.110 -1.480 1 -1.950 -1.580 -0.960 -1.465 2 -1.950 -1.535 Low level threshold output volta
36、ge VOLA-1.160 -1.510 3 -1.950 -1.610 V 1 -76 Power supply drain current 3/ IEEVEE= -5.46 V VCC= 0.0 V 2, 3 -84 mA 1 275 High level input current IIHVIH= -0.780 V at +25C -0.650 V at +125C -0.840 V at -55C 2, 3 465 A 1, 3 0.5 Low level input current IILVEE= -4.940 V, VCC= +0.0 V VIL= -1.950 V 3/ 2 0.
37、3 A Functional tests See 4.3.1c 7, 8A, 8B See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87567 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 6
38、 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TA +125C Group A subgroups Limits Unit unless otherwise specified Min Max Cases E, F and X DC rapid test conditions 4/ VIHVIL-0.802 -1.950 1 -1.030 -0.802 -0.674 -1.950 2 -0.882 -0.674 High level outp
39、ut voltage VOHOutputs terminated through 100 to -2 V. -0.864 -1.950 3 -1.082 -0.864 V -0.802 -1.950 1 -1.950 -1.587 -0.674 -1.950 2 -1.950 -1.542 Low level output voltage VOLVCC= 0.0 V VEE= -5.2 V 2/ -0.864 -1.950 3 -1.950 -1.617 V -1.130 -1.487 1 -1.030 -0.802 -0.982 -1.472 2 -0.882 -0.674 High lev
40、el threshold output voltage VOHA-1.182 -1.517 3 -1.082 -0.864 V -1.121 -1.487 1 -1.950 -1.587 -0.972 -1.472 2 -1.950 -1.542 Low level threshold output voltage VOLA-1.172 -1.517 3 -1.950 -1.617 V 1 -75 Power supply drain current 3/ IEEVEE= -5.46 V VCC= 0.0 V 2, 3 -83 mA 1 260 High level input current
41、 IIHVIH= -0.802 V at +25C -0.674 V at +125C -0.864 V at -55C 2, 3 450 A 1, 3 0.5 Low level input current IILVEE= -4.94 V, VCC= 0.0 V VIL= -1.950 3/ 2 0.3 A Functional tests See 4.3.1c 7, 8A, 8B See footnotes at end of table.Provided by IHSNot for ResaleNo reproduction or networking permitted without
42、 license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87567 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TA +125C Group A subgroups Limits Unit unless oth
43、erwise specified Min Max Case 2 DC rapid test conditions 4/ VIHVIL-0.809 -1.950 1 -1.037 -0.809 -0.682 -1.950 2 -0.889 -0.682 High level output voltage VOHOutputs terminated through 100 to -2 V. -0.872 -1.950 3 -1.089 -0.872 V -0.809 -1.950 1 -1.950 -1.589 -0.682 -1.950 2 -1.950 -1.545 Low level out
44、put voltage VOLVCC= 0.0 V VEE= -5.2 V 2/ -0.872 -1.950 3 -1.950 -1.620 V -1.137 -1.489 1 -1.037 -0.809 -0.989 -1.475 2 -0.889 -0.682 High level threshold output voltage VOHA-1.189 -1.520 3 -1.089 -0.872 V -1.137 -1.489 1 -1.950 -1.589 -0.989 -1.475 2 -1.950 -1.545 Low level threshold output voltage
45、VOLA-1.189 -1.520 3 -1.950 -1.620 V 1 -75 Power supply drain current 3/ IEEVEE= -5.46 V VCC= 0.0 V 2, 3 -83 mA 1 260 High level input current IIHVIH= -0.809 V at +25C -0.682 V at +125C -0.872 V at -55C 2, 3 450 A 1, 3 0.5 Low level input current IILVEE= -4.94 V, VCC= 0.0 V VIL= -1.950 3/ 2 0.3 A Fun
46、ctional tests See 4.3.1c 7, 8A, 8B See footnotes at end of table.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87567 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 8 DSCC FO
47、RM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C Group A subgroups Limits Unit unless otherwise specified Min Max Cases E, F, 2 and X AC tests 9 0.55 1.50 10 0.60 1.60 Transition time tTLH,tTHLVEE= -2.94 V VCC= 2.0 V CL 5 pF E011 0.55 1
48、.50 ns 9 0.65 2.20 10 0.70 2.40 Propagation delay time A, B, C to Y tPHH1, tPLL1, tPHL1, tPLH1Load all outputs through 100 to ground. See figure 4. A, B, C 11 0.60 2.20 ns 9 0.80 2.30 10 0.90 2.60 Propagation delay time ENABLE to Y tPHH2, tPLL2tPHL2, tPLH2E0, E111 0.80 2.30 ns Functional tests See 4.3.1c 7, 8A, 8B 1/ The quiescent limits are determined after a device has reached thermal equilibrium. This is
