1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add CAGE number 34335 as approved source for 01 device. Add CAGE number 66579 for devices 01 through 04. Add device 04. Delete footnote 4/ from tQLQVcondition block. Add footnote 4/ to tEHQZcondition block. Remove test condition C. Make editorial
2、 changes to margin test method B. Make editorial changes to power dissipation. 89-08-23 M. A. Frye B Add case outline letter and device type 05 for vendor CAGE number 1FN41. Add test condition C to 4.2 and 4.3.2. Add vendor CAGE number 34649 to the drawing as a source for device types 01XX, 02XX, an
3、d 03XX. Add vendor CAGE 34335 for devices 04XX, 04YX, 05XX, and 05YX. Removed vendor CAGE number 60991 from drawing. Editorial changes throughout. 93-02-02 M. A. Frye C Make changes to paragraph 1.3, Table I, and AC waveforms. Add paragraph 3.11 and remove paragraph 4.2c. Updated boilerplate and Sou
4、rce Approval Bulletin. 96-03-01 M. A. Frye D Add device types 06 - 14 to drawing along with CAGE number 65786 as source of supply. Updated boilerplate. 97-07-07 Raymond Monnin E Boilerplate update, part of 5 year review. ksr 06-09-11 Raymond Monnin REV SHET REV E SHET 15 REV STATUS REV E E E E E E E
5、 E E E E E E E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Kenneth Rice DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Raymond Monnin COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL APPROVED BY Michael A. Fr
6、ye DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 88-06-13 MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 64K x 8 UVEPROM, MONOLITHIC SILICON AMSC N/A REVISION LEVEL E SIZE A CAGE CODE 67268 5962-87648 SHEET 1 OF 15 DSCC FORM 2233 APR 97 5962-E644-06 Provided by IHSNot for ResaleN
7、o reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87648 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels co
8、nsisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in th
9、e PIN. 1.2 PIN. The PIN is as shown in the following examples: 5962 - 87648 01 X A Federal RHA Device Case Lead stock class designator type outline finish designator (see 1.2.1) (see 1.2.2) (see 1.2.4) (see 1.2.5) / / Drawing number For device classes Q and V: 5962 - 87648 01 Q X A Federal RHA Devic
10、e Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the
11、 appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device
12、type Generic number 1/ Circuit function Access time 01,12 64K x 8-bit UVEPROM 150 ns 02,13 64K x 8-bit UVEPROM 200 ns 03,14 64K x 8-bit UVEPROM 250 ns 04,11 64K x 8-bit UVEPROM 120 ns 05,10 64K x 8-bit UVEPROM 90 ns 06 64K x 8-bit UVEPROM 70 ns 07 64K x 8-bit UVEPROM 55 ns 08 64K x 8-bit UVEPROM 45
13、ns 09 64K x 8-bit UVEPROM 35 ns 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class le
14、vel B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1/ Generic numbers listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this document and will also be listed in MIL-HDBK-103.Provided by IHSNot for
15、ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87648 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1
16、835 and as follows: Outline letter Descriptive designator Terminals Package style X GDIP1-T28 or CDIP2-T28 28 Dual-in-line 2/ Y CQCC1-N32 32 Rectangular leadless chip carrier 2/ Z See figure 1 32 “J“ lead chip carrier 2/ 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device
17、classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. Storage temperature range -65C to +150C Input voltages with respect to ground.-0.6 V dc to +6.25 V dc Output voltages with respect to ground-0.6 V dc to VCC+1.0 V dc Voltage on pin A9 with respect to groun
18、d.-0.6 V dc to +13.5 V dc VPPsupply voltage with respect to ground-0.6 V dc to +14.0 V dc Power dissipation (PD) 3/350 mW Lead temperature (soldering, 10 seconds).+300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ).+150C 1.4 Recommended operating conditions. Ca
19、se operating temperature range (TC) .-55C to +125C Supply voltage range (VCC) +4.5 V dc to 5.5 V dc 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless
20、 otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MI
21、L-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or www.d
22、odssp.daps.mil or from the Standardization Document Order Desk, 700 Robins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2/ Lid shall be transparent to permit ultraviolet light erasure. 3/ Must withstand the added PDdue to short-circuit test; e.g., IOS. Provided by IHSNot for ResaleNo reproduct
23、ion or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87648 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 4 DSCC FORM 2234 APR 97 2.2 Order of precedence. In the event of a conflict between the text of this drawing and th
24、e references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall
25、be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accord
26、ance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix
27、A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 3. 3.2.3
28、.1 Unprogrammed or erased devices. The truth table for unprogrammed devices for contracts involving no altered item drawing shall be as specified on figure 3. When required in groups A, B, or C inspection (see 4.3), the devices shall be programmed by the manufacturer prior to test in a checkerboard
29、pattern or equivalent ( minimum of 50 percent of the total number of bits programmed) or to any altered item drawing pattern which includes at least 25 percent of the total number of bits programmed. 3.2.3.2 Programmed devices. The truth table for programmed devices shall as specified by an attached
30、 altered item drawing. 3.2.4 Block diagram(s). The block diagram(s) shall be as specified on figure 4. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits a
31、re as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be m
32、arked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this optio
33、n, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be
34、 a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supp
35、ly to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listi
36、ng as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certifica
37、te of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of chang
38、e of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87648 DEFENSE SUPPLY CENTER COLUM
39、BUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 5 DSCC FORM 2234 APR 97 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore docume
40、ntation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 42 (see MIL-PRF-38535, appendix A). 3.11 Processing EPROMs. All testing requirements and
41、quality assurance provisions herein shall be satisfied by the manufacturer prior to delivery. 3.11.1 Erasure of EPROMs. When specified, devices shall be erased in accordance with the procedure and characteristics specified in 4.5 herein. 3.11.2 Programmability of EPROMs. When specified, devices shal
42、l be programmed to the specified pattern using the procedures and characteristics specified in 4.6 herein. 3.11.3 Verification of erasure and/or programmability of EPROMs. When specified devices shall be verified as either programmed to the specified pattern or erased. As a minimum, verification sha
43、ll consist of performing a functional test (subgroup 7) to verify that all bits are in the proper state. Any bit that does not verify to be in the proper state shall constitute a device failure, and shall be removed from the lot. 3.12 Data retention. A data retention stress test shall be completed a
44、s part of the vendors reliability monitors. This test shall be done for initial characterization and after any design or process changes which may affect data retention. The methods and procedures may be vendor specific but shall guarantee data retention over the full military temperature range. The
45、 vendors procedure shall be kept under document control and shall be made available upon request of the aquiring or preparing activity, along with test data. 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PR
46、F-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screenin
47、g. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all
48、devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition C or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and po
