1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Added Arrhenius equation for unbiased bake under margin test method A, back end margin test step C. Corrected military part numbers for device types 01 and 02. Technical changes made to 1.2.2, table I, figure 1, figure 2, figure 4, figure 5, 4.3.
2、1, and table II. Added vendor CAGE 34649 for device type 05. Editorial changes throughout. 89-01-19 M. A. Frye B Add device type 08 for vendor CAGE number 66579. Add vendor CAGE number 34335 to the drawing as a source of supply for the 08 device with changes to table I. Deleted programming cycle tim
3、ing waveform and table III from drawing. Also deleted ESDS from drawing. Editorial changes throughout. 89-10-30 M. A. Frye C Deleted vendor CAGE number 34335 as a source of supply for device type 08. Added vendor CAGE number 34335 as a source of supply for device types 01 through 07. Deleted figure
4、5. Editorial changes throughout. 90-02-26 M. A. Frye D Changes in accordance with NOR 5962-R079-95. 95-02-15 M. A. Frye E Added provisions for QD certification. Added CAGE 0C7V7 to drawing as a source of supply for device type 07. Updated boilerplate. - glg 99-12-03 Raymond Monnin F Boilerplate upda
5、te, part of 5 year review. ksr 06-09-29 Raymond Monnin G Corrected footnote 1/ on section 1.2.2 package style heading to include all packages. Corrected test method number in 4.3.2 b (1). ksr 09-03-30 Robert M. Heber The original first page of this drawing has been replaced. REV SHET REV SHET REV ST
6、ATUS REV G G G G G G G G G G G OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Rick C. Officer DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPR
7、OVED BY Robert P. Evans AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 87-10-23 MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 16K X 8-BIT ULTRA VIOLET ERASABLE PROGRAMMABLE READ ONLY MEMORY (UVEPROM), MONOLITHIC SILICON AMSC N/A REVISION LEVEL G SIZE A CAGE CODE 67268 5962-87661 SHEET 1 OF 1
8、1 DSCC FORM 2233 APR 97 5962-E233-09 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87661 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1
9、 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87661 01 X A Drawing number Device type (s
10、ee 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 1/ Circuit function Access time 01 27C128 16K x 8-bit UVEPROM 90 ns 02 27C128 16K x 8-bit UVEPROM 120 ns 03 27C128 16K x 8-bit UVEPROM
11、 150 ns 04 27C128 16K x 8-bit UVEPROM 170 ns 05 27C128 16K x 8-bit UVEPROM 200 ns 06 27C128 16K x 8-bit UVEPROM 250 ns 07 27C128 16K x 8-bit UVEPROM 300 ns 08 27C128 16K x 8-bit UVEPROM 70 ns 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter
12、Descriptive designator Terminals Package style 1/ X GDIP1-T28 or CDIP2-T28 28 dual-in-line package Y CQCC1-N32 32 rectangular leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 2/ Supply voltage range (VCC) 2/ . -0.6 V
13、 dc to 6.25 V dc Supply voltage range (VPP) 2/ . -0.6 V dc to 14.0 V dc All input voltage range except A92/ -0.6 V dc to 6.25 V dc Input voltage range (A9) 2/ -0.6 V dc to 13.5 V dc Output voltage range 2/ -0.6 V dc to VCC+ 1.0 V dc Storage temperature range -65C to +150C Power dissipation 300 mW Le
14、ad temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +150C 3/ Data retention 10 years minimum 1.4 Recommended operating conditions. Supply voltage range (VCC) 4/ 4.5 V dc to 5.5 V dc Supply voltage range (VPP) 5/ . 4.5 V
15、dc to 5.5 V dc High level input voltage range (VIH) 2.0 V dc to 6.5 V dc (TTL) High level input voltage range (VIH) VCC-0.2 V dc to VCC+0.2 V dc (CMOS) Low level input voltage range (VIL) . -0.1 V dc to 0.8 V dc (TTL) Low level input voltage range (VIL) . GND -0.2 to GND +0.2 V dc (CMOS) Case operat
16、ing temperature range (TC) -55C to +125C 1/ Lid shall be transparent to permit ultraviolet light erasure. 2/ Under absolute maximum ratings, voltages are with respect to GND. 3/ Maximum junction temperature may be increased to +175C during burn-in and steady-state life. 4/ VCCmust be applied before
17、or at the same time as VPPand removed after or at the same time as VPP. The device must not be inserted into or removed from the board when VPPor VCCis applied. 5/ VPPcan be connected to VCCdirectly (except in the program mode). VCCsupply current in this case would be ICC+ IPP. During programming, V
18、PPmust be maintained at 12.5 V (0.5 V). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87661 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 3 DSCC FORM 2234 APR 97 2. APPLICA
19、BLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMEN
20、T OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-1
21、03 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philade
22、lphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been o
23、btained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qua
24、lified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Qual
25、ity Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to i
26、dentify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.2
27、Truth table. The truth table shall be as specified on figure 2. 3.2.2.1 Unprogrammed devices. The truth table for unprogrammed devices shall be as specified on figure 2. 3.2.2.2 Programmed devices. The requirements for supplying programmed devices are not part of this drawing. 3.2.3 Case outlines. T
28、he case outlines shall be in accordance with 1.2.2 herein. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test require
29、ments. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87661 DEF
30、ENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions Device Group A Limits Unit -55C TC +125C types subgroups 4.5 V VCC 5.5 V Min Max unless otherwise specified High level output V
31、OH IOH= -400 A All 1,2,3 2.4 V voltage Low level output VOL IOL= 2.1 mA All 1,2,3 0.45 V voltage Input current II VI= 0 V to 5.5 V All 1,2,3 10 A (leakage) Output current IO VO= 0 V to VCC All 1,2,3 10 A (leakage) VPPsupply current IPP1 VPP= VCC= 5.5 V All 1,2,3 100 A VPPsupply current IPP2 VPP= 13
32、V 01-07 1 50 mA (during program pulse) 1/ 08 60 Operating supply ICC1 VCC= 5.5 V, CE = VIL, 03.04, 1,2,3 25 mA current (active) f = 1/tAVQV, 05,06, 01-08= 0 mA 07 08 85 01 70 02 60 Standby power supply ICC2 VCC= 5.5 V, CE = 2.0 V, 01-07 1,2,3 3.0 mA current (TTL) f = 0 08 200 Standby power supply IC
33、C3 VCC= 5.5 V, CE = VCC, 01-07 1,2,3 300 A current (CMOS) f = 0 08 500 Input capactiance CIN VI= 0 V, f = 1 MHz, All 4 10 pF see 4.3.1c Output capacitance COUT VO= 0 V, f = 1 MHz, All 14 pF see 4.3.1c 4 Functional tests see 4.3.1e All 7,8A,8B See footnotes at end of table. Provided by IHSNot for Res
34、aleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87661 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Con
35、ditions Device Group A Limits Unit -55C TC +125C types subgroups 4.5 V VCC 5.5 V Min Max unless otherwise specified Address access time tAVQV See figures 3 and 4 01 9,10,11 90 ns 2/ 02 120 03 150 04 170 05 200 06 250 07 300 08 70 Chip enable access tELQV See figures 3 and 4 01 9,10,11 90 ns time 2/
36、02 120 03 150 04 170 05 200 06 250 07 300 08 70 Output enable access tOLQV See figures 3 and 4 01,02 9,10,11 50 ns time 2/ 03,04 70 05 75 06 100 07 120 08 25 CE or OE disable to tEHQZ, See figures 3 and 4 01,02 9,10,11 50 ns output in high Z 1/ tOHQZ 03,04 05,06 60 07 105 08 25 CE or OE enable to tE
37、HQV, See figures 3 and 4 All 9,10,11 0 ns output valid 1/ tOHQV 1/ May not be tested, but shall be guaranteed to the limits specified in table I. 2/ For all switching characteristics and timing measurements, inputs pulse levels are 0.40 V and 2.4 V and VPP= 12.5 V0.5 V during programming. Provided b
38、y IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87661 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 6 DSCC FORM 2234 APR 97 Device types ALL Case Outlines X Y Terminal Number Terminal
39、Symbol 1 VPPNC 2 A12VPP3 A7A124 A6 75 A5A66 A4 57 A3A48 A2 39 A1A210 A0 111 O1A012 O2NC 13 O3O114 GND O215 O4O316 O5GND 17 O6NC 18 O7O419 O8 520 CE O6 21 A10O722 OE O823 A11CE 24 A9A1025 A8OE 26 A13NC 27 PGM A11 28 VCCA929 - A830 - A1331 - PGM 32 - VCCNC = no connection FIGURE 1. Terminal connection
40、s. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87661 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 7 DSCC FORM 2234 APR 97 Mode Function pins (see note 1) CE OE PGM VPP VCC A9 A0 01- 08 Read VIL VIL VIH VCC VCC X X DOUT Output disable VIL VIH VIH VCC VCC X X HIGH-Z
