DLA SMD-5962-87698 REV B-2010 MICROCIRCUIT DIGITAL ADVANCED CMOS DUAL 4-INPUT MULTIPLEXER TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

上传人:刘芸 文档编号:699105 上传时间:2019-01-01 格式:PDF 页数:12 大小:105.56KB
下载 相关 举报
DLA SMD-5962-87698 REV B-2010 MICROCIRCUIT DIGITAL ADVANCED CMOS DUAL 4-INPUT MULTIPLEXER TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf_第1页
第1页 / 共12页
DLA SMD-5962-87698 REV B-2010 MICROCIRCUIT DIGITAL ADVANCED CMOS DUAL 4-INPUT MULTIPLEXER TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf_第2页
第2页 / 共12页
DLA SMD-5962-87698 REV B-2010 MICROCIRCUIT DIGITAL ADVANCED CMOS DUAL 4-INPUT MULTIPLEXER TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf_第3页
第3页 / 共12页
DLA SMD-5962-87698 REV B-2010 MICROCIRCUIT DIGITAL ADVANCED CMOS DUAL 4-INPUT MULTIPLEXER TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf_第4页
第4页 / 共12页
DLA SMD-5962-87698 REV B-2010 MICROCIRCUIT DIGITAL ADVANCED CMOS DUAL 4-INPUT MULTIPLEXER TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf_第5页
第5页 / 共12页
点击查看更多>>
资源描述

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. - jak 03-07-28 Thanh V. Nguyen B Update test condition for High level output voltage (VOH) and Low level output voltage (VOL) in table I. Update boilerplate paragraph

2、s to current MIL-PRF-38535 requirements. - MAA 10-04-12 Thomas M. Hess REV SHEET REV SHEET REV STATUS REV B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Larry T. Gauder DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROC

3、IRCUIT DRAWING CHECKED BY Ray Monnin THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, ADVANCED CMOS, DUAL 4-INPUT MULTIPLEXER, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 89-04-03 AMS

4、C N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-87698 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E265-10 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 59

5、62-87698 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in th

6、e following example: 5962-87698 01 E A Drawing number Device type Case outline Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.2.1 Device types. The device types identify the circuit function as follows: Device type Generic number Circuit function 01 54ACT153 Dual 4-input multiplexer, TTL compatib

7、le inputs 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat pack 2 CQCC1-N20 20 Leadless-chip-carrier 1.2.3 Lead finish. The

8、lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range (VCC) -0.5 V dc to + 6.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+ 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc DC clamp current (IIK, IOK) 20 mA DC ou

9、tput current (IOUT) (per pin) . 50 mA DC VCCor GND current (ICCor IGND) 100 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) 500 mW Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ)

10、+175C 3/ 1.4 Recommended operating conditions. 2/ Supply voltage range (VCC) +4.5 V dc minimum to 5.5 V dc maximum Input voltage range (VIN) 0.0 V dc to VCCOutput voltage range (VOUT) 0.0 V dc to VCCCase operating temperature range (TC) . -55C to +125C Input rise or fall rate (t/V): VCC= 4.5 V, VCC=

11、 5.5 V 0 to 8 ns/V 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to ground. 3/ Maximum junction temperature sh

12、all not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS,

13、 OHIO 43218-3990 SIZE A 5962-87698 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specifi

14、ed, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interf

15、ace Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardizatio

16、n Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applica

17、ble laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produ

18、ced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accorda

19、nce with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certi

20、fication mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. This Drawing has been modified to allow the manufacturer to use alternate die/fabrication requirements paragraphs A.3.2.2 of MIL-PRF-383535 or other alternative approved by the qualifying activit

21、y. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections

22、 shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4.

23、Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-87698 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless

24、 otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests fo

25、r each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feas

26、ible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be repl

27、aced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 and QML-38

28、535 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conf

29、ormance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and t

30、he acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-

31、STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-87698 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test and MIL-STD-883 test method 1/ Symbol Test conditions -55C TC +125C 4.5 V VCC 5.5 V unless oth

32、erwise specified Group A subgroups Limits 2/ Unit Min Max High-level output voltage 3006 VOH3/ VIH= 2.0 V or VIL= 0.8 V IOH= -50 A VCC= 4.5 V 1, 2, 3 4.4 V VCC= 5.5 V 5.4 VIH= 2.0 V or VIL= 0.8 V IOH= -24 mA VCC= 4.5 V 3.7 VCC= 5.5 V 4.7 VIH= 2.0 V or VIL= 0.8 V IOH= -50 mA VCC= 5.5 V 3.85 Low-level

33、 output voltage 3007 VOL3/ VIH= 2.0 V or VIL= 0.8 V IOL= +50 A VCC= 4.5 V 1, 2, 3 0.1 V VCC= 5.5 V 0.1 VIH= 2.0 V or VIL= 0.8 V IOL= +24 mA VCC= 4.5 V 0.5 VCC= 5.5 V 0.5 VIH= 2.0 V or VIL= 0.8 V IOL= +50 mA VCC= 5.5 V 1.65 High-level input voltage VIH4/ VCC= 4.5 V 1, 2, 3 2.0 V VCC= 5.5 V 2.0 Low-le

34、vel input voltage VIL4/ VCC= 4.5 V 1, 2, 3 0.8 V VCC= 5.5 V 0.8 Input leakage current low 3009 IILVIN= 0.0 V VCC= 5.5 V 1, 2, 3 -1.0 A Input leakage current high 3010 IIHVIN= 5.5 V VCC= 5.5 V 1, 2, 3 1.0 Quiescent supply current delta, TTL input levels ICC 5/ VCC= 5.5 V For input under test, VIN= VC

35、C- 2.1 V For all other inputs, VIN= VCCor GND 1, 2, 3 1.6 mA Quiescent supply current 3005 ICCHVIN= VCCor GND VCC= 5.5 V IOUT= 0.0 mA 1, 2, 3 160 A ICCL160 Input capacitance 3012 CINSee 4.3.1c 4 8.0 pF Power dissipation capacitance CPD6/ See 4.3.1c 4 70.0 pF Functional tests 3014 7/ Tested at VCC= 4

36、.5 V and repeated at VCC= 5.5 V, see 4.3.1d 7, 8 L H See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-87698 REVISION LEVE

37、L B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test and MIL-STD-883 test method 1/ Symbol Test conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Limits 2/ Unit Min Max Propagation delay time, In to Zn 3003 tPHL18/ VCC=

38、 4.5 V CL= 50 pF RL= 500 See figure 4 9 1.0 9.5 ns 10, 11 1.0 12.0 tPLH18/ 9 1.0 9.5 ns 10, 11 1.0 12.5 Propagation delay time, Sn to Zn 3003 tPHL28/ 9 1.0 11.5 ns 10, 11 1.0 14.5 tPLH28/ 9 1.0 11.5 ns 10, 11 1.0 15.0 Propagation delay time, output enable, En to Zn 3003 tPHL38/ 9 1.0 9.5 ns 10, 11 1

39、.0 11.5 tPLH38/ 9 1.0 10.5 ns 10, 11 1.0 13.5 1/ For tests not listed in the referenced MIL-STD-883 (e.g.ICC), utilize the general test procedure under the conditions listed herein. All inputs and outputs shall be tested, as applicable, to the tests in table I herein. 2/ For negative and positive vo

40、ltage and current values, the sign designates the potential difference in reference to GND and the direction of current flow, respectively; and the absolute value of the magnitude, not the sign, is relative to the minimum and maximum limits, as applicable, listed herein. 3/ VOHand VOLshall be tested

41、 at VCC= 4.5 V. VOHand VOLare guaranteed, if not tested, for VCC= 5.5 V. Limits shown apply to operation at VCC= 5.0 V 0.5 V. Transmission driving tests are performed at VCC= 5.5 V with a 2 ms duration maximum. 4/ VIHand VILtests are not required, and shall be applied as forcing functions for VOHand

42、 VOLtests. 5/ This test may be performed either one input at a time (preferred method) or with all input pins simultaneously at VIN= VCC- 2.1 V (alternate method). Classes Q and V shall use the preferred method. When the test is performed using the alternate test method, the maximum limits are equal

43、 to the number of inputs at a high TTL input level times 1.6 mA; and the preferred method and limits are guaranteed. 6/ Power dissipation capacitance (CPD) determines the no load dynamic power consumption, PD= (CPD+ CL) (VCCx VCC)f + (ICCx VCC) + (n x d x ICCx VCC). The dynamic current consumption,

44、IS= (CPD+ CL)VCCf + ICC+ n x d x ICC. For both PDand IS, n is the number of device inputs at TTL levels, f is the frequency of the input signal, and d is the duty cycle of the input signal. 7/ Tests shall be performed in sequence, attributes data only. Functional tests shall include the truth table

45、and other logic patterns used for fault detection. The test vectors used to verify the truth table shall, at a minimum, test all functions of each input and output. All possible input to output logic patterns per function shall be guaranteed, if not tested, to the truth table in figure 2 herein. Fun

46、ctional tests shall be performed in sequence as approved by the qualifying activity on qualified devices. For VOUTmeasurements, L 0.8 V and H 2.0 V. 8/ AC limits at VCC= 5.5 V are equal to limits at VCC= 4.5 V and guaranteed by testing at VCC= 4.5 V. The minimum ac limits are guaranteed for VCC= 5.5

47、 V by guard banding the VCC= 4.5 V limits to 1.5 ns minimum. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-87698 REVISION LEVEL B SHEET 7 DSCC FORM 2

48、234 APR 97 Device type 01 Case outlines E and F 2 Terminal number Terminal symbol 1 Ea NC2 S1 Ea 3 I3a S1 4 I2a I3a 5 I1a I2a 6 I0a NC 7 Za I1a8 GND I0a 9 Zb Za10 I0b GND 11 I1b NC 12 I2b Zb13 I3b I0b 14 S0 I1b 15 EbnullnullnullnullI2b 16 VCCNC 17 - - - I3b 18 - - - S0 19 - - - Ebnullnullnullnull20 - - - VCCNC = No internal connection FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SU

展开阅读全文
相关资源
猜你喜欢
相关搜索

当前位置:首页 > 标准规范 > 国际标准 > 其他

copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
备案/许可证编号:苏ICP备17064731号-1