1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add a new vendor, National Semiconductor with CAGE code 27014. Change FMAXfor subgroups 10 and 11 from 70 MHz to 60 MHz in table I. Changed test conditions of IODfrom VIN= 5.5 V to VIN= GND. Editorial changes throughout. 89-11-03 W. Heckman B Add
2、 “Changes in accordance with NOR 5962-R152-93“. -tvn 93-05-05 M. L. Poelking C Update to reflect latest changes in format and requirements. Editorial changes throughout. -les 01-05-02 Raymond Monnin D Update drawing to current requirements. Editorial changes throughout. - gap 08-10-22 Robert M. Hebe
3、r The original first sheet of this drawing has been replaced. REV SHET REV SHET REV STATUS REV D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 PMIC N/A PREPARED BY Monica L. Poelking DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Ray Monnin COLUMBUS, OHIO 43218-3990 http
4、:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY D. A. DiCenzo MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED SCHOTTKY, TTL, D-TYPE REGISTER, AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 88-08-23 MONOLITHIC SILICON AMSC N/A REVISION LEVEL D SIZE A CAGE
5、 CODE 67268 5962-88555 SHEET 1 OF 9 DSCC FORM 2233 APR 97 5962-E194-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88555 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 D
6、SCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-88555 01
7、E X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54F378 Hex parallel D-type register with enable 1.2.2 Case outline(s). The case o
8、utline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat package 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified i
9、n MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage . -0.5 V dc minimum to +7.0 V dc maximum Input voltage (VIN) -1.2 V dc at -18 mA to +7.0 V dc Storage temperature range . -65C to +150C Maximum power dissipation (PD) 1/ 247 mW Lead temperature (soldering, 10 seconds) +300C Th
10、ermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) . 4.5 V dc minimum to 5.5 V dc maximum Minimum high level input voltage (VIH) 2.0 V dc Maximum low level input voltage (VIL) . 0.8 V dc Case opera
11、ting temperature range (TC) -55C to +125C Minimum width of clock pulse high: TC= +25C . 4.0 ns TC= -55C, +125C . 5.0 ns Minimum width of clock pulse low: TC= +25C . 6.0 ns TC= -55C, +125C . 7.5 ns _ 1/ Must withstand the added PDdue to short circuit test, e.g., IOS. Provided by IHSNot for ResaleNo r
12、eproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88555 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 Minimum setup time, D high to clock pulse: TC= +25C . 4.0 ns TC= -55C, +125C . 5.0
13、ns Setup time, E to CP 13.0 ns Minimum setup time, D low to clock pulse: TC= +25C . 4.0 ns TC= -55C, +125C . 5.0 ns Setup time, E to CP 13.0 ns Minimum hold time, D high to clock pulse: TC= +25C, -55C, +125C 2.0 ns Setup time, E to CP 0.0 ns Minimum hold time, D low to clock pulse: TC= +25C, -55C, +
14、125C 2.0 ns Setup time, E to CP 0.0 ns 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those
15、 cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Out
16、lines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue,
17、Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific
18、exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QM
19、L) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as do
20、cumented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38
21、535 is required to identify when the QML flow option is used. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88555 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM
22、2234 APR 97 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal co
23、nnections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Test circuit and switching waveforms. The test circuit and switching waveforms shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise spec
24、ified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup
25、 are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to spa
26、ce limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“
27、 or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The cer
28、tificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PR
29、F-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain
30、the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING
31、 SIZE A 5962-88555 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC+125C Group A subgroups Limits Unit unless otherwise specified Min Max High level output voltage V
32、OHVCC= 4.5 V, VIL= 0.8 V, VIH= 2.0 V, IOH= -1.0 mA 1, 2, 3 2.5 V Low level output voltage VOLVCC= 4.5 V, VIL= 0.8 V, VIH= 2.0 V, IOL= 20 mA 1, 2, 3 0.5 V Input clamp voltage VICVCC= 4.5 V, IOL= -18 mA, TC= +25C 1, 2, 3 -1.2 V High level input current IIH1VCC= 5.5 V, VIN= 2.7 V 1, 2, 3 20 A IIH2VCC=
33、5.5 V, VIN= 7.0 V 1, 2, 3 100 A Low level input current IILVCC= 5.5 V, VIN= 0.5 V 1, 2, 3 -0.6 mA Supply current ICCVCC= 5.5 V, VIN= 0.0 V 1, 2, 3 45 mA Short circuit output current IOSVCC= 5.5 V, VOUT= 0.0 V 1/ 1, 2, 3 -60 -150 mA Output drive current IODVOUT= 2.5 V, VCC= 4.5 V, VIN= GND 1, 2, 3 60
34、 mA Functional tests See 4.3.1c 7, 8 9 80 Maximum clock frequency fMAX2/ 10, 11 60 MHz 9 2.0 9.5 ns tPLH10, 11 2.0 10.0 ns Propagation delay time, CP to Q tPHLVCC= 5.5 V, RL= 500 5%, CL= 50 pF 10% 9, 10, 11 2.5 10.5 ns 1/ Not more than one output should be shorted at a time, and the duration of the
35、short circuit condition should not exceed one second. 2/ fMAX, if not tested, shall be guaranteed to the specified limits. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88555 DEFENSE SUPPLY CENTER COLUMBUS
36、COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 Case outlines E and F 2 Terminal number Terminal Symbol 1 E NC 2 Q0 E 3 D0 Q04 D1 D0 5 Q1 D16 D2 NC 7 Q2 Q1 8 GND D29 CP Q2 10 Q3 GND11 D3 NC 12 Q4 CP 13 D4 Q314 D5 D3 15 Q5 Q416 VCCNC 17 D4 18 D519 Q5 20 VCCNC = No connection
37、FIGURE 1. Terminal connections. Inputs Outputs E CP D Q H dcX No change L dcH H L dcL L H = High voltage level L = Low voltage level X Irrelevant dc = Clock pulse (active rising edge) FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS
38、-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88555 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes probe and jig capacitance. 2. The clock input pulse has the following characteristics: tr= tf= 2.5 ns, duty cycle = 50%, a
39、nd PRR 1 MHz. FIGURE 3. Test circuit and switching waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88555 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 8 DSCC FORM
40、2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspe
41、ction. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon
42、request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except i
43、nterim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) - - - Final electr
44、ical test parameters (method 5004) 1*, 2, 3, 7, 8, 9 Group A test requirements (method 5005) 1, 2, 3, 7, 8, 9, 10, 11 Groups C and D end-point electrical parameters (method 5005) 1, 2, 3 * PDA applies to subgroup 1. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accor
45、dance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 4, 5, and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroup
46、s 7 and 8 shall include verification of the truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88555 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 9 DSCC FORM 2234
47、APR 97 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision l
48、evel control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. (2) TA= +125C, minimum. (3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535, appendix A. 6. NOTES