DLA SMD-5962-88696 REV A-1990 MICROCIRCUITS DIGITAL BIPOLAR DYNAMIC MEMORY CONTROLLER MONOLITHIC SILICON《硅单片动态记忆体控制器双极化数字微电路》.pdf

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1、SND-5962-88b96 REV A 57 m 7997776 O000260 1 m LTR A REVISIONS DESCRIPTION Technical changes were made in table I. made in figure 4, Clarifications were Editorial changes throughout. * SHEET REV STATUS OF SHEETS PMIC WA STANDARDIZED MILITARY DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENT

2、S AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC NIA 1990 AUG 20 PREPMED BY A- I DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 a 73% CHE Y MICROCIRCUITS, DIGITAL BIPOLAR DYNAMIC MEMORY CONTROLLER MONOLITHIC SILICON DRAWING APPROVAL DATE 19 August 1988 REVISION LEVEL I A SHEET 1 OF 26 I . IESC

3、 FORM 193 SEP 81 tus. GOMRNMINT PRINTING OFFICE: IW - 74a.1mw I 5962-E1774-1 DISTRIBUTION STATEMENT A. Approved lor public release; dislribulion Is uniimiled. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-l. SCOPE 1.1 SCO e. This drawinglldescribec

4、 device requirements for class 6 microcircuits in accordance nith 1. 10s. SIZE A 5962-88696 STANDARRIZED MILITARY DRAWING REVISION LEVEL SHEET DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 2 )ESC FORM 193A it U S GOVERNMENT PRINTING OFFICE 1983-749-035 SEP a7 Provided by IHSNot for ResaleNo r

5、eproduction or networking permitted without license from IHS-,-,-SMD-5762-676 REV A 57 7777776 O000262 5 U SIZE A STANDARDIZED I 5962-88696 2. APPLICABLE DOCUMENTS 2.1 Government specification, standard, and bulletin. Unless otherwise specified, the following specification, standard, and bulletin of

6、 the issue listed in that issue of the Department of Defense Index of Specifications and Standards specified in the solicitation, form a part of this drawing to the extent specified herein. SPEC IF ICATION MILITARY MI L-M-38510 - Microcircuits, General Specification for. STANDARD MILITARY MI L-STU-8

7、83 - Test Methods and Procedures for Microelectronics. BULLETIN MILITARY MI L-BUL-103 - Li st of Standardized Military Drawing (SMDs). (Copies of the specification, standard, and bulletin required by manufacturers in connection with specific acquisition functions should be obtained from the contract

8、ing activity or as directed by the contracting activity. 1 references cited herein, the text of this drawing shall take precedence. 2.2 Order of precedence. 3, REQUIREIIIENTS 3.1 Item requirements. The individual item requirements shall be in accordance with 1.2.1 of VIL-STD-883, “Provisions for the

9、 use of MIL-STO-883 in conjunction with compliant non-JAN devices“ and as specified herein. dimensions shall be as specified in MIL-M-38510 and herein, In the event of a conflict between the text of this drawing and the 3.2 Design, construction, and physical dimensions. The design, construction, and

10、 physical 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.2 Truth tables. The truth tables shall be as specified on figure 2. 3.2.3 Block diagram. The block diagram shall be as specified on figure 3. 3.2.4 Cace outlines. The case outlines shall be in accor

11、dance with 1.2.2 herein. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and apply over the full case operating temperature range. 3.4 Electrical test requirements, The electrical test requirements

12、shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 5.5 Marking. Marking shall be in accordance with MIL-STD-883 (see 3.1 herein). The part shall In addition, the manufacturers part number ,e marked with the part number listed in 1.2 herein.

13、 nay also be marked as listed in MIL-BUL-103 (see 6.6 herein), Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- SMD-57b2-b76 REV A 57 W 7777776 00002b3 7 STAN DARDI Z ED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 TABLE I. E

14、lectrical performance characteristics. SIZE A 5962-88696 REVISION LEVEL SHEET 4 I I I I I I Condi ti ons Device Group A Limits I Unit -55C N, OHIO 45444 -: QV REVISION LEVEL SHEET ia SETUP, HOLD AND RELEASE TIMES 3 NOTES: 1. Diagram shown for HIGH data only. Output transition mw be opposite sense. 2

15、* Cross-hatched are “dont care“ condition. - I“5V HIGH - LQW- HIG7 PULSE PULSE WIDTH :1 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5762-8676 REV A 57 = 7777776 0000278 7 3.0 V 1.5 V nv VONP OUTPUT DRIVERS LEVELS 3v ov 3- STATE CONTROL 1.5 V

16、tPHZ PZH (DISABLE) (ENABLE) (E) I vO H -VOH -e5 v - OH 2.4 V -(i 0.8 v (HIGH IMPEDANCE) VoL-C.5 V - I OUTPUT VOL VOL tPZL . tPZL74-W (DISABLE 1 (ENABLE) THREE-STATE CONTROL LEVELS (FOR DEVICE TYPE 02 ONLY) NOTE: Decoupling is needed for all ac tests. FIGURE 4. Switching waveforms and test circuits.

17、SIZE A 5962-88696 STAN QARQIZ ED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 A 19 c t U. S. GOVERNMEIIT PRINTING OFFICE- 1089-749-033 DESC FORM 193A SEP 87 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,

18、-SND-59b2-Bh96 REV A 59 9 999979b 0000279 O U SIZE A STANDARDIZED FR OM DEVICE OUTPUT Oqkkn - - 5962 -88696 NOTE: tpg specified at CL = 50, 150 and 500pF. MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 CAPACITIVE LOAD SWITCHING REVISION LEVEL SHEET 20 T H REE-STA T E EN ABLE /

19、 D I SABLE a (FOR DEVICE TYPE 02 ONLY) FIGURE 4. Switchi,ng waveforms and test circuits - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SHD-5762-BBb76 REV A 57 m 7777776 0000280 7 I I I Q l OLUMroup A inspection. Tests shall be as specif

20、ied in table II herein. Subgroups 4, 6, and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. Subgroups 7 and 8 testing shall be sufficient to verify the functional operation of the device, These tests form a part of the vendors test tape and shall be maintained and available from the appro

21、ved source of supply. Groups G and D inspections, End-point electrical parameters shall be as specified in table II herein. Steady-state life test conditions, method 1005 of MIL-STO-883. (1) Test condition A using the circuit submitted with the certificate Qf compliance (see 3 .ti her4 n) . (2) TA a

22、 +125C, minimurn. (3) Test duration: 1,000 hours, except as permitted by method 1095 of MIL-STD-883. I . . . . . . . . . . SIZE A 5962-88696 STANRARDIZED MILITARY DRAWING REVISION LEVEL SHEET DEFENSE ELECTRONICS SUPPLY CEMER DAYTON, OHIO 45444 A 22 DESC FORM 193A h U S GOVERNMENT PRINTING OFIIUE 193

23、9-749 033 SEP 87 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-!- SMD-59b2-88636 REV A 57 M 779779b 0000282 O SIZE A STANDARDIZED I 5962-88696 TABLE II. Electrical test requirements. 1 1 I I MIL-STD-883 test requirements I Subgroups I I (per method

24、 I I I 5005, table I) I I I l I i I I nterim electrical parameters i - I I I I (method 5004) I I I I I I I I Final electrical test parameters I 1*, 2, 3, 7, 8, I I I I I (method 5004) I 9, 10, 11 I I I I I Group A test requirements I 1, 2, 3, 7, 8, I I (method 5005) I 9, 10, 11 I I I I I I I I I I l

25、S 2, I I electrical parameters I (method 5005) I I I Groups C and D end-point * PDA applies to subgroup 1. 5. PACKAGING 5.1 Packaging requirements, The requirements .for- packaging shall be in accordance with MIL -M-385 10. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are inte

26、nded for use when military specifications do not exist and qualified military devices that will perform the required function are not available for OEM application. When a military specification exists and the product covered by thi-s drawing has been qualified for listing on QPL-38510, the device s

27、pecified herein will be inactivated and will not be used for new design. The QPL-38510 product shall be the preferred item for all applications. covered by a contractor-prepared specification or drawing. with the users of record for the individual documents. This coordination will be accomplished in

28、 accordance with MI L-STD-481 using DD Form 1693, Eng! neeri ng Change Proposal (Short Form). 6.4 Record of users, Military and industrial users shall inform Defense Electronics Supply Center when a system application requires configuration control and the applicable SMD. DESC will naintain a record

29、 of users and this list will be used for coordination and distribution of changes to the drawings. )ESC-ECC, telephone (513) 296-6022. telepho- 296-6525. 6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device 6.3 Configuration control of SMDls. All proposed ch

30、anges to existing SMDls will be coordinated Users of drawings covering microelectronics devices (FSC 5962) should contact 6.5 Comments. Comments on this drawing should be directed to DESC-ECC, Dayton, Ohio 45444, or DESC FORM 193A SEP a7 t U. S. GOVERNMENT PAIHTING OFFICE: 1889-740-033 Provided by I

31、HSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- SMD-5762-88676 REV A 57 7777776 0000283 2 m 6.6 Pin descriptjon. Pin number I II Case I Case I Name 11/01 Description ,x I Y I . 1.1 , I II 3-12 i 3-6 i Ao-A17 i I i Ao-Ag are latched in as the nine-bit Row Address

32、 for the RAM. 15-22) 12-171 I I These inputs drive QO-Qs when the device is in the Read/Write mode I 21-241 I I and MSEL is low. Ag-A17 are latched in as the Column Address, and I 28-311 I I will drive QO-Q8 when MSEL is high and the DMC is in the Read/Write I I I I mode. The addresses are latched w

33、ith the Latch Enable (LE) signal. I I II 23,241 33,34 SELO-1 i I i These two inputs are normally the two higher-order address bits and I I are used in thfiead/Wra, assuming it meets the setup 1 and hold time requirements. I II I i I I II I I II I 1 I I the memory address inputs. When MSEL is high th

34、e Column Address is I I I I selected, while the Row Address is selected when MSEL is low, The I I I I address may come from either the address latch or refresh address I I I i counter depending on MCO-1. 2 I 2 I MSEL I I I This input determines whether the Row or Column Address will be sdnt to II I

35、I I This active-low input is used to select the DMC. When (5s is active, I I the device operates normally in all four modes. When CS goes high, the I I device will not enter the Read/Write mode, This allows more than one I I device DMC to control the same memory, thus providing an easy method I I fo

36、r expanding the memory size. I1 I I 1 This active-low input enableddisables the output signals. When & is 1 Il IT3 II I1 I I I 152 lm 1 I I I high, the outputs of the DMG enter the high-fmpedance state. 7JE is I 1 I I available on device O2 only. I ,.I II I1 I I I These inputs are used to specify wh

37、ich of the four operating mode5 the I I given in figure 2. I I O I 25,261 35,361 MCO-1 I I I I DMC should be using. The description of the four operating modes is I. ,-I I .l. 32-351 46-491 00-8 39-431 54-571 These address outputs will feed the DRAM address inputs, and provide I drive for memory sys

38、tems up to 500 picofarads in capacitance. I 62 I I I, I I SIZE A 5962-88696 STANDARDIZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 24 ESC FORM 193A t U S GOVUINUENT PRINTIHG OFFICE 1088-749-033 SEP 81 Provided by IHSNot for ResaleNo reproduction or ne

39、tworking permitted without license from IHS-,-,-SND-57bZ-b7h REV A 57 W 777777b 0000284 4 W I lin number I II Case I Case I Name 11/01 Description I II 27 I 37 i RASI I I I I m2, or slAs3) is forced low after receipt ob RASI. In either I I I I I I I I I During nomal memory cycles, the decoded RAS. o

40、utput (m, mi, I I I high. II I Refresh mode, all four mi outputs will go low following RASI going I I II 29,31 40,44 mo-3 45,47 I 64,66 I I i O i Each one of the Row Address Strobe outputs provides a I I II signal to Each will go low only when I one of the four banks of dynamic memory. I go low in r

41、esponse to RASI in either of the Refresh modes. I I I I selected by SELO and SEL1 and only after RASI goes high. All four I I I I I II I I I I forced low. 48 I 68 I CASI I I I This input going active will cause the selected CGi output to be I I Il I I II 28,30 39,41 mo-3 I determine which mi output

42、will go active following CASI going hi h. 44,46 I 63,65 I I 1 I I When memory scrubbing is performed, only the signal selected Y I I I I CNTRo and CNTR1 will be active (see W Output Function Table). I For nonscrubbing cycles, all fouriTkSi outputs remain high. I I I O i During notmal Read/Write cycl

43、es the two select bits (SELO, SEL11 I I II % I STANDARDIZED SIZE MILITARY DRAWING A 5962-88696 DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET 25 DAYTON, OHIO 45444 * U. S. GOVERNMENT PRINTINQ OFFICE 1889-749-3 DESC FORM 193A SEP 87 Provided by IHSNot for ResaleNo reproduction or networking p

44、ermitted without license from IHS-,-,-I SMD-57b2-88b76 REV A 57 m 777777b 0000285 b ms SIZE A STANDARDIZED 6.7 Approved source of supply. An approved source of supply is listed in MIL-BUL-103. dditional sources will be added to MIL-BUL-103 as they become available. The vendor listed in IIL-BUL-103 h

45、as agreed to this drawing and a certificate of compliance (see 3.6 herein) has been ,ubmitted to and accepted by DESC-ECC. inly and is current only to the date of the last action of this document. The approved source listed below is for infomation purposes 5962 -88696 I I I Vendor I I I Military dra

46、wing I Vendor I I part number I CAGE I similar part i I I number I number i/ I I I I S I I 5962-8869601XX I 34335 I At42968A/BXC I I 1 I I I AM2968A/BUA I I I 5962-8869602YX I - l/ Caution. Do not use this number for item acquisition. I I 34335 I I Items acquired to this nuniber may not satisfy the

47、performance requirements of this drawing. MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DArTON, OHIO 45444 Vendor CAGE number 34335 REVISION LEVEL SHEET A 26 Vendor name and address Advanced Micro Devices, Incorporated 901 Thompson Place P.O. Box 3453 Sunwvale, CA 94088 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-

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