DLA SMD-5962-88719 REV C-2002 MICROCIRCUIT LINEAR 12-BIT QUAD D A CONVERTER MONOLITHIC SILICON《硅单片12位四方D A转换器线性微电路》.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R032-95. drw 94-11-08 Michael A. Frye B Changes in accordance with NOR 5962-R074-96. sbr 96-03-08 Michael A. Frye C Incorporate rev. A and rev. B NORs. Update drawing to reflect current requirements. drw. 02-08

2、-07 Raymond Monnin REV SHET REV C C C C C C SHEET 15 16 17 18 19 20 21 REV STATUS REV C C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Dan Wonnell DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Sandra Rooney COLUMBUS, OHIO 432

3、16 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, LINEAR, 12-BIT, QUAD D/A CONVERTER, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 93-01-14 AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 59

4、62-88719 SHEET 1 OF 21 DSCC FORM 2233 APR 97 5962-E509-02 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88719 DEFENSE SUPPLY

5、CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead fi

6、nishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 88719 01 M X A Federal stock class designator RHA designator (

7、see 1.2.1) Devicetype (see 1.2.2) Device class designator Caseoutline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Dev

8、ice class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device types. The device types identify the circuit function as follows: Device type Generic number Circuit function

9、 01 AD664TD-UNI D/A converter, 12-bit, unipolar 02 AD664TD-BIP D/A converter, 12-bit, bipolar 03 AD664TE D/A converter, 12-bit, unipolar/bipolar 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requi

10、rements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outlines. The case outlines are as designated in MIL-ST

11、D-1835 and as follows: Outline letter Descriptive designator Terminals Package style X GDIP1-T28 or CDIP2-T28 28 Dual-in line Y CQCC1-N44 44 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for de

12、vice class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88719 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ VLL

13、to DGND. 0 V dc to +7 V dc VCCto DGND 0 V dc to +18 V dc VEEto DGND -18 V dc to 0 V dc Power dissipation (PD) 1000 mW AGND to DGND . -1 V dc to +1 V dc Reference input VREF 10 V dc and VREF (VCC 2 V, VEE+ 2 V) VCCto VEE. 0 V dc to +36 V dc Digital inputs . -0.3 V dc to +7 V dc Analog inputs Indefini

14、te shorts to VCC, VLL, VEEand GND Lead temperature (soldering, 10 seconds) +300C 1.4 Recommended operating conditions. Input voltage requirements: VLLmax . +5.0 V dc VCC/VEE. 15 V dc Ambient temperature range (TA) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and han

15、dbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement

16、 thereto, cited in the solicitation. SPECIFICATION DEPARTMENT OF DEFENSE MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlin

17、es. HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization Document Order Desk, 700 Robbins Avenue,

18、 Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific

19、 exemption has been obtained. 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS

20、-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88719 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 an

21、d as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A fo

22、r non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1

23、 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Block diagram. The block diagram shall be as specified on fi

24、gure 3. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3

25、.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marke

26、d as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device cla

27、sses Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark f

28、or device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For devi

29、ce class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm th

30、at the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF

31、-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this dr

32、awing is required for any change as defined in MIL-PRF-38535, appendix A. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documenta

33、tion shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 92 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networki

34、ng permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88719 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TA +125C unless otherwise

35、specified Group A subgroups Device type Limits Unit Min MaxResolution RES 1, 2, 3 All 12 Bits Relative accuracy RA 1 01, 02 3/4 LSB 03 1/2 2, 3 01, 02 1 03 3/4 12 01, 02 1/2 Differential nonlinearity DNL Major carry errors 1 01, 02 3/4 LSB 03 1/2 2, 3 All 1 12 01,02 1/2 Gain error AEAll bits on 1 01

36、, 02 7 LSB 03 5 12 01, 02 5 Gain temperature coefficient TCAEAll bits on 1, 2, 3 All 10 ppm/C Unipolar offset error VOSAll bits off 1 01 2 LSB 03 1 12 01 1 Unipolar offset temperature coefficient TCVOSAll bits off 1, 2, 3 01, 03 2 ppm/C Bipolar zero error 2/ BPZEMSB on, all others off 1 02 3 LSB 03

37、2 12 02 2 Bipolar zero temperature coefficient TCPZE MSB 0n, all others off 1, 2, 3 02, 03 10 ppm/C Reference input resistance RIN3/ 1 All 1.3 2.6 k Reference voltage range 4/ VREF3/ 1 All VEE+2 VCC-2 V Voltage output, UNI 5/ VOU3/ 1 01, 03 0 VCC-2 V Voltage output, BPI VOB3/ 1 02, 03 VCC-2 VEE+2 V

38、See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88719 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical

39、 performance characteristics - continued. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxOutput current IO3/ 1 All 5 mACurrent, short circuit ISC3/ All 40 mA Power supply current ILLVCC= +16.5 V, VEE= -16.5 V, VIH= +2.4 V, VIL= +0.

40、4 V 1 All 6 mA VCC= +16.5 V, VEE= -16.5 V, VIH= VLL, VIL= 0 V 1 ICCICC: All bits on 15 IEEIEE: All bits on 19 Gain matching error 6/ mAE1 01, 02 6 LSB 03 4 12 01, 02 4 Bipolar zero matching mBPZE1 02 3 LSB Error 7/ 03 2 12 02 2 Offset matching error 8/ mVOS1 01 2 LSB 03 1 12 01 1 Digital input high

41、voltage VIH1, 2, 3 All 2.0 V Digital input low voltage VIL1, 2, 3 All 0.8 V Digital inputs high current IIHVIN= VLL: Data inputs 1, 2, 3 All 10 A VIN= VLL: CS /DS0/DS1/ RST / RD /LS 10 VIN= VLL: MS / TR 9/ 10 VIN= VLL: QS0 / QS1/ QS2 9/ 10 Digital inputs low current IILVIN= DGND: Data inputs 1, 2, 3

42、 All 10 A VIN= DGND: CS /DS0/DS1/ RST / RD /LS 10 VIN= DGND: MS / TR 9/ -10 VIN= DGND: QS0 / QS1/ QS2 9/ 10 See footnotes at end of table.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88719 DEFENSE SUPPLY C

43、ENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxDigital out low voltage VOL1, 2, 3

44、All +0.4 V Digital out high voltage VOH1, 2, 3 All +2.4 V Power supply gain PSGS 11.4 V VCC 16.5 V 1 All 5 ppm/% sensitivity -16.5 V VEE -11.4 V 4.5 V VLL 5.5 V CS pulse width tCWData input mode 10/ 9 All 80 ns (figure 4 diagram A and B) 10, 11 100 Data setup tDSData input mode 10/ 9, 10, 11 All 0 n

45、s Data hold tDH(figure 4 diagram A) 9, 10, 11 15 Address setup tAS9, 10, 11 0 Address hold tAH9, 10, 11 15 LS setup tLS9, 10, 11 0 LS hold tLH9, 10, 11 15 Data setup tDSData input mode 10/ 9, 10, 11 All 0 ns Data hold tDH(figure 4 diagram C) 9, 10, 11 0 LS width tLW9 60 10, 11 80 LS setup tLS11/ 9,

46、10, 11 0 CS hold tCH9 30 10, 11 50 Address setup tAS9, 10, 11 0 Address hold tAH9, 10, 11 0 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88719 DEFENSE SUPPLY CENTER COLUMBUS

47、COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxMS setup tMSMode select 10/ 9, 10, 11 All 0 ns Add

48、ress setup tLS11/ (figure 4 diagram D) 9, 10, 11 0 Data setup tDS9, 10, 11 0 LS width tLW9 60 10, 11 70 CS hold tCH9 70 10, 11 80 Data hold tDH9, 10, 11 0 MS hold tMH9, 10, 11 0 Mode select tMSMode select 10/ 9, 10, 11 All 0 ns MS hold tMH(figure 4 diagram E) 9, 10, 11 15 LS setup tLS11/ 9, 10, 11 0 Data setup tDS9, 10, 11 0 CS width tW9 80 10, 11 100 LS hold tLH9, 10, 11 15 Data hold tDH9, 10, 11 15 Reset width Asynchronous mode 10/ 9 80 ns (figure 4 diagram F) 10, 11 100 Functional tests FT See paragraph 4.4.1b 7, 8 All

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