1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R232-93 93-09-21 Michael A. Frye B Drawing updated to reflect current requirements. Removed programming logic from truth table B. Editorial changes throughout. - gap 00-11-02 Raymond Monnin C 5 year review and
2、update. Changed input capacitance from 6 pF to 10 pF. ksr 06-06-12 Raymond Monnin THE FRONT PAGE OF THIS DRAWING HAS BEEN REPLACED REV SHET REV SHET REV STATUS REV C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Steve Duncan DEFENSE SUPPLY CENTER COLUMBUS STANDARD
3、MICROCIRCUIT DRAWING CHECKED BY Ray Monnin COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 89-04-26 MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 2K X 8-BIT, ONE T
4、IME PROGRAMMABLE (OTP) PROM, MONOLITHIC SILICON AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-88734 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E481-06 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88
5、734 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identify
6、ing Number (PIN). The complete PIN is as shown in the following example: 5962-88734 01 J A Drawing number Device type Case outline Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit fun
7、ction Access time 01 7C291 2K X 8-bit PROM 55 ns 02 7C291 2K X 8-bit PROM 45 ns 03 7C291 2K X 8-bit PROM 35 ns 04 7C291 2K X 8-bit PROM 25 ns 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style J G
8、DIP1-T24 or CDIP2-T24 24 Dual-in-line package K GDFP2-F24 or CDFP3-F24 24 Flat package L GDIP3-T24 or CDIP4-T24 24 Dual-in-line package 3 CQCC1-N28 28 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply vo
9、ltage (VCC) . +4.5 V dc to +5.5 V dc Storage temperature range -65C to +150C Voltage on any pin with respect to ground . -0.6 V dc to +7.0 V dc VPPwith respect to ground -0.6 V dc to +13.0 V dc Power dissipation (PD) 550 mW 1/ Lead temperature (soldering, 10 seconds) +300C Thermal resistance, juncti
10、on-to-case (JC) . See MIL-STD-1835 1.4 Recommended operating conditions. Case operating temperature range (TC) . -55C to +125C 1/ Must withstand the added PDdue to short-circuit test; e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDAR
11、D MICROCIRCUIT DRAWING SIZE A 5962-88734 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this d
12、rawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD
13、-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at ht
14、tp:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the
15、text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JA
16、N class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accorda
17、nce with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the de
18、vice. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions sh
19、all be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.2 Truth tables. The truth tables shall be as specified on figure 2. 3.2.2.1 Unprogrammed or erased devices. The truth table for unprogrammed device
20、s for contracts involving no altered item drawing shall be as specified on figure 2 as applicable. When required in groups A, B, or C inspection (see 4.3), the devices shall be programmed by the manufacturer prior to test in a checkerboard pattern or equivalent (a minimum of 50 percent of the total
21、number of bits programmed) or to any altered item drawing pattern which includes at least 25 percent of the total number of bits programmed. 3.2.2.2 Programmed devices. The truth tables for programmed devices shall be as specified by an attached altered item drawing. 3.2.3 Case outlines. The case ou
22、tlines shall be in accordance with 1.2.2 herein. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. Provided by IHSNot for ResaleNo repro
23、duction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88734 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3.4 Electrical test requirements. The electrical test requirements shall be the subgrou
24、ps specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where
25、 marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appen
26、dix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Processing options. Since the PROM is an unprogrammed memory capable of being programmed by either the manufacturer or the u
27、ser to result in a wide variety of PROM configurations, two processing options are provided for selection in the contract using an altered item drawing. 3.6.1 Unprogrammed PROM delivered to the user. All testing shall be verified through group A testing as defined in 4.3.1. It is recommended that us
28、ers perform subgroups 7 and 9 after programming to verify the specific program configuration. 3.6.2 Manufacturer-programmed PROM delivered to the user. All testing requirements and quality assurance provisions herein, including the requirements of the altered item drawing shall be satisfied by the m
29、anufacturer prior to delivery. 3.7 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved s
30、ource of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.8 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivere
31、d to this drawing. 3.9 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.10 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required docu
32、mentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of
33、MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition C, D, or E. The test circuit shall be maintained by the manufacturer under document revision leve
34、l control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and f
35、inal electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIR
36、CUIT DRAWING SIZE A 5962-88734 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC+125C 4.5 V dc VCC= 5.5 V dc Group A subgroups Device types Limits Unit unless otherwi
37、se specified Min Max Input low voltage VILVCC= 4.5 V and 5.5 V 1, 2, 3 All -0.5 1/ 0.8 V Input high voltage VIHVCC= 4.5 V and 5.5 V 1, 2, 3 All 2.0 VCC +0.5 1/ V Output low voltage 2/ VOLIOL= 16 mA, VCC= 4.5 V VIL= 0.8 V, VIH= 2.0 V 1, 2, 3 All 0.45 V Output high voltage 2/ VOHIOH= -4 mA, VCC= 4.5 V
38、 VIL= 0.8 V, VIH= 2.0 V 1, 2, 3 All 2.4 V Output short circuit Current 1/ IOSVCC= 5.5 V, VOUT= GND 1, 2, 3 All -200 mA Input load current 3/ ILIVIN= 5.5 V and GND 1, 2, 3 All 10 A Output leakage ILOVOUT= 5.5 V and GND 1, 2, 3 All 10 A Operating active current 4/ ICCCS1= VIL, VCC= 5.5 V 00to 07= 0 mA
39、 CS2= CS3= VIHf = 1/tACC1, 2, 3 All 120 mA Input capacitance CINVIN= 0 V, f = 1 MHz, TC= +25C, see 4.3.1c 4 All 10 pF Output capacitance COUTVOUT= 0 V, f = 1 MHz, TC= +25C, see 4.3.1c 4 All 12 pF Address to output delay tACCCS1= VIL9, 10, 11 01 55 ns 5/ CS2= CS3= VIH02 45 03 35 04 25 See footnotes a
40、t end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88734 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance ch
41、aracteristics Continued. Test Symbol Conditions -55C TC+125C 4.5 V dc VCC= 5.5 V dc Group A subgroups Device types Limits Unit unless otherwise specified Min Max All chip selects to tCSEither CS1 , CS2, or CS39, 10, 11 01 30 ns output delay 4/, 5/ 6/ 02, 03 25 04 20 All chip selects high to output f
42、loat 1/, 5/ tDFEither CS1 , CS2, or CS36/ 9, 10, 11 01, 02, 03 25 ns 04 20 Address to output hold tOHCS1= VIL9, 10, 11 All 0 ns 1/, 5/ CS2= CS3= VIH1/ May not be tested, but shall be guaranteed to the limits specified in table I. 2/ These are absolute voltages with respect to device ground pin and i
43、nclude all over shoots due to system and/or tester noise. Do not attempt to test these values without suitable equipment. 3/ Output shall be loaded in accordance with figure 4. 4/ The addresses, (A0 A10pins), are toggling between VILand VIH. 5/ See figures 3 and 4. 6/ Worst case of output control si
44、gnal lines CS1 , CS2, or CS3. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88734 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 Device types 01 thro
45、ugh 04 Case outlines J, K, L 3 Terminal number Terminal symbol 1 A7NC 2 A6A73 A5 64 A4A55 A3 46 A2A37 A1 28 A0A19 00 010 01NC 11 020012 GND 0113 030214 04GND 15 05NC 16 060317 07 418 CS30519 CS2 620 CS1/VPP07 21 A10NC 22 A9CS323 A8CS224 VCCCS1/VPP25 - A1026 - A927 - A828 - VCCFIGURE 1. Terminal conn
46、ections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88734 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 Truth table A CS1/VPPCS2 CS3 I/0 pins Pro
47、grams VPPC C Data in Read VILVIHVIHData out Deselect VIHX X High - Z Deselect X VILX High - Z Deselect X X VILHigh - Z Truth table B Pin functions Mode CS3CS2CS1Outputs Read VIHVIHVILData out Output disable 1/ X X VIHHigh - Z Output disable 1/ X VILX High - Z Output disable 1/ VILX X High - Z NOTES:
48、 1. X = Dont care but not to exceed VCCplus 5%. FIGURE 2. Truth tables. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88734 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 FIGURE 3. AC read timing diagram. High impedance test systems only. tDFis tested with CL= 5 pF. FIG
