DLA SMD-5962-89540 REV C-2007 MICROCIRCUIT MEMORY DIGITAL CMOS 2K X 8 PROM MONOLITHIC SILICON《硅单片2K X 8可编程序只读存储器互补型金属氧化物半导体数字存储微电路》.pdf

上传人:outsidejudge265 文档编号:699463 上传时间:2019-01-01 格式:PDF 页数:14 大小:91.22KB
下载 相关 举报
DLA SMD-5962-89540 REV C-2007 MICROCIRCUIT MEMORY DIGITAL CMOS 2K X 8 PROM MONOLITHIC SILICON《硅单片2K X 8可编程序只读存储器互补型金属氧化物半导体数字存储微电路》.pdf_第1页
第1页 / 共14页
DLA SMD-5962-89540 REV C-2007 MICROCIRCUIT MEMORY DIGITAL CMOS 2K X 8 PROM MONOLITHIC SILICON《硅单片2K X 8可编程序只读存储器互补型金属氧化物半导体数字存储微电路》.pdf_第2页
第2页 / 共14页
DLA SMD-5962-89540 REV C-2007 MICROCIRCUIT MEMORY DIGITAL CMOS 2K X 8 PROM MONOLITHIC SILICON《硅单片2K X 8可编程序只读存储器互补型金属氧化物半导体数字存储微电路》.pdf_第3页
第3页 / 共14页
DLA SMD-5962-89540 REV C-2007 MICROCIRCUIT MEMORY DIGITAL CMOS 2K X 8 PROM MONOLITHIC SILICON《硅单片2K X 8可编程序只读存储器互补型金属氧化物半导体数字存储微电路》.pdf_第4页
第4页 / 共14页
DLA SMD-5962-89540 REV C-2007 MICROCIRCUIT MEMORY DIGITAL CMOS 2K X 8 PROM MONOLITHIC SILICON《硅单片2K X 8可编程序只读存储器互补型金属氧化物半导体数字存储微电路》.pdf_第5页
第5页 / 共14页
点击查看更多>>
资源描述

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R238-92 92-07-13 Michael A. Frye B Removed vendor CAGE 34371 as source of supply for device 01JA and 02LA. Drawing updated to reflect current requirements. Editorial changes throughout. -gap 00-10-10 Ray Monnin

2、 C Boilerplate update and part of five year review. tcr 07-02-27 Robert M. Heber THE FRONT PAGE OF THIS DRAWING HAS BEEN REPLACED REV SHET REV SHET REV STATUS REV C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY Kenneth S. Rice DEFENSE SUPPLY CENTER COLUMB

3、US STANDARD MICROCIRCUIT DRAWING CHECKED BY Ray Monnin COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 2K X 8 PROM, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAW

4、ING APPROVAL DATE 89-01-19 AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-89540 SHEET 1 OF 13 DSCC FORM 2233 APR 97 5962-E272-07 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89540 DEFENSE SUPPLY CE

5、NTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The

6、 complete PIN is as shown in the following example: 5962-89540 01 J A Drawing number Device type Case outline Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function Access time 01

7、6617 2K X 8 CMOS PROM 140 ns 02 6617B 2K X 8 CMOS PROM 105 ns 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style J GDIP1-T24 or CDIP2-T24 24 Dual-in-line package L GDIP3-T24 or CDIP4-T24 24 Dual-i

8、n-line package X CQCC1-N32 32 Rectangular leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage to ground potential . -0.3 V dc to +7.0 V dc DC voltage applied to outputs -0.3 V dc to VCC+0.3 V dc DC input

9、voltage. -0.3 V dc to VCC+0.3 V dc Storage temperature range -65C to +150C Maximum power dissipation (PD) 1.0 W Lead temperature (soldering, 10 seconds) +275C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ). +150C 1/ 1.4 Recommended operating conditions. Supply

10、 voltage range (VCC) . 4.5 V dc to 5.5 V dc High level input voltage range (VIH) +2.4 V dc to VCC+0.3 V dc Low level input voltage range (VIL) . -0.3 V dc to +0.8 V dc Case operating temperature range (TC) . -55C to +125C 1/ Maximum junction temperature may be increased to +175C during burn-in and s

11、teady-state life. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89540 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Gove

12、rnment specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICA

13、TION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard

14、Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)

15、 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMEN

16、TS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or

17、 a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) pl

18、an may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML f

19、low option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.2 Truth table. The truth

20、 table shall be as specified on figure 2. 3.2.2.1 Unprogrammed devices. The truth table for unprogrammed devices for contracts involving no altered item drawing shall be as specified on figure 2. When required in groups A, B, or C inspection (see 4.3), the devices shall be programmed by the manufact

21、urer prior to test in a checkerboard pattern (a minimum of 50 percent of the total number of bits programmed) or to any altered item drawing pattern which includes at least 25 percent of the total number of bits programmed. 3.2.2.2 Programmed devices. The requirements for supplying programmed device

22、s are not part of this drawing. 3.2.3 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89540 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS,

23、OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test req

24、uirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In additi

25、on, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on

26、 all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Processing options. Since the device is capable of being pro

27、grammed by either the manufacturer or the user to result in a wide variety of configurations, two processing options are provided for selection in the contract. 3.6.1 Unprogrammed device delivered to the user. All testing shall be verified through group A testing as defined in 4.3.1. It is recommend

28、ed that users perform subgroups 7 and 9 after programming to verify the specific program configuration. 3.6.2 Manufacturer-programmed device delivered to the user. All testing requirements and quality assurance provisions herein, including the requirements of the altered item drawing shall be satisf

29、ied by the manufacturer prior to delivery. 3.7 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as a

30、n approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.8 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircu

31、its delivered to this drawing. 3.9 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.10 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable r

32、equired documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89540 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO

33、 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC+125C VCC= 4.5 V to 5.5 V Group A subgroups Device types Limits Unit unless otherwise specified 1/ Min Max Output high voltage VOHVCC= 4.5 V, IOH= -2.0 mA 1, 2, 3

34、 All 2.4 V Output low voltage VOLVCC= 4.5 V, IOL= 4.8 mA 1, 2, 3 All 0.4 V Input leakage current (except P input) IIVCC= 5.5 V, 0 V VIN 5.5 V 1, 2, 3 All -1.0 1.0 A Output leakage current, high impedance IOZVCC= 5.5 V, G = 5.5 V GND VI/O VCC1, 2, 3 All -1.0 1.0 A Operating supply current ICCVCC= 5.5

35、 V, G = 0 V IOUT= 0 mA, f = 1.0 MHz 0 V VIN 5.5 V 1, 2, 3 All 20 mA Standby supply current ISBVCC= 5.5 V, IOUT= 0 mA, 0 V VIN 5.5 V 1, 2, 3 All 100 A Input capacitance CINVCC= open, f = 1.0 MHz, Case J 4 All 10 pF TA= 25C, See 4.3.1c Case L 12 All measurements are referenced to device ground Case X

36、10 Output capacitance COUTVCC= open, f = 1.0 MHz, Case J 4 All 12 pF TA= 25C, See 4.3.1c Case L 14 All measurements are referenced to device ground Case X 12 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICR

37、OCIRCUIT DRAWING SIZE A 5962-89540 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TC+125C VCC= 4.5 V to 5.5 V Group A subgroups Device types Limits Unit unl

38、ess otherwise specified 1/ Min Max Address access time tAVQVSee figures 3 and 4 2/ 9, 10, 11 01 140 ns 02 105 Output enable access tGLQV9, 10, 11 01 50 ns time 02 40 Chip enable access tELQV9, 10, 11 01 120 ns time 02 90 Address setup time tAVEL9, 10, 11 01 20 ns 02 15 Address hold time tELAX9, 10,

39、11 01 25 ns 02 20 Chip enable low pulse tELEH9, 10, 11 01 120 ns width 02 95 Chip enable high pulse tEHEL9, 10, 11 All 40 ns width Read cycle time tELEL9, 10, 11 01 160 ns 02 136 Output enable time tGLQX9, 10, 11 All 5.0 ns 3/ Chip enable time tELQX9, 10, 11 All 5.0 ns / Output disable time tGHQZ9,

40、10, 11 All 50 ns 3/ Chip disable time tEHQZ9, 10, 11 All 50 ns / Output high voltage, VOH2VCC= 4.5 V, IOUT= -100 A 1, 2, 3 All VCC -1.0 V high impedance state 3/ 1/ All measurements are performed with P hardwired to VCC. 2/ Test conditions assume signal transition times of 5.0 ns or less. Timing is

41、referenced at input and output levels of 1.5 V and input pulse levels of 0 to 3.0 V. Output loading is equivalent to the specified IOL /IOHwith a load capacitance of 50 pF. 3/ If not tested, shall be guaranteed to limits specified in table I. Provided by IHSNot for ResaleNo reproduction or networkin

42、g permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89540 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 Device types All Case outlines J and L X Terminal number Terminal symbol 1 A7NC 2 A6NC 3 A5NC 4 A4A75 A3 66

43、 A2A57 A1 48 A0A39 Q0 210 Q1A111 Q2 012 GND NC 13 Q3Q014 Q4 115 Q5Q216 Q6GND 17 Q7NC 18 E Q319 A10Q420 G Q521 P Q622 A9Q723 A8E 24 VCCA1025 - G 26 - P 27 - NC 28 - A929 - A830 - NC 31 - NC 32 - VCCProgram pin P is required to be hardwired to GND except for programming. FIGURE 1. Terminal connections

44、. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89540 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 Inputs Outputs E G A Q Function H H X Z Memory d

45、isabled _ H V Z Cycle begins-addresses are latched L L X X Output enabled L L X V Output valid _/ L X V Output latched H H X Z Read accomplished and output disabled H H X Z Prepare for next cycle _ H X Z Cycle ends, next cycle begins Program pin P is required to be hardwired to GND except for progra

46、mming. H = Logic high voltage level L = Logic low voltage level Z = High impedance state X = Dont care _ = High-to-low transition _/ = Low-to-high transition V = Valid FIGURE 2. Truth table (unprogrammed). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-

47、,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89540 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 NOTE: CL= Load capacitance and includes scope and jig capacitance. FIGURE 3. Output load circuit or equivalent. Provided by IHSNot for ResaleNo

48、reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89540 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 10 DSCC FORM 2234 APR 97 FIGURE 4. Read cycle waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-

展开阅读全文
相关资源
猜你喜欢
相关搜索

当前位置:首页 > 标准规范 > 国际标准 > 其他

copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
备案/许可证编号:苏ICP备17064731号-1