1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Make corrections to figure 4 jak. 00-10-24 Thomas M. Hess B Make change to footnote 9/ in table I. Add vendor CAGE F8859. Add case outline X. Add device type 02. Add table III, delta limits. Update drawing to MIL-PRF-38535 requirements. - jak 03-
2、02-12 Thomas M. Hess C Add section 1.5, radiation features. Update the boilerplate to include radiation hardness assured requirements. Editorial changes throughout. - jak 04-02-25 Thomas M. Hess D Update radiation features in section 1.5. Add SEP test table IB and paragraph 4.4.4.2. jak 11-04-08 Dav
3、id J.Corbett REV SHEET REV D D SHEET 15 16 REV STATUS REV D D D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Joseph A. Kerby DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Thanh V. Nguyen
4、THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, ADVANCED CMOS, QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE WITH TTL DRAWING APPROVAL DATE 96-03-07 COMPATIBLE INPUTS, MONOLITHIC SILICON REVISION LEVEL D SIZE
5、A CAGE CODE 67268 5962-90687 AMSC N/A SHEET 1 OF 15 DSCC FORM 2233 APR 97 5962-E152-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZEA 5962-90687 REVISION LEVEL D SHE
6、ET2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifyi
7、ng Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 F 90687 01 V X A Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (se
8、e 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendi
9、x A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ACT86 Quadruple 2-input exclusive-OR gate with TTL c
10、ompatible inputs. 02 54ACT86 Quadruple 2-input exclusive-OR gate with TTL compatible inputs. 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as listed below. Since the device class designator has been added after the original issu
11、ance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the device. Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance w
12、ith MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line D GDFP1-F14 or CDF
13、P2-F14 14 Flat pack X CDFP3-F14 14 Flat pack2 CQCC1-N20 20 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted
14、 without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZEA 5962-90687 REVISION LEVEL D SHEET3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc t
15、o VCC + 0.5 V dc 4/ DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc 4/ Input clamp current (IIK) (VINVCC) . 20 mA Output clamp current (IOK) (VOUTVCC) 20 mA Continuous output current (IOUT) (VOUT 0.0 V to VCC) 50 mA Continuous current through VCCor GND . 200 mA Maximum power dissipation
16、(PD) 500 mW Storage temperature range (TSTG) . -65C to +150C Lead temperature (soldering, 10 seconds): device type 01 +300C device type 02 +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) . +175C 1.4 Recommended operating conditions. 2/ 3/ Supply voltage r
17、ange (VCC) +4.5 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VCCOutput voltage range (VOUT) . +0.0 V dc to VCCMinimum high level input voltage (VIH) . +2.0 V Maximum low level input voltage (VIL) +0.8 V Maximum high level output current (IOH) -24 mA Maximum low level output current (IOL)
18、 +24 mA Input transition rise or fall rate (t/V) 0 to 8 ns Case operating temperature range (TC) . -55C to +125C 1.5 Radiation features. Device type 02: Maximum total dose available (dose rate = 50 300 rads(Si)/s) . 300 krads (Si) effective LET, no SEL (see 4.4.4.2) . 93 MeV-cm2/mg 5/ effective LET,
19、 no SEU (see 4.4.4.2) 93 MeV-cm2/mg 5/ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ The limits for the
20、 parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. 4/ The input and output negative voltage ratings may be exceeded provided that the input and output clamp current ratings are observed. 5/ These limits were obtained during technolo
21、gy characterization and qualification, and are guaranteed by design or process, but not production tested unless specified by the customer through the purchase order or contract. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT D
22、RAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZEA 5962-90687 REVISION LEVEL D SHEET4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specif
23、ied herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits,
24、Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Stan
25、dard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a par
26、t of this document to the extent specified herein. Unless otherwise specified, the issues of the documents which are DOD adopted are those listed in the issue of the DODISS cited in the solicitation. Unless otherwise specified, the issues of documents not listed in the DODISS are the issues of the d
27、ocuments cited in the solicitation. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JESD-20 - Standard for Description of 54/74ACXXXX and 54/74ACTXXXX Advanced High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Associ
28、ation, 3103 North 10th Street, Suite 240S, Arlington, VA 22201.) ASTM INTERNATIONAL (ASTM) ASTM F1192- Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices. (Copies of this document is available online at http:/www.astm.org/ or
29、from ASTM International, P. O. Box C700, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959). (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents may also be available in or through libraries or
30、 other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption h
31、as been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not af
32、fect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without licen
33、se from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZEA 5962-90687 REVISION LEVEL D SHEET5 DSCC FORM 2234 APR 97 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and
34、 herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table s
35、hall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.2.6 Radiation exposure circuit. The radiation exposure circuit shall b
36、e maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance chara
37、cteristics and postirradiation parameter limits are as specified in table IA and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are de
38、fined in table IA. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “596
39、2-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The cer
40、tification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required fr
41、om a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificat
42、e of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535
43、, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for
44、device class M. For device class M, notification to DLA Land and Maritime-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change as defined in MIL-PRF-38535, appendix A. 3.9 Verification and review for device class M. For device class M, DLA La
45、nd and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device
46、class M. Device class M devices covered by this drawing shall be in microcircuit group number 36 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218
47、-3990 SIZEA 5962-90687 REVISION LEVEL D SHEET6 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics. Test and MIL-STD-883 test method 1/ Symbol Test conditions 2/ 3/ -55C TC +125C +4.5 V VCC +5.5 V Unless otherwise specified Device type and 4/ Device class VCCGroup A subgroups Limi
48、ts 5/ Unit Min Max Positive input clamp voltage 3022 VIC+For input under test, IIN= 1.0 mA All Q, V 0.0 V 1 0.4 1.5 V Negative input clamp voltage 3022 VIC-For input under test, IIN= -1.0 mA All Q, V Open 1 -0.4 -1.5 V High level output voltage 3006 VOHFor all inputs affecting output under test, VIN= VIH= 2.0 V or VIL= 0.8 V For all other inputs, VIN= VCCor GND IOH= -50 A All All 4.5 V 1, 2, 3 4.40 V 5.5 V 1, 2, 3 5.40 IOH= -24 mA 4.5 V 1 3.86 2, 3 3.70 5.5 V 1 4.86 2, 3 4.70 IOH= -50 mA 5/ 5.5 V 1, 2, 3 3.85 Low level output voltage 3006 VOLFor
