DLA SMD-5962-90780 REV C-2012 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL 10-BIT BUS INTERFACE FLIP-FLOPS WITH NON-INVERTING AND INVERTING INPUTS MONOLITHIC SILICON.pdf
《DLA SMD-5962-90780 REV C-2012 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL 10-BIT BUS INTERFACE FLIP-FLOPS WITH NON-INVERTING AND INVERTING INPUTS MONOLITHIC SILICON.pdf》由会员分享,可在线阅读,更多相关《DLA SMD-5962-90780 REV C-2012 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL 10-BIT BUS INTERFACE FLIP-FLOPS WITH NON-INVERTING AND INVERTING INPUTS MONOLITHIC SILICON.pdf(14页珍藏版)》请在麦多课文档分享上搜索。
1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R010-96. -ltg 95-12-04 Monica L. Poelking B Update to reflect latest changes in format and requirements. Editorial changes throughout. -les 04-09-07 Raymond Monnin C Update drawing as part of 5 year review. jt
2、12-10-15 C. SAFFLE THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. REV SHEET REV SHEET REV STATUS REV C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY Larry T. Gauder DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.
3、mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY Tim H. Noh APPROVED BY William K. Heckman MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED SCHOTTKY, TTL, 10-BIT BUS INTERFACE FLIP-FLOPS WITH NON-INVERTING AND INVERTI
4、NG INPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 91-02-06 AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-90780 SHEET 1 OF 13 DSCC FORM 2233 APR 97 5962-E465-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SI
5、ZE A 5962-90780 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of cas
6、e outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 90780 01 M L A Federal stock class design
7、ator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropri
8、ate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type. The device type identify the circuit function as follows: Device type Generic nu
9、mber Circuit function 01 54AS821A 10-bit bus interface flip-flops with non-inverting inputs and three-state outputs 02 54AS822 10-bit bus interface flip-flops with inverting inputs and three-state outputs 03 54AS825A 8-bit bus interface flip-flops with non-inverting inputs and three-state outputs 04
10、 54AS826 8-bit bus interface flip-flops with inverting inputs and three-state outputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the re
11、quirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designato
12、r Terminals Package style L GDIP3-T24 or CDIP4-T24 24 dual-in-line K GDFP2-F24 or CDFP3-F24 24 flat 3 CQCC1-N28 28 square chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot fo
13、r ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90780 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage (VCC) -0.5 V dc to +7.0 V dc DC
14、input voltage . -1.2 V dc at 18 mA to +7.0 V dc Voltage applied to a disabled 3-state output . +5.5 V dc Storage temperature range -65C to +150C Continuous power dissipation (PD) 621.5 mW 2/ Lead temperature (soldering, 10 seconds) +300C Junction temperature (TJ) +175C Thermal resistance, junction-t
15、o-case (JC) . See MIL-STD-1835 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Minimum high level input voltage (VIH): . 2.0 V dc Maximum low level input voltage (VIL): 01, 02, 04 0.8 V dc 03 . 0.7 V dc Maximum high level output current (IOH) -24 mA Maximum lo
16、w level output current (IOL) +32 mA Case operating temperature range (TC) . -55C to +125C Minimum setup time, (ts) before CLK : from data, 01, 02 7 ns from CLR inactive, 03, 04 8 ns from data, 03, 04 7 ns from CLKEN high or low: 03 10.5 ns 04 7 ns Minimum hold time, (th) CLKEN or data, after CLK 0 n
17、s Minimum pulse duration, (tw): CLK high or low: 01, 02, 04 9 ns 03 9.5 ns CLR low: 03 7 ns 04 5 ns 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless
18、 otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the de
19、vice. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Continuous power dissipation is defined as VCCX ICC, and must withstand the added PDdue to short circuit test e.g., IOSProvided by IHSNot for ResaleNo reproduction or networking permitted without licens
20、e from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90780 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case
21、Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, B
22、uilding 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific e
23、xemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 as specified herein, or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall
24、 not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction
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