DLA SMD-5962-91610 REV C-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS 9-BIT D FLIP-FLOP POSITIVE EDGE TRIGGERED WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf
《DLA SMD-5962-91610 REV C-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS 9-BIT D FLIP-FLOP POSITIVE EDGE TRIGGERED WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf》由会员分享,可在线阅读,更多相关《DLA SMD-5962-91610 REV C-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS 9-BIT D FLIP-FLOP POSITIVE EDGE TRIGGERED WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf(16页珍藏版)》请在麦多课文档分享上搜索。
1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Correct title to accurately describe device function. Add vendor CAGE 0C7V7. Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. LTG 06-08-01 Thomas M. Hess B Correct footnote 4 in table I. - LTG 07-01-24 Thomas M. Hes
2、s C Update source of supply information cage 0C7V7. Update the boilerplate paragraphs to current requirements as specified in MIL-PRF-38535. jwc 13-08-06 Thomas M. Hess REV SHEET REV C SHEET 15 REV STATUS REV C C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPA
3、RED BY Marcia B. Kelleher DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Thomas J. Riccuiti THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, ADVANCED CMOS, 9-BIT D FLIP-
4、FLOP, POSITIVE EDGE TRIGGERED, WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 91-11-01 AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-91610 SHEET 1 OF 15 DSCC FORM 2233 APR 97 5962-E438-13 Provided by IHSNot
5、for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91610 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels
6、consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in t
7、he PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 91610 01 M K A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device
8、classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-
9、RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ACT823 9-bit D flip-flop, positive edge triggered, with three-state outputs, TTL compatible inputs 1.2.3 Device class designator. The device class designato
10、r is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and
11、 qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style K GDFP2-F24 or CDFP3-F24 24 Flat pack L GDIP3-T24 or CDIP4-T24 24 Dual-in-line 3 CQCC1-N28 28 Square leadless chi
12、p carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91610
13、DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range (VCC) -0.5 V dc to +6.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+ 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc Cla
14、mp diode current (IIK, IOK) 20 mA DC output current (IOUT) (per output pin) 50 mA DC VCCor GND current (ICC, IGND) (per output pin) 50 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) . 500 mW Lead temperature (soldering 10 seconds) . +300C Thermal resistance, junct
15、ion-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ). +175C 3/ 1.4 Recommended operating conditions. 2/ 4/ Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VCCOutput voltage range (VOUT) . +0.0 V dc to VCCCase operating temperature range (TC) . -55C t
16、o +125C Input rise or fall times: VCC= 4.5 V to 5.5 V . 0 to 8 ns/V Minimum setup time, Dn to CP (ts1): TC= +25C, VCC= 4.5 V . 3.5 ns TC= -55C, +125C, VCC= 4.5 V . 4.0 ns Minimum setup time, EN to CP (ts2): TC= +25C, VCC= 4.5 V . 3.5 ns TC= -55C, +125C, VCC= 4.5 V . 4.0 ns Minimum hold time, Dn to C
17、P (th1): TC= +25C, VCC= 4.5 V . 2.5 ns TC= -55C, +125C, VCC= 4.5 V . 3.0 ns Minimum hold time, EN to CP (th2): TC= +25C, VCC= 4.5 V . 2.5 ns TC= -55C, +125C, VCC= 4.5 V . 3.0 ns Minimum CP pulse width, high, low (tw1): TC= +25C, VCC= 4.5 V . 5.0 ns TC= -55C, +125C, VCC= 4.5 V . 6.0 ns Minimum CLR pu
18、lse width (tw2): TC= +25C, VCC= 4.5 V . 6.0 ns TC= -55C, +125C, VCC= 4.5 V . 7.0 ns Minimum recovery time, CLR to CP (trec): TC= +25C, VCC= 4.5 V . 4.0 ns TC= -55C, +125C, VCC= 4.5 V . 4.5 ns Maximum clock frequency (fMAX): TC= +25C, VCC= 4.5 V 95 MHz TC= -55C, +125C, VCC= 4.5 V 95 MHz 1/ Stresses a
19、bove the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to GND. 3/ Maximum junction temperature shall not be exceeded except for allo
20、wable short duration burn-in screening conditions per method 5004 of MIL-STD-883. 4/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. Provided by IHSNot for ResaleNo reproduction or networking permitted without l
21、icense from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91610 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks for
22、m a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE
23、 STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are avai
24、lable online at http:/quicksearch.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing tak
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