1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Boilerplate update, part of 5 year review. ksr 07-03-13 Robert M. Heber REV SHET REV SHET REV STATUS REV A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Rajesh Pithadia DEFENSE SUPPLY CENTER COLUMBUS STANDARD MI
2、CROCIRCUIT DRAWING CHECKED BY Kenneth Rice COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL APPROVED BY Michael Frye DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 93-11-19 MICROCIRCUIT, MEMORY, DIGITAL, CMOS, FIELD PROGRAMMABLE G
3、ATE ARRAY, 4000 GATES, MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-93221 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E212-07 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93221 DEF
4、ENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines
5、 and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 93221 01 M X C Federal RHA Device Device Case Lead
6、 stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA d
7、esignator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic numbe
8、 Circuit function Bin Speed 01 1240A 4000 gate, field programmable gate array 160.4 ns 02 1240A-1 4000 gate, field programmable gate array 136.4 ns 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device re
9、quirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in
10、 MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X CMGA5 - PN 133 1/ Pin grid array 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings.
11、 2/ DC supply voltage range (VDD) - -0.5 V dc to +7.0 V dc Input voltage range (VI) - -0.5 V dc to VDD+ 0.5 V dc Output voltage range (VO) - -0.5 V dc to VDD+ 0.5 V dc Input clamp current (IIC) - 20 mA Output clamp current (IOC) - 20 mA Continuous output current (IO) - 25 mA Storage temperature rang
12、e (TSTG) - -65C to +150C Lead temperature (soldering, 10 seconds) - 300C Thermal resistance, junction-to-case (JC) : Case X - See MIL-STD-1835 Maximum junction temperature (TJ) - +175C 1/ 133 = actual number of pins used, not maximum listed in MIL-STD-1835. Provided by IHSNot for ResaleNo reproducti
13、on or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93221 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage (VDD)- +4.5 V dc to +5.5 V dc Case oper
14、ating temperature range (TC) - -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are
15、 those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Ca
16、se Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil from the Standardization Document
17、Order Desk, 700 Robins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation. AMERICAN SO
18、CIETY FOR TESTING AND MATERIALS (ASTM) ASTM Standard F1192-00 - Standard Guide for the Measurement of Single Event Phenomena from Heavy Ion Irradiation of Semiconductor Devices. (Applications for copies of ASTM publications should be addressed to: ASTM International, PO Box C700, 100 Barr Harbor Dri
19、ve, West Conshohocken, PA 19428-2959; http:/www.astm.org.) ELECTRONICS INDUSTRIES ASSOCIATION (EIA) JEDEC Standard EIA/JESD78 - IC Latch-Up Test. (Applications for copies should be addressed to the Electronics Industries Association, 2500 Wilson Boulevard, Arlington, VA 22201; http:/www.jedec.org.)
20、(Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the tex
21、t of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for devic
22、e classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device cl
23、ass M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93221 DEFENSE SUPPLY CENTER COLUMBUS COLU
24、MBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device cl
25、ass M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Unprogrammed devices. The truth table or test vectors for unprogrammed devices is not part of this drawing. When r
26、equired in screening (see 4.2 herein) or quality conformance inspection group A, B, C, D, or E (see 4.4 herein), the devices shall be programmed by the manufacturer prior to test. A minimum of 50 percent of the total number of logic modules shall be utilized or at least 25 percent of the total logic
27、 modules shall be utilized for any altered item drawing pattern. 3.2.4 Programmed devices. The truth table or test vectors for programmed devices shall be as specified by an attached altered item drawing. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwi
28、se specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in tabl
29、e IIA. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the
30、manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appen
31、dix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and
32、V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply
33、 in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M,
34、 the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawin
35、g. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSC
36、C, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices
37、 covered by this drawing shall be in microcircuit group number 42 (see MIL-PRF-38535, appendix A). 3.11 Processing options. Since the device is capable of being programmed by either the manufacturer or the user to result in a wide variety of configurations, two processing options are provided for se
38、lection in the contract. 3.11.1 Unprogrammed device delivered to the user. All testing shall be verified through group A testing as defined in 3.2.3 and table IIA. It is recommended that users perform subgroups 7 and 9 after programming to verify the specific program configuration. 3.11.2 Manufactur
39、er-programmed device delivered to the user. All testing requirements and quality assurance provisions herein, including the requirements of the altered item drawing, shall be satisfied by the manufacturer prior to delivery. Provided by IHSNot for ResaleNo reproduction or networking permitted without
40、 license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93221 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Limits Test Symbol Conditions -55CC TC +125C 4.5 V VDD 5.5 V 1/ unless otherw
41、ise specified Group A subgroups Device type Min Max Unit Output low voltage VOLtest one output at a time, VDD= 4.5 V, IOL= 6.0 mA 0.4 V Output high voltage VOHtest one output at a time, VDD= 4.5 V, IOL= -4.0 mA 3.7 V Input low voltage VIL0.8 Input high voltage VIH2.0 V Standby supply current IDDoutp
42、uts unloaded, VDD= 5.5 V, VIN= VDDor GND 25 mA Input leakage current IILVDD= 5.5 V, VIN= VDDor GND -10 10 A Output leakage current IOZVDD= 5.5 V, VOUT= VDDor GND 1, 2, 3 -10 10 A I/O terminal capacitance CI/Osee 4.4.1c, f = 1.0 MHz, VOUT= 0 V 4 20 pF Functional tests FT 2/ see 4.4.1e 7, 8A, 8B All 0
43、1 160.4 Binning circuit delay tPBLHtPBHLSee figure 2, VIL= 0 V, VIH= 3.0 V, VDD= 4.5 V, VOUT= 1.5 V 3/ 9, 10, 11 02 136.4 ns 1/ All tests shall be performed under the worst case condition unless otherwise specified. 2/ Devices are functionally tested using a serial scan test method. Data is shifted
44、into the SDI pin and the DCLK pin is used as a clock. The data is used to drive the inputs of the internal logic and I/O modules, allowing a complete functional test to be performed. The outputs of the module can be read by shifting out the output response or by monitoring the PRA, PRB or SDO pins.
45、These tests form a part of the manufacturers test tape and shall be maintained and available at the approved source(s) of supply upon request by DSCC or the OEM. 3/ Binning circuit delay is defined as the input-to-output delay of a special path called the “binning circuit“. The binning circuit consi
46、sts of one input buffer plus 12 combinatorial logic modules plus one output buffer. The logic modules are distributed along the left side of the device. These modules are configured as non-inverting buffers and are connected through programmed antifuses with typical capacitive loading. Provided by I
47、HSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93221 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 Case outline X Device Type All Device Type All Device Type All Device
