1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED E Added device type 06 for vendor cages 54230 and 88379. Added vendor cage 0EU86 for device types 01 through 06. Figure 1, changed case outline M to reflect package is available in either a single or dual cavity. -sld 99-05-14 K. A. Cottongim F Add
2、ed case outline 9. 00-04-06 Raymond Monnin G Added device types 07, 08, and 09 for vendor cage 0EU86. Made changes to table I to include the addition of device types 07, 08, and 09. Added a min limit to the table I for the ILI, and the ILOtests. Made changes to Figures 2, 3, 4, 5, 6, and 8. -sld 02-
3、01-31 Raymond Monnin H Added case outline Z. Updated paragraph 1.2.4, 1.3, figures 1, 2, and 8. -sld 02-06-04 Raymond Monnin J Added case outline B. Added note to paragraph 1.2.4. -sld 03-10-06 Raymond Monnin K Updated drawing paragraphs. -sld 12-04-16 Charles F. Saffle L Paragraph 1.2.4 Case outlin
4、e M: Correct case outline M package style from “single/dual” to “dual”. Paragraph 1.2.4 footnote 1/: Delete “(single cavity)” and “Case outline A can be used if longer leads are necessary”. Figure 1 case outline M: Correct figure 1 to reflect dual cavity quad flatpack only for case outline M. -gc 12
5、-08-16 Charles F. Saffle REV L L SHEET 35 36 REV L L L L L L L L L L L L L L L L L L L L SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 REV STATUS REV L L L L L L L L L L L L L L OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Gary Zahn DLA LAND AND MARITIME
6、COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil/ STANDARD MICROCIRCUIT DRAWING CHECKED BY Michael C. Jones THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A APPROVED BY Kendall A. Cottongim MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, 128K
7、x 32-BIT, ELECTRICALLY ERASABLE/PROGRAMMABLE READ ONLY MEMORY DRAWING APPROVAL DATE 94-08-02 REVISION LEVEL L SIZE A CAGE CODE 67268 5962-94585 SHEET 1 OF 36 DSCC FORM 2233 APR 97 5962-E441-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD
8、MICROCIRCUIT DRAWING SIZE A 5962-94585 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL L SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of case outlines and lead finishes
9、 which are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of radiation hardness assurance levels are reflected in the PIN. 1.2 PIN. The PIN shall be as shown in the following example: 5962 - 94585 01 H M X Federal RHA Device Device Case Lead stock class
10、 designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 Radiation hardness assurance (RHA) designator. RHA marked devices shall meet the MIL-PRF-38534 specified RHA levels and shall be marked with the appropriat
11、e RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function Access time 01 128K32-300 EEPROM, 128K x 32-bit 300 ns 02 128K32-250 EEPROM, 128K x 32-bit 250 ns 03 128K32-200 EEPR
12、OM, 128K x 32-bit 200 ns 04 128K32-150 EEPROM, 128K x 32-bit 150 ns 05 128K32-140 EEPROM, 128K x 32-bit 140 ns 06 128K32-120 EEPROM, 128K x 32-bit 120 ns 07 128K32-250 EEPROM, 128K x 32-bit 250 ns 08 128K32-200 EEPROM, 128K x 32-bit 200 ns 09 128K32-150 EEPROM, 128K x 32-bit 150 ns 1.2.3 Device clas
13、s designator. This device class designator shall be a single letter identifying the product assurance level. All levels are defined by the requirements of MIL-PRF-38534 and require QML Certification as well as qualification (Class H, K, and E) or QML Listing (Class G and D). The product assurance le
14、vels are as follows: Device class Device performance documentation K Highest reliability class available. This level is intended for use in space applications. H Standard military quality class level. This level is intended for use in applications where non-space high reliability devices are require
15、d. G Reduced testing version of the standard military quality class. This level uses the Class H screening and In-Process Inspections with a possible limited temperature range, manufacturer specified incoming flow, and the manufacturer guarantees (but may not test) periodic and conformance inspectio
16、ns (Group A, B, C and D). E Designates devices which are based upon one of the other classes (K, H, or G) with exception(s) taken to the requirements of that class. These exception(s) must be specified in the device acquisition document; therefore the acquisition document should be reviewed to ensur
17、e that the exception(s) taken will not adversely affect system performance. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94585 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL L SHEET 3 DSCC
18、FORM 2234 APR 97 D Manufacturer specified quality class. Quality level is defined by the manufacturers internal, QML certified flow. This product may have a limited temperature range. 1.2.4 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835 and as follows: Outline letter Des
19、criptive designator Terminals Package style B See figure 1 68 Ceramic, single cavity, quad flatpack M 1/ See figure 1 68 Ceramic, dual cavity, quad flatpack N See figure 1 68 Ceramic, single cavity, quad flatpack T See figure 1 66 Hex-in-line, single cavity, with standoffs U See figure 1 66 Hex-in-l
20、ine, single cavity, without standoffs X See figure 1 66 Hex-in-line, single cavity, with standoffs Y See figure 1 66 Hex-in-line, single cavity, without standoffs 4 See figure 1 66 1.075“, hex-in-line, single cavity, with standoffs 5 See figure 1 66 1.075“, hex-in-line, single cavity, with standoffs
21、 6 See figure 1 66 1.075“, hex-in-line, single cavity, with standoffs 9 1/ See figure 1 68 Ceramic, single cavity, quad flatpack Z See figure 1 68 Ceramic, dual cavity, quad flatpack 1.2.5 Lead finish. The lead finish shall be as specified in MIL-PRF-38534. 1.3 Absolute maximum ratings. 2/ Supply vo
22、ltage range (VCC) -0.6 V to +6.25 V Input voltage range -0.6 V to +6.25 V Power dissipation (PD) . 1.4 W Storage temperature range -65C to +150C Lead temperature (soldering, 10 seconds) +300C Thermal resistance junction-to-case (JC): Case outlines T, X, U, and Y 6.2C/W Case outline M and Z . 9.4C/W
23、Case outline N 3.1C/W Case outlines 4, 5, and 6 2.7C/W Case outline B and 9 1.79C/W Data retention 10 years minimum Endurance . 10,000 cycles minimum 3/ 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Input low voltage range (VIL) -0.5 V dc to +0.8 V dc Input
24、high voltage range (VIH): Device types 01 through 06 +2.0 V dc to VCC+ 0.3 V dc Device types 07 through 09 +2.2 V dc to VCC+ 0.3 V dc Output voltage, High minimum (VOH) . +2.4 V dc Output voltage, low maximum (VOL) . +0.45 V dc Case operating temperature range (TC) . -55C to +125C 1/ Due to the shor
25、t leads of case outline M and case outline 9, caution should be taken if the system application is to be used where extreme thermal transitions can occur. 2/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade perf
26、ormance and affect reliability. 3/ Device types 7 through 9 for page mode writes only. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94585 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL L SH
27、EET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in t
28、he solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATIONS MIL-PRF-38534 - Hybrid Microcircuits, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard for Electronic Component Case Outlines. DEPARTMENT OF
29、 DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphi
30、a, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtai
31、ned. 3. REQUIREMENTS 3.1 Item requirements. The individual item performance requirements for device classes D, E, G, H, and K shall be in accordance with MIL-PRF-38534. Compliance with MIL-PRF-38534 shall include the performance of all tests herein or as designated in the device manufacturers Qualit
32、y Management (QM) plan or as designated for the applicable device class. The manufacturer may eliminate, modify or optimize the tests and inspections herein, however the performance requirements as defined in MIL-PRF-38534 shall be met for the applicable device class. In addition, the modification i
33、n the QM plan shall not affect the form, fit, or function of the device for the applicable device class. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38534 and herein. 3.2.1 Case outline(s). The case outline(s)
34、shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 3. 3.2.4 Timing diagram(s). The timing diagram(s) shall be as specified on figures 4
35、, 5, 6, and 7. 3.2.5 Block diagram. The block diagram shall be as specified on figure 8. 3.2.5 Typical output test circuit. The typical output test circuit shall be as specified on figure 9. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance cha
36、racteristics are as specified in table I and shall apply over the full specified operating temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94585 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3
37、990 REVISION LEVEL L SHEET 5 DSCC FORM 2234 APR 97 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Programming procedure. The programming procedure shall be as specif
38、ied by manufacturer and shall be available on request. 3.6 Marking of device(s). Marking of device(s) shall be in accordance with MIL-PRF-38534. The device shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers vendor similar PIN may also be marked as listed in MIL-HDBK-10
39、3 and QML-38534. 3.7 Data. In addition to the general performance requirements of MIL-PRF-38534, the manufacturer of the device described herein shall maintain the electrical test data (variables format) from the initial quality conformance inspection group A lot sample, for each device type listed
40、herein. Also, the data should include a summary of all parameters manually tested, and for those which, if any, are guaranteed. This data shall be maintained under document revision level control by the manufacturer and be made available to the preparing activity (DLA Land and Maritime -VA) upon req
41、uest. 3.8 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to supply to this drawing. The certificate of compliance (original copy) submitted to DLA Land and Maritime -VA shall affirm that the manufacturers product meets the performance requiremen
42、ts of MIL-PRF-38534 and herein. 3.9 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38534 shall be provided with each lot of microcircuits delivered to this drawing. 3.10 Endurance. A reprogrammability test shall be completed as part of the vendors reliability monitor
43、s. This reprogrammability test shall be done for the initial characterization and after any design or process changes which may affect the reprogrammability of the device. The methods and procedures may be vendor specific, but shall guarantee the number of program/erase endurance cycles listed in se
44、ction 1.3 herein over the full specified operating temperature range. The vendors procedure shall be kept under document control and shall be made available upon request of the acquiring or preparing activity. 3.11 Data retention. A data retention stress test shall be completed as part of the vendor
45、s reliability monitors. This test shall be done for initial characterization and after any design or process change which may affect data retention. The methods and procedures may be vendor specific, but shall guarantee the number of years listed in section 1.3 herein over the full military temperat
46、ure range. The vendors procedure shall be kept under document control and shall be made available upon request of the acquiring or preparing activity. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94585 DLA
47、 LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL L SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ 2/ -55C TC +125C +4.5 V dc VCC +5.5 V dc unless otherwise specified Group A subgroups Device types Limits Unit Min Max DC parameters
48、Supply current ICCCS = VIL, OE = WE = VIH, I/O 0 through I/O 31 = open. Inputs = VCC = +5.5 V dc, A0 through A16 change at f = 5 MHz CMOS levels. 1,2,3 All 250 mA Standby current ISBCS = VCC, OE = VIH, I/O 0 through I/O 31 = open. Inputs = VCC = +5.5 V dc, A0 through A16 change at f = 5 MHz CMOS levels. 1,2,3 All 5 mA Input leakage current ILIVIN= VSSto VCC1,2,3 All -10 +10 A Input leakage (RES pin) IIL (RES)VIN= VSSto VCC1,2,3 7,8,9 -500 +500 A Output leakage current ILOCS = VIH, VOUT = VSS to VCC 1,2,3 All -10 +10 A Inpu
