DLA SMD-5962-94712 REV B-1996 MICROCIRCUIT MEMORY DIGITAL CMOS PROGRAMMABLE LOGIC CELL ARRAY MONOLITHIC SILICON《数字互补金属氧化物半导体可编程电池排列硅单片电路线型微电路》.pdf

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1、DEFENSE LOGISTICS AGENCY DEFENSE SUPPLY CENTER COLUMBUS 3990 BROAD STREET COLUMBUS, OH 43216-5000 IN REPLY REFER TO DSCC-VAS (Mr. K Rice/(DSN)850-0534/614-692-0534/ksr) OCT 29 1996 SUBJECT: Notice of Revision (NOR) 5962-ROO8-97 for Standard Microcircuit Drawing (SMD) 5962-94712 Military/Industry Dis

2、tribution The enclosed NOR is approved for use effective as of the date of the NOR. In accordance with MIL-STD-100 SMD holders should, as a minimum, handwrite those changes described in the NOR to sheet 1 of the subject SMD. After completion, the NOR should be attached to the subject SMD for future

3、reference. Those companies who were listed as approved sources of supply prior to this action have agreed to actions taken on devices for which they had previously provided DSCC a certificate of compliance. This is evidenced by an existing active current certificate of compliance on file at DSCC wit

4、h a DSCC record of verbal coordination. The certificate of compliance for these devices is considered concurrence with the new revision unless DSCC is otherwise notified. If you have comments or questions, please contact Ken Rice at (DSN)SSO-0534/(614)692-0534. 1 Encl RAMONNIN Chief, Microelectronic

5、s Team Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-NOTICE OF REVISION (NOR) THIS REVISION DESCRIBED BELOW HAS BEEN AUTHORIZED FOR THE DOCUMENT LISTED. ubiicreporng burden for this coiidon is estimaied to average 2 hours perresponse induding the t

6、ime for reviewin instmaions searchin existing daia ACTIVITY NO. LWSE DO FBOT RETURN duk CgMPLETED FORM TO EITLER OF add llB1l. Revisions description colum; add I1Changes in accordance with NOR 5962-R008-9711. Revisions date colum; add 1196-10-0411. Rev status above sheet nunber 1 delete I1A1l and ad

7、d 11B81, and above sheet nunber 15 add I1B1I. Revision level block; delete I1Al1, and add llB1l. Table 1, footnote 9 Detete the last sentence of this footnote and replace it uith the following: I1Characteriration data is taken initially and after any design or process change which may affect this pa

8、rameter .II Revision level block; add WI. C. TYPED NAME (First, Middle Initial, Last) Ray Monnin 14. THIS SECTION FOR GOVERNMENT USE ONLY d. TITLE Microelectronics Team Chief 15a. ACTIVITY ACCOMPLISHING REVISION DSCC-VAS (1) Existing document supplemented by the NOR may be used in manufacture. (2) R

9、evised document must be received before manufacturer may incorporate this change. e. SIGNATURE f. DATE SIGNED (YYMMDD) Ray Monnin 96-10-04 b. REVISION COMPLETED (Signature) c. DATE SIGNED (YYMMDD) Kenneth S. Rice 96-10-04 Provided by IHSNot for ResaleNo reproduction or networking permitted without l

10、icense from IHS-,-,-t YAECLV mm DESC-ECS (Mr. Rice / (DSN)986-6021/513-296-6021/ksr) ,o 3-m 1995 SUBJECT: Notice of Revision (NOR) 5962-R146-95 for Standardized Military Drawing (SMD) 5962-94712. Military/Industry Distribution The enclosed NOR is approved for use effective as of the date of the NOR.

11、 In accordance with MIL-STD-100 SMD holders should, as a minimum, handwrite those changes described in the NOR to sheet 1 of the subject SMD. After completion, the NOR should be attached to the subject SMD for future reference. Those companies who were listed as approved sources of supply rior to th

12、is action have agreed to actions taken on devices for which they Rad previously provided DESC a certificate of compliance. This is evidenced by an existing active current certificate of compliance on file at DESC along with a DESC record of verbal coordination. The certificate of compliance for thes

13、e devices is considered concurrence with the new revision unless DESC is otherwise notified. If you have comments or questions, please contact Kenneth Rice at (DSN)986- 6021/(513)296-6021. 1 Encl L A. FRYE., Chief, Microelctronics Branch Provided by IHSNot for ResaleNo reproduction or networking per

14、mitted without license from IHS-,-,-D 9999996 006b447 142 D I NOTICE OF REVISION (NOR) 1. DATE (YYMMDD) I 95-06-16 This revision described below has been authorized for the document listed. Public reporting burden for this collection is estimated to average 2 hours per response the time for reviewin

15、 data needed, and compqeting and reviewing the collection.of information. Send comments regarding this burden estimate or any other aspect of this collection of information, including suggestions for reducin this burden, to De artment of Defense, Uashingtion Headquarters Services Directorate for Inf

16、orma?ion Operations and geprts 1215 Jefferson Davis Highway Suite 1204 Art;“ ton VA 22202-4302, and to the Office of ana add “95-04-16“ erision level block, add “A“ QJ %tatu$ of sheets, For sheers 1,6, add “A“ Input capacitance Revision te.el btock; add “A“ Sheet 6. CIH change the Tax column from 15

17、 to 16 1L THIS SECTIOti FOR GOVEilYNEtiT USE ONLY a (X one) x (1) Ecisting documeit supplemented by the NOR may be used ir, manufacture (2) Revised document must be received before manufacturer ma, incorporate this change (3) Custodian of master document shalt make abode redisim and furnish redised

18、document b 4iTIV:TY AUTHOPIZED :3 ADPQOLE CHAHGE FSP GDVEPiYEtIT c TYPED HAVE f:r-,T, Middle Iqitiat, Last) DD Fori 1695, APR 92 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DATE (YR-MO-DA) LTR DESCRIPTION DEFENSE ELECTRONICS SUPPLY CENTER DAYTON,

19、 OHIO 45444 APPROVED MICROCIRCUIT, MEMORY DIGITAL, CMOS, PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON PMIC NIA STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A - - SIZE I CAGE CODE A 67268 PREPARED BY Kenneth Rice C

20、HECKED BY - Jeff Bowling By Michael Frye DRAWING APPROVAL DATE 94-10-18 REVISION LEVEL 5962-94712 SHEET 1 OF 34 DESC FORH 193 JUL 94 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited. 5962-E369-94 Provided by IHSNot for ResaleNo reproduction or networking permitted wit

21、hout license from IHS-,-,-I o1 02 4003A-10 4003A-6 3000 gate programmable array 3000 gate programmable array 10 ns 6 ns 1.2.2 Device class desianator. The device class designator shall be a single letter identifying the product assurance level as follows: Device class Device requireaents documentati

22、on H Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 Q or V Certification and qualification to MIL-1-38535 1.2.4 Case outline(s1. The case outline(s) shall be as designated in MIL-STD-1835 and as follows: Package style Out line

23、letter Descriptive desiqnator Terminals X Y 2 CMGA5-P?20 See figure 1 See figure 1 120 100 100 Pin grid array package Quad f tat package Quad flat package 1.2.4 Lead finish. The lead finish shall be as specified in MIL-STD-883 (see 3.1 herein) for class M or MIL-1-38535 for classes Q and V. Finish l

24、etter “x“ shall not be marked on the microcircuit or its packaging. The “X“ designation is for use in specifications when lead finishes A, B, and c are considered acceptable and interchangeable without preference. 5962-94712 + REVISION LEVEL SHEET STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SU

25、PPLY CENTER DAYTON, OHIO 45444 DESC FORM 193A JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-m 9999995 0066450 737 STANDARD SIZE MICROCIRCUIT DRAWING A DAYTON, OHIO 45444 REVISION LEVEL DEFENSE ELECTRONICS SUPPLY CENTER 1.3 Absolute maxiinum

26、ratings. I/ 2/ Supply voltage range to ground potential (Vrr) -0.5 V dc to +7.0 V dc 5962-94712 SHEET 3 *., DC input voltage range (VIN) . Voltage applied to three-state output (VIS) . Thermal resistance, junction-to-ambient fe,) Power dissipation (PD) Junction temperature (TJ! +150C I/ Lead tempera

27、ture (soldering, 10 seconds) . Storage temperature range - - - - - - - - - - - - - - - - -0.5 V dc to Vcc + 5.0 V dc -0.5 V dc to V + 5.0 V dc +509C/U 500 nU +260C Thermal resistance, junction-to-case (8, ) See MIL-STD-1855 -65C to +15OoC 1.4 Recommended operatinq conditions. Supply voltage relative

28、 to ground f this drawing (sec 6.7.1 herein). The certificate of compliance submitted to DESC-Et prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device class il, the requirements Df MIL-STD-883 (see 3.1 herein), or for device c

29、lasses Q and V, the requirements of MIL-1-38535 and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required for device class M in MIL-STD-8B3 (see 3.1 herein) or for device classes Q and V in MIL-1-38535 shall be provided with each lot of microcircuits deliv

30、ered to this drawing. 3.8 Notification of change for device class M. For device class ri, notification to DESC-EC of change of product (sec 6.2 herein) involving devices acquired to this drawing is required for any change as defined in MIL-STD-973. 3.9 Verification and review for device class M. For

31、 device class Il, DESC, DESCs agent, and the acquiring activity Offshore docuaent8tion retain the option to review the manufacturers facility and applicable required documentation. shall be made available onshore at the option of the reviewer. 3.10 Vicrocircuit aroup assiqnaient for device class M.

32、microcircuit group number 42 (see NIL-1-38535, appendix A). Device class M devices covered by this drawing shall be in 4. QUALITY ASSURANCE PROVISIONS 4.1 Samplincl and inspection. For device class M, sampling and inspection procedures shall be in accordance uith For device classes Q and V, sampling

33、 and inspection procedures shall be in accordance uith MIL-STD-883 (see 3.1 herein). HIL-1-38535 and the device nanufacturers QM plan. 4.2 Screening. For device class M, screening shall be in accordance with method 5004 of RIL-STD-883, and shall be conducted on all devices prior to quality conforman

34、ce inspection. For device classes Q and V, screening shall be in accordance with MIL-1-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. 4.2.1 Additional criteria for device class M. a. Delete the sequence specif ied as initial (preburn-in) el

35、ectrical parameters through interim (postburn-in) electrical parameters of method 5004 and substitute lines 1 through 6 of table IIA herein. For device class M, the test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing

36、 or acquiring activity upon request. For device class M, the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015. Interim and final electrical parameters shall be as specified in table II herein. b.

37、 c. 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturers QM plan in accordance with MIL-1-38535. The burn-in test circuit shall be maintained under document

38、revision level control of the device manufacturers Technology Review Board (TRB) in accordance with MIL-1-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accord

39、ance with the intent specified in test method 1015. Interim and final electrical test parameters shall be as specified in table II herein. Additional screening for device class V beyond the requirements of device class Q shall be as specified in appendix B of MIL-1-38535. b. c. STANDARD SIZE 5962-94

40、712 MI CROCI RCUIT DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL SHEET 5 DESC FORM 193A JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- Test Symbo 1 I zzzGz+ voltage Quiescent LCA supply current - 21 Input Leak

41、age current Pad pull-up current (uhen selected) Horizontal long line pull-up current (when selected) Input capacitance Functional test Interconnect t tops tIL0 I Interconnect + I tg2 T t tops I L I E3 Interconnect + I PID + tIHO I I tE4 Interconnect t IPID + tRIO L I tE5 Interconnect + I CKO t + %KI

42、 I t06 Interconnect + CKO t + CKHH I ta7 Interconnect + CKO + %HCK CKIH TABLE I. Electrical performance characteristics. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-iterconnect + tpID tg10 * tops + t0PCY + I - I 5962-94712 iUM - tBYP TABiE I. Ele

43、ctrical performnce characteristics - continu via EC I - ns CKR Hold time after clock K, C inputs via S/R, going low (inactive) ns 5.5 5 5.5 5 6 5 TCH Clock high time TCL Clock low time ns ns TRPU SetIReset direct width (high) I O2 Provided by IHSNot for ResaleNo reproduction or networking permitted

44、without license from IHS-,-,-D 9999996 0066457 071 I PL-4 - STANDARD SIZE 5962-94712 A MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL SHEET I I I I 10 DESC FORM 193A JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted without license

45、from IHS-,-,-TABLE I. Electrical performance characteristics - continued. See footnotes at end of table. 5962-94712 STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 DESC FORM 193A JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted without li

46、cense from IHS-,-,-TABLE I. Electrical Performance Characteristics - continued. Test Symbo 1 Condit ions Group A Device Limits Unit 4.5 v 5 vcc = 5.5 v subgroups type -SSC I T +12SC c. - unless otherwise specified CLB SUITCHIHG CHARACTERISTICS (RAN OPTION) - Continued. cycle time (32 X 1) write oper

47、ation, write enable pulse width (high) (16 X 2) Write operation, write enable pulse width (high) (32 X 1) Write operation, address setup ti me before beginning of U (16 X 2) Write operation, address setup time before beginning of WE (32 X 1) TWP TWPT TAS a/ o1 16 ns write operation, See figure 4 and

48、 5, - address write as applicable I/ 02 9 a/ o1 12 ns - o2 5 81 o1 12 ns - 02 5 81 All 2 ns 8/ ALL 2 ns - a/ All 2 ns - s/ All 2 ns T See footnotes at end of table. STANDARD 5962-94712 MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL Write operation, address hold time after end of WE (16 X 2) TAH Write operation, address hold time after end of WE (32 X 1) Write operation, DIN setup time before end of UE (16 X 2) Write operation, DIN setup time before end of VE (32 X 1) T TDS T Write Operation, DIN hold time after end of UE DHT DESC FORM 193A JU

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