1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R107-97. CFS 96-11-18 Monica L. Poelking B Incorporate Revision A and update boilerplate to MIL-PRF-38535 requirements. LTG 01-11-01 Thomas M. Hess C Correct title to more accurately describe the function. Upda
2、te radiation features in section 1.5 and RHA paragraphs in section 4. Update the boilerplate paragraphs to current requirements as specified in MIL-PRF-38535. jak 10-01-20 Thomas M. Hess D To correct switching waveforms input/output test limits to figure 4. Add test equivalent circuits and footnote
3、4 to figure 4. Delete class M requirements throughout.MAA 13-01-25 Thomas M. Hess REV SHEET REV D D SHEET 15 16 REV STATUS REV D D D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Thanh V. Nguyen DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.l
4、andandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Thanh V. Nguyen THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, ADVANCED CMOS, RADIATION HARDENED, 4-BIT UP/DOWN BINARY SYNCHR
5、ONOUS COUNTER, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 96-04-19 REVISION LEVEL D SIZE A CAGE CODE 67268 5962-96561 SHEET 1 OF 16 DSCC FORM 2233 APR 97 5962-E185-13Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROC
6、IRCUIT DRAWING SIZE A 5962-96561 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A choi
7、ce of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example 5962 H 96561 01 V X C Federal RHA Device
8、 Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the
9、appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ACTS169 Radiation hardened, 4-bit up/down binary synchronous counter, TTL compatible inputs 1.2.3 Dev
10、ice class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outlines. The case outlines are as designated in MIL-STD-1835 and
11、 as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line X CDFP4-F16 16 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V. Provided by IHSNot for ResaleNo reproduction or networking perm
12、itted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96561 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VDD) -0.3 V dc to +7.0 V dc DC input voltage range (VIN) -0.3
13、 V dc to VDD+ 0.3 V dc DC output voltage range (VOUT) . -0.3 V dc to VDD+ 0.3 V dc DC input current, any one input (IIN). 10 mA Latch-up immunity current (ILU) 150 mA Storage temperature range (TSTG) . -65C to +150C Lead temperature (soldering, 5 seconds) +300C Thermal resistance, junction-to-case (
14、JC) . See MIL-STD-1835 Junction temperature (TJ) +175C Maximum package power dissipation (PD) . 1.0 W 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VDD) +4.5 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VDDOutput voltage range (VOUT). +0.0 V dc to VDDCase operating te
15、mperature range (TC) . -55C to +125C Maximum input rise or fall rate at VDD= 4.5 V (tr, tf) . 1 ns/V 4/ 1.5 Radiation features. 5/ Maximum total dose available (dose rate = 50 300 rads (Si)/s) 1 x 106Rads (Si) Single event phenomenon (SEP): No SEU occurs at effective LET (see 4.4.4.4) . 80 MeV/(mg/c
16、m2) 6/ No SEL occurs at effective LET (see 4.4.4.4) . 120 MeV/(mg/cm2) 6/ Dose rate induced upset (20 ns pulse) 1 x 109Rads (Si)/s 6/ Latch-up . None 6/ Dose rate survivability 1 x 1012Rads (Si)/s 6/ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended ope
17、ration at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise noted, all voltages are referenced to VSS. 3/ The limits for the parameters specified herein shall apply over the full specified VDDrange and case temperature range of -55C to +125C unless otherwise note
18、d. 4/ Derate system propagation delays by difference in rise time to switch point for tror tf 1 ns/V. 5/ Radiation testing is performed on the standard evaluation circuit (SEC). 6/ Limits are guaranteed by design or process, but not production tested unless specified by the customer through the purc
19、hase order or contract. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96561 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Governm
20、ent specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATIO
21、N MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Mic
22、rocircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. Th
23、e following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. ASTM INTERNATIONAL (ASTM) ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) In
24、duced by Heavy Ion Irradiation of semiconductor Devices. (Copies of these documents are available online at https:/www.astm.org or from ASTM International, 100 Barr Harbor Drive, P.O. Box C700, West Conshohocken, PA, 19428-2959). 2.3 Order of precedence. In the event of a conflict between the text o
25、f this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device c
26、lasses Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 3.2 Design, construction, and physical dimensions
27、. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3
28、.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuits. The switching waveforms and test circuits shall be as specified on figure 4. Provided by IHSNot for ResaleNo rep
29、roduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96561 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the ma
30、nufacturer under document revision level control and shall be made available to the preparing and acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postir
31、radiation parameter limits are as specified in table IA and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are described in table IA.
32、3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device.
33、For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. 3.6
34、Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as
35、 an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be pr
36、ovided with each lot of microcircuits delivered to this drawing. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96561 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 A
37、PR 97 TABLE IA. Electrical performance characteristics. Test Symbol Test conditions 1/ 2/ -55C TC +125C unless otherwise specified Device type VDDGroup A subgroups Limits 3/ Unit Min Max High level input voltage VIHAll 4.5 V 1, 2, 3 2.25 V All 5.5 V 1, 2, 3 2.75 Low level input voltage VILAll 4.5 V
38、1, 2, 3 0.8 V All 5.5 V 1, 2, 3 0.8 High level output voltage VOHFor all inputs affecting output under test, VIN= VDDor VSSIOH= -8.0 mA All 4.5 V 1, 2, 3 3.15 V Low level output voltage VOLFor all inputs affecting output under test, VIN= VDDor VSSIOL= 8.0 mA All 4.5 V 1, 2, 3 0.4 V Input current hig
39、h IIHFor input under test, VIN= 5.5 V For all other inputs VIN= VDDor VSSAll 5.5 V 1, 2, 3 +1.0 A Input current low IILFor input under test, VIN= VSSFor all other inputs VIN= VDDor VSSAll 5.5 V 1, 2, 3 -1.0 A Quiescent supply current delta, TTL input levels IDD 4/ For input under test VIN= VDD2.1 V
40、For all other inputs VIN= VDDor VSSAll 5.5 V 1, 2, 3 1.6 mA Quiescent supply current IDDQVIN= VDDor VSSAll 5.5 V 1, 2, 3 10.0 A Output current (Sink) IOL5/ VIN= VDDor VSSVOL= 0.4 V All 4.5 V and 5.5 V 1, 2, 3 8.0 mA Output current (Source) IOH5/ VIN= VDDor VSSVOH= VDD-0.4 V All 4.5 V and 5.5 V 1, 2,
41、 3 -8.0 mA Short circuit output current IOS6/ 7/ VOUT= VDDand VSSAll 5.5 V 1, 2, 3 200 mA Input capacitance CINf = 1 MHz, see 4.4.1c All 0.0 V 4 15.0 pF Output capacitance COUTf = 1 MHz, see 4.4.1c All 0.0 V 4 15.0 pF Switching power dissipation PSW 8/ CL = 50 pF, per switching output All 4.5 V and
42、5.5 V 4, 5, 6 2.3 mW/MHz Functional test 9/ VIH = 0.5 VDD, VIL= 0.8 V See 4.4.1b All 4.5 V and 5.5 V 7, 8 L H See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96561 DLA LAND AND
43、MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics Continued. Test Symbol Test conditions 1/ 2/ -55C TC +125C unless otherwise specified Device type VDDGroup A subgroups Limits 3/ Unit Min Max Propagation delay time, CLK
44、 to any Q tPLH110/ CL= 50 pF, see figure 4 All 4.5 V and 5.5 V 9, 10, 11 4.0 24.0 ns tPHL110/ CL= 50 pF, see figure 4 All 4.5 V and 5.5 V 9, 10, 11 4.0 24.0 Propagation delay time, CLK to RCO tPLH210/ CL= 50 pF, see figure 4 All 4.5 V and 4.5 V 9, 10, 11 2.0 23.0 ns tPHL210/ CL= 50 pF, see figure 4
45、All 4.5 V and 5.5 V 9, 10, 11 4.0 28.0 Propagation delay time, ENT to RCO tPLH310/ CL= 50 pF, see figure 4 All 4.5 V and 4.5 V 9, 10, 11 1.0 15.0 ns tPHL310/ CL= 50 pF, see figure 4 All 4.5 V and 5.5 V 9, 10, 11 2.0 16.0 Propagation delay time, U/D to RCO tPLH410/ CL= 50 pF, see figure 4 All 4.5 V a
46、nd 4.5 V 9, 10, 11 2.0 16.0 ns tPHL410/ CL= 50 pF, see figure 4 All 4.5 V and 5.5 V 9, 10, 11 2.0 16.0 Maximum clock frequency fMAXCL= 50 pF, see figure 4 All 4.5 V and 5.5 V 9, 10, 11 71.0 MHz Setup time, data ENT, ENP, U/D LOAD high or low before CLK tSCL= 50 pF, see figure 4 All 4.5 V and 5.5 V 9
47、, 10, 11 9.0 ns Hold time, data ENT, ENP, U/D LOAD high or low after CLK th11/ CL= 50 pF, see figure 4 All 4.5 V and 4.5 V 9, 10, 11 2.0 ns CLK pulse width, high or low tWCL= 50 pF, see figure 4 All 4.5 V and 5.5 V 9, 10, 11 7.0 ns See footnotes at end of table. Provided by IHSNot for ResaleNo repro
48、duction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96561 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 8 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics Continued. 1/ Each input/output, as applicable, shall be tested at the specified temperature, for the specifi
