1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Technical and editorial changes throughout. - LTG 98-06-30 M. L. Poelking B Update boilerplate to MIL-PRF-38535 requirements. - CFS 05-12-08 Thomas M. Hess REV SHET REV B B B B B B B B B B B B B B B B B SHEET 15 16 17 18 19 20 21 22 23 24 25 26 2
2、7 28 29 30 31 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Thomas M. Hess DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Thomas M. Hess COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILA
3、BLE FOR USE BY ALL DEPARTMENTS APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, RADIATION HARDENED, 1750 CHIP SET, MULTICHIP AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 97-12-01 MICROCIRCUIT, SILICON AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-96847 SHEET 1 OF 31 D
4、SCC FORM 2233 APR 97 5962-E512-05 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96847 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Sco
5、pe. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice
6、of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 96847 01 Q Y C Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5)
7、/ (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with
8、 the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Minimum Operating Device type Generic number Circuit function Period 01 RX1750 Microprocessor, multichip module 50 ns 02 RX1750 Microprocessor, m
9、ultichip module 55 ns 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B micr
10、ocircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style Y See figure 1 200 Quad flat pack
11、1/ 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. _ 1/ The lid for this outline is Nickel plated Kovar. No Gold is used on the lid. Provided by IHSNot for ResaleNo reproduction or networking permitted wi
12、thout license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96847 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range (VDD) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V
13、 dc to VDD+ 0.5 V dc DC output voltage range (VOUT) -0.5 V dc to VDD+ 0.5 V dc DC input current (IIN) 3/ . 50 mA DC output current (IOUT) 4/ 50 mA Power dissipation,(f = 20 Mhz) (PD) . 2.5 W (peak) Lead temperature (soldering, 5 seconds). +270C Maximum junction temperature (TJ) . +175C Thermal resis
14、tance, junction-to-case (JC) . 1.0C/W ESD Class 1 (1000 V) Storage temperature range -65C to +150C 1.4 Recommended operating conditions. Supply voltage range (VDD) 4.5 V dc to 5.5 V dc DC input voltage range (VIN) -0.3 V dc to VDD+ 0.3 V dc DC output voltage range (VOUT) -0.3 V dc to VDD+ 0.3 V dc D
15、C input current (IIN) 3/ . 10 mA DC output current (IOUT) 4/ 12 mA Capacitive output load (CL) 5/ . 50 pF Case operating temperature range (TC) . -55C to +125C 1.5 Radiation features. Maximum total dose available (dose rate = 50 300 rads(Si)/s) 1x 106rads(Si) _ 1/ Stresses above the absolute maximum
16、 rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ All voltages are with respect to VSSterminal and TC= -55C to +125C, unless otherwise specified. 3/ High impedance (input or output in three-state), driver or
17、receiver type = input, output, or bidirectional. 4/ Low impedance (enabled), driver or receiver type = output or bidirectional. 5/ f = 20 MHz, no dc load, driver or receiver type = output or bidirectional 12 mA, maximum capacitance scales with inverse of frequency, VDD= 4.5 V dc. Provided by IHSNot
18、for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96847 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and
19、handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circu
20、its, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. MIL-STD-1750 - Sixteen-Bit Computer Instruction Set Architecture DEPARTMENT OF DEFENSE HANDBOOKS MIL-
21、HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, P
22、hiladelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has
23、been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affec
24、t the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and phys
25、ical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections sh
26、all be as specified on figure 2. 3.2.3 Block diagram. The block diagram shall be as specified on figure 3. 3.2.4 Switching test circuit and waveforms. The switching test circuit and waveforms shall be as specified on figure 4. 3.2.5 Radiation exposure circuit. The radiation exposure circuit shall be
27、 as specified on figure 5. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over the full case operating tem
28、perature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table IA. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD
29、 MICROCIRCUIT DRAWING SIZE A 5962-96847 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking o
30、f the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. M
31、arking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-3
32、8535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required
33、 from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q
34、and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A
35、 shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawin
36、g. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.1
37、0 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 105 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWIN
38、G SIZE A 5962-96847 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics. Limits Test Symbol Conditions 1/ 2/ -55C TC +125C 4.5 V VDD 5.5 V unless otherwise specified Group A subgroupsDevice types Min
39、 Max Units High level input threshold voltage 3/ Pin groups CMOS in 4/ VIHVDD= 5.5 V 1, 2, 3 All 3.85 V Low level input threshold voltage 3/ Pin groups CMOS in 4/ VILVDD= 4.5 V 1, 2, 3 All 1.35 V Quiescent supply current IDDSBVDD= 5.5 V, fC= 0 Hz 1, 2, 3 All 100 mA Operating supply current IDDVDD= 5
40、.5 V, fC= 16.6 MHz 1, 2, 3 01, 02 300 mA High level input current, pin gropus INHI 5/ IIHVDD= 5.5 V, VIH= VDD1, 2, 3 All -10 10 A High level input current Pin groups ALLINPD 6/ IIH2VDD= 5.5 V, VIH= VDD1, 2, 3 All 50 550 A High level input current Pin groups ALLINMPD 7/ IIH3VDD= 5.5 V, VIH= VDD1, 2,
41、3 All .050 1.5 mA Low level input current Pin groups INLW 8/ IILVDD= 5.5 V, VIL= VSS1, 2, 3 All -10 10 A Low level input current Pin groups ALLINPU 9/ IIL1VDD= 5.5 V, VIL= VSS1, 2, 3 All -550 -50 A Low level input current Pin groups ALLINMPU 10/ IIL2VDD= 5.5 V, VIL= VSS1, 2, 3 All -1.5 -.050 mA High
42、 level output voltage 19/ Pin groups ALL12 11/ VOHVDD= 4.5 V, IOH= -12 mA 1, 2, 3 All 4.0 V Low level output voltage 19/ Pin groups ALL12 11/ VOLVDD= 4.5 V, IOL= 12 mA 1, 2, 3 All 0.5 V High level output current 19/ Pin groups ALL12 11/ IOHVDD= 4.5 V, VOH= 4 V 1, 2, 3 All -12 mA Low level output cur
43、rent Pin groups ALL12 11/ IOLVDD= 4.5 V, VOH= 0.5 V 1, 2, 3 All 12 mA Three-state high level output leakage current Pin groups TRIBIHI 12/ IOZHVDD= 5.5 V, VOH=5.5 V 1, 2, 3 All 18 A Three-state low level output leakage current Pin groups TRIBILW 12/ IOZLVDD= 5.5 V, VOL=0.0 V 1, 2, 3 All -18 A See fo
44、otnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96847 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE IA. Electrical perf
45、ormance characteristics - continued. Limits Test Symbol Conditions 1/ 2/ -55C TC +125C 4.5 V VDD 5.5 V unless otherwise specified Group A subgroups Device types Min Max Units Three-state high level output leakage current Pin groups TRIBIPU 14/ IOZL1VDD= 5.5 V, VOL=0.0 V 1, 2, 3 All -550 -50 A Three-
46、state high level output leakage current Pin groups TRIBIODPU 15/ IOZL2VDD= 5.5 V, VOL=0.0 V 1, 2, 3 All -1.5 -.050 A High level output ground bounce voltage 16/ VGBHVIL= 0.0 V, VIH= VDD1, 2, 3 All 0.1 V Low level output ground bounce voltage 16/ VGBLVIL= 0.0 V, VIH= VDD1, 2, 3 All 0.3 V Input capaci
47、tance 16/ CINVIN= 0 V, f = 1.0 MHz, see 4.5.1c 4, 5, 6 All 9 pF Output capacitance 16/ COUTVOUT= 0 V, f = 1.0 MHz, see 4.5.1c 4, 5, 6 All 14 pF Functional test per approved vector set 17/ VIL= 0.0 V, VIH= VDD, see 4.5.1b 7, 8A, 8B All Pass 1 50 Minimum operating period tMIN9, 10, 11 2 55 ns Output r
48、ise and fall times 16/ 18/ 20/ tro, tfoCL= 60 pF 9, 10, 11 All 2.5 ns Propagation delay time, HCLK to PIO tPHL3, tPLH39, 10, 11 All 6 36 ns Propagation delay time, HCLK to DOUTENA tPLH4, tPHL49, 10, 11 All 5 33 ns Propagation delay time, HCLK to CPUPARITY tPLH6, tPHL69, 10, 11 All 10.8 43 ns Propagation delay time, HCLK to CPUWDATAn tPLH9, tPHL99, 10, 11 All 8.4 32.9 ns Propagation delay time, HCLK to WRITE tPLH10, tPHL109, 10, 11 All 7 48 ns tPLH129, 10, 11 All 9 42 ns Propagation delay time, HCLK to SIOE tPHL129, 10, 11 All 10 40 ns 7 36.5 Propagation delay time,
