1、REVISIONSLTR DESCRIPTION DATE (YR-MO-DA) APPROVEDREV SHEETREVSHEET 15 16 17 18 19 20 21 22 23REV STATUSOF SHEETSREVSHEET 123456789101121314PMIC N/APREPARED BY Larry T. Gauder DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216 STANDARDMICROCIRCUITDRAWINGTHIS DRAWING IS AVAILABLEFOR USE BY ALLDEPARTM
2、ENTSAND AGENCIES OF THEDEPARTMENT OF DEFENSEAMSC N/A CHECKED BYThomas M. HessMICROCIRCUIT, DIGITAL, BICMOS, HIGH-SPEEDOPTICAL/COPPER RECEIVER INTERFACE, MONOLITHIC SILICONAPPROVED BYMonica L. PoelkingDRAWING APPROVAL DATE97-05-06SIZEACAGE CODE672685962-96896REVISION LEVELSHEET 1 OF 23DSCC FORM 2233A
3、PR 97 5962-E027-97DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARDMICROCIRCUIT DRAWINGDEFENSE SUPPLY CENTER COLUMBUSCOLUMBUS, OHIO 43216-5000SIZEA5962-96896REVIS
4、ION LEVEL SHEET2DSCC FORM 2234APR 971. SCOPE1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M)and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part orId
5、entifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.1.2 PIN. The PIN is as shown in the following example:5962 - 96896 01 Q 3 X G0DG0D G0D G0D G0D G0DG0DG0D G0D G0D G0D G0DG0D G0D G0D G0D G0D G0D Federal RHA Device Device Case Lead s
6、tock class designator type class outline finishdesignator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3)/ Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and aremarked with the appropriate RHA design
7、ator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix Aspecified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.1.2.2 Device type(s). The device type(s) identify the circuit function as follows:Device type Generic number Circui
8、t function01 7B933 High-speed optical/copper receiver interface1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level asfollows:Device class Device requirements documentationM Vendor self-certification to the requirements for MIL-STD-883
9、 compliant,non-JAN class level B microcircuits in accordance with MIL-PRF-38535,appendix AQ or V Certification and qualification to MIL-PRF-385351.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:Outline letter Descriptive designator Terminals Package style3
10、CQCC2-N28 28 Square leadless chip carrier1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARDMICROCIRC
11、UIT DRAWINGDEFENSE SUPPLY CENTER COLUMBUSCOLUMBUS, OHIO 43216-5000SIZEA5962-96896REVISION LEVEL SHEET3DSCC FORM 2234APR 971.3 Absolute maximum ratings. 1/Supply voltage range (V )CCto ground potential continuous - - - - - - - - - - - - - - - - - - - - - -0.5 V to +7.0 V DC voltage range applied to o
12、utput - - - - - - - - - - - - - - - - - - - - -0.5 V to V maximumCCDC input voltage range - - - - - - - - - - - - - - - - - - - - - - - - - - - -0.5 V to +7.0 VDC output current (TTL LOW) - - - - - - - - - - - - - - - - - - - - - - 30 mADC output current (PECL HIGH) - - - - - - - - - - - - - - - - -
13、 - - - - -50 mADC input current - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -30 to +0.5 mAStorage temperature range - - - - - - - - - - - - - - - - - - - - - - - - -65(C to +150(CMaximum power dissipation (P ) 2/ - - - - - - - - - - - - - - - - - - - 2.6 WDLead temperature (sol
14、dering, 10 seconds) - - - - - - - - - - - - - - 260(CThermal resistance Junction to case (V ) - - - - - - - - - - - - - - See MIL-STD-1835JCJunction temperature (T ) - - - - - - - - - - - - - - - - - - - - - - - - - - 155(CJ1.4 Recommended operating conditions.Supply voltage range (V ) - - - - - - -
15、 - - - - - - - - - - - - - - - - - - +4.5 V dc to +5.5 V dc CCMinimum high-level input voltage (V ) - - - - - - - - - - - - - - - - - 2.0 VIHMaximum low-level input voltage (V ) - - - - - - - - - - - - - - - - - 0.8 VILCase operating temperature range (T ) - - - - - - - - - - - - - - - - -55(C to +1
16、25(CC1.5 Digital logic testing for device classes Q and V. Fault coverage measurement of manufacturinglogic tests (MIL-STD-883, test method 5012) - - - - - - - - - - - - - XX percent 3/2. APPLICABLE DOCUMENTS2.1 Government specification, standards, and handbooks. The following specification, standar
17、ds, and handbooks form a partof this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in theissue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in thesolicitation.SPECIFICATI
18、ONMILITARYMIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.STANDARDSMILITARYMIL-STD-883 - Test Methods and Procedures for Microelectronics.MIL-STD-973 - Configuration Management.MIL-STD-1835 - Microcircuit Case Outlines.1/ Stresses above the absolute maximum rating may c
19、ause permanent damage to the device. Extended operation at themaximum levels may degrade performance and affect reliability.2/ Must withstand the added P due to short circuit test; e.g., I .DSC3/ Values will be added when they become available.Provided by IHSNot for ResaleNo reproduction or networki
20、ng permitted without license from IHS-,-,-STANDARDMICROCIRCUIT DRAWINGDEFENSE SUPPLY CENTER COLUMBUSCOLUMBUS, OHIO 43216-5000SIZEA5962-96896REVISION LEVEL SHEET4DSCC FORM 2234APR 97HANDBOOKSMILITARYMIL-HDBK-103 - List of Standard Microcircuit Drawings (SMDs).MIL-HDBK-780 - Standard Microcircuit Draw
21、ings.(Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization Document Order Desk,700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)2.2 Order of precedence. In the event of a conflict between the text of this drawing and th
22、e references cited herein, the text of this drawing takesprecedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained.3. REQUIREMENTS3.1 Item requirements. The individual item requirements for device classes Q and V shall be
23、in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QMplan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance
24、 with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein.3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535and herein for device classes Q and V or MIL-PRF-38535, appendix A and
25、herein for device class M.3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein .3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 2.3.2.4 Functional block/logi
26、c diagrams. The functional block/logic diagrams shall be as specified on figure 3.3.2.5 Radiation exposure circuit. The radiation exposure circuit shall be as specified when available.3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein,
27、the electrical performancecharacteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range.3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical te
28、sts for eachsubgroup are defined in table I.3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the
29、manufacturer has the option ofnot marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Qand V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendi
30、x A.3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A.3.6 Certificate of compliance. For device classes Q and V, a
31、 certificate of compliance shall be required from a QML-38535 listed manufacturer inorder to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from amanufacturer in order to be listed as an approved source of supply in MI
32、L-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted toDSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Qand V, the requirements of MIL-PRF-38535 and herein or for device class M, the req
33、uirements of MIL-PRF-38535, appendix A and herein.3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.Provide
34、d by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARDMICROCIRCUIT DRAWINGDEFENSE SUPPLY CENTER COLUMBUSCOLUMBUS, OHIO 43216-5000SIZEA5962-96896REVISION LEVEL SHEET5DSCC FORM 2234APR 97TABLE I. Electrical performance characteristics.Test Symbol Conditions
35、-55C T +125CC4.5 V V 5.5 V 1/CCunless otherwise specifiedGroup AsubgroupsDevicetypeLimits UnitMin MaxBus interface signals: Q , SC/G09D, RVS, G09RG09DG09Y, CKR, SO, RF, REFCLK, MODE, G09BG09IG09SG09TG09EG09N0-7Output high voltage VOHTV = 4.5 V, I = -2 mACC OHV = 0.0 V or 3.0 VIN1, 2, 3 All 2.4 VOutp
36、ut low voltage VOLTV = 4.5 V, I = 4 mACC OHV = 0.0 V or 3.0 VIN1, 2, 3 All 0.45 VOutput short circuit current IOSTV = 0 V 2/OUT1, 2, 3 All -15 -90 mAInput high voltage VIHT1, 2, 3 All 20 VCCVInput low voltage VILT1, 2, 3 All -0.5 0.8 VInput high current IIHTV = VIN CC1, 2, 3 All -10 +10 )AInput low
37、current IILTV = 0.0 VIN1, 2, 3 All -500 )APECL interface signals: INB+, SI, A/BInput high voltage VIHE1, 2, 3 All VCC-1.14VCCVInput low voltageVILE1, 2, 3 All 2.0 VCC-1.5VInput high current 3/IIHEV = V maxIN IHE1, 2, 3 All +500 )AInput low current 3/IILEV = V minIN ILE1, 2, 3 All +0.5 )ADifferential
38、 serial data inputs: INA+, INA-, INB+, INB-Differential input voltage VDIFF1, 2, 3 All 0.05 VHighest input voltage VIHH1, 2, 3 All VCCVLowest input voltage VILL1, 2, 3 All 2.0 VInput high current IIHHV = V maxIN IHH1, 2, 3 All 750 )AInput low current 4/ILLV = V minIN ILE1, 2, 3 All -200 )AMiscellane
39、ous: V , VCCN CCQPower supply current 5/ICCRFrequency = max 1, 2, 3 All 135 160 mAInput capacitance CINf = 1 MHz, V = 5.0 VoCCSee 4.4.1b 4 All 10 pFFunctional test See 4.4.1c 7, 8 AllSee footnotes at end of table.Provided by IHSNot for ResaleNo reproduction or networking permitted without license fr
40、om IHS-,-,-STANDARDMICROCIRCUIT DRAWINGDEFENSE SUPPLY CENTER COLUMBUSCOLUMBUS, OHIO 43216-5000SIZEA5962-96896REVISION LEVEL SHEET6DSCC FORM 2234APR 97TABLE I. Electrical performance characteristics - Continued.Test Symbol Conditions-55C T +125CC4.5 V V 5.5 V 1/CCunless otherwise specifiedGroup Asubg
41、roupsDevicetypeLimits UnitMin MaxRead clock reference,relative to REFCLKt16/ 9, 10, 11 All -1 +1 %REFCLK clock periodreferenced to sourceword ratet27/ 9, 10, 11 All -0.1 +0.1 %Read clock period t38/ 9, 10, 11 All 30.3 62.5 nsBit time t4Internal bit clock 9/ 13/ 9 All 3.03 6.25 ns10, 11 Read clock hi
42、gh pulse t58/ 9, 10, 11 All 5t -34nsRead clock low pulse t68/ 9, 10, 11 All 5t -34nsG09RG09DG09Y hold time t79, 10, 11 All t -34nsG09RG09DG09Y pulse fall to CKR high t89, 10, 11 All 5t -34nsG09RG09DG09Y pulse width high t99, 10, 11 All 4t -34nsData access time t1010/ 11/ 9, 10, 11 All 2t -242t +44ns
43、Data hold time t1110/ 11/ 9, 10, 11 All t -34nsData hold time from CKRriset1210/ 11/ 9, 10, 11 All 2t -34nsREFCLK clock pulse high t139, 10, 11 All 6.5 nsREFCLK clock pulse low t149, 10, 11 All 6.5 nsPropagation delay SI to SO t1512/ 9, 10, 11 All 20 nsStatic alignment t1613/ 14/ 9 All 100 ps10, 11
44、Error free window t1713/ 15/ 9 All 0.9t4ps10, 11 See footnotes at end of table.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARDMICROCIRCUIT DRAWINGDEFENSE SUPPLY CENTER COLUMBUSCOLUMBUS, OHIO 43216-5000SIZEA5962-96896REVISION LEVEL SHEET7DSCC
45、 FORM 2234APR 97TABLE I. Electrical performance characteristics - Continued.1/ Unless otherwise specified, for dc test parameters, all test conditions shall be worst case conditions; V = 2.0 V andIHV = 0.8 V. For ac test parameters, all tests are performed using the input waveforms in figure 4. The
46、following conditionsILalso apply:All timing references are made with respect to +1.5 V for TTL-level signals or to the 50% point between V and VOH OLfor PECL levels. PECL input rise and fall times must be 1 ns between the 20% and 80% points. TTL input rise andfall time must be 1 ns between 1 V and 2
47、 V points.2/ Tested one output at a time, output shorted for less than one second, less than 10% duty cycle.3/ Applies to A/G09B only.4/ Input currents are always positive at all voltages above V /2.CC5/ Maximum I is measured with V = max, RF = low, and outputs unloaded.CCR CC6/ The period of t will
48、 match the period of the transmitter byte clock when the receiver is receiving serial data. When data is1interrupted, t may drift to one of the range limits.17/ The receiver REFCLK has no phase or frequency relationship to the CKR and only acts as a centering reference to reduceclock synchronization time. REFCLK must be within 0.1% of the transmitted byte clock, necessitating a 500 ppm crystalreference.8/ This parameter does not apply during framing o
