1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Drawing updated to reflect current requirements. - gt 03-01-07 R. MONNIN B Update boilerplate paragraphs to current MIL-PRF-38535 requirements. - ro 10-08-26 C. SAFFLE REV SHET REV SHET REV STATUS REV B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4
2、 5 6 7 8 9 10 11 PMIC N/A PREPARED BY RICK OFFICER DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY RAJESH PITHADIA APPROVED BY RAYMOND MONNIN
3、 MICROCIRCUIT, LINEAR, HIGH POWER FACTOR PREREGULATOR, MONOLITHIC SILICON DRAWING APPROVAL DATE 97-11-21 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-97630 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E445-10 Provided by IHSNot for ResaleNo reproduction or networking permitted without license f
4、rom IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97630 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space a
5、pplication (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962
6、 - 97630 01 Q P A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Leadfinish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RH
7、A levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circ
8、uit function as follows: Device type Generic number Circuit function 01 UC1852 High power factor preregulator 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self
9、-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline
10、letter Descriptive designator Terminals Package style P GDIP1-T8 or CDIP2-T8 8 Dual-in-line 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permi
11、tted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97630 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage (VCC) (low impedance source) . 30.0 V Supply current (ICC) (high impe
12、dance source) 30.0 mA Peak output current (IOUT) 1.0 A Output energy, capacitive load 5.0 J Input voltage, ISNS . 5.0 V Feedback input voltage (VFB) . -0.3 V to +10.0 V COMPARATOR current (ICOMP) 10.0 mA ISETcurrent . -10.0 mA Power dissipation (PD) at TA= +25C 1.0 W Storage temperature . -65C to +1
13、50C Lead temperature (soldering, 10 seconds) +300C Junction temperature (TJ) . +185C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Thermal resistance, junction-to-ambient (JA) 160C/W 1.4 Recommended operating conditions. Supply voltage (VCC) 24.0 V Ambient operating temperature range
14、(TA) . -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the soli
15、citation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT
16、OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Phil
17、adelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has bee
18、n obtained. _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ All voltages with respect to ground 3/ All currents are positive into the specified terminal. Provided by
19、IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97630 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements
20、 for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for
21、 device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q
22、 and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Logic diagram. The logic diagram shall be as specified on fi
23、gure 2. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3
24、.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marke
25、d. For packages where marking of the entire SMD PIN is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordan
26、ce with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“
27、as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of comp
28、liance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufactu
29、rers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for de
30、vice class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime -VA of change of product (see 6.2 herein) involving devices acquired to this
31、drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentati
32、on. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 52 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo re
33、production or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97630 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TA+125C Group
34、 A subgroups Device type Limits Unit unless otherwise specified Min Max Timer section ISET voltage VISET1,2,3 01 4.5 5.5 V RAMP charge current ICHRAMP pin = 2.5 V 1,2,3 01 88 108 A RAMP discharge current IDISISNS pin = -1.0 V, RAMP pin = 1.0 V 1,2,3 01 12 50 mA RAMP saturation voltage VSATISNS pin =
35、 -1.0 V, IRAMP = 100 A 1,2,3 01 0.200 V RAMP threshold voltage (maximum frequency) VTHVFB= 10 V, COMP = open 1,2,3 01 0.92 1.12 V RAMP threshold voltage (PWM comparator) VTH1,2,3 01 3.9 4.8 V Current sense comparator ISNS restart threshold voltage VTH1,2,3 01 -18 -4 mV ISNS fault threshold voltage V
36、TH1,2,3 01 -550 -350 mV ISNS input current IIN1,2,3 01 -100 100 A Error amplifier section VFBinput voltage VIN1,2,3 01 4.6 5.3 V VFBinput bias current IIB1,2,3 01 -5.0 5.0 A COMP sink current ISICOMP pin = 7.5 V 1,2,3 01 10 mA COMP source current ISOCOMP pin = 2.5 V 1,2,3 01 -300 -100 A COMP clamp v
37、oltage VCLVFB= 0.0 V, COMP = open 1,2,3 01 9.2 10.6 V See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97630 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEE
38、T 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions 1/ -55C TA+125C Group A subgroups Device type Limits Unit unless otherwise specified Min Max OUTPUT section OUTPUT saturation voltage high VHSATVCC= 13 V, RAMP = 2 V, IOUT= -200 mA 1,2,3 01 0.
39、5 2.5 V OUTPUT saturation voltage low VLSATIOUT= 200 mA, ISNS = -1.0 V 1,2,3 01 0.5 2.2 V OUTPUT saturation voltage low at 10 mA VLSATIOUT= 10 mA, ISNS = -1.0 V 1,2,3 01 0.40 V OUTPUT clamp voltage VCLIOUT= -200 mA, RAMP = 2 V 1,2,3 01 10.0 14.5 V OUTPUT voltage during under voltage lock out VUVLOIO
40、UT= 100 mA, VCC= 0 V 1,2,3 01 0.5 2.2 V Overall section Inactive supply current IINAVCC= 10 V 1,2,3 01 0.2 1.0 mA Active supply current IACT1,2,3 01 3.0 10 mA VCCclamp voltage ICC= 25 mA 1,2,3 01 30 36 V VCCturn-on threshold voltage VON1,2,3 01 14.5 17.5 V VCCturn-off threshold voltage VOFF1,2,3 01
41、10.5 13.0 V VCCthreshold hysteresis voltage VHYS1,2,3 01 3 7 V 1/ Unless otherwise specified, VCC= 24 V, ISET= 50 k to GND, RAMP = 1 nF to GND, ISNS = -0.1 V, VFB pin connected to COMP pin, and no load on the OUTPUT pin. Provided by IHSNot for ResaleNo reproduction or networking permitted without li
42、cense from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97630 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 Device type 01 Case outline P Terminal number Terminal symbol Descriptions 1 VFB VFB is the error amplifier inverting input. This input se
43、rves as both the voltage sense input to the error amplifier. 2 ISNS This input to the zero and over current comparators is specially built to allow operation over 5 V dynamic range. In noisy systems or systems with very high Q inductors, it is desirable to filter the signal entering the ISNS input t
44、o prevent premature restart or fault cycles. 3 ISET The first function of this pin is to program RAMP charging current. RAMP charging current is approximately 5 V divided by the external resistor placed from ISET to ground. Resistors in the external in the range of 10 k to 50 k are recommended, prod
45、ucing currents in the range of 100 A to 500 A. The second function of ISET is as reference output. The ISET pin is normally regulated to 5 V 10%. It is critical that this pin only see the loading of the RAMP programming resistor, but a high input-impedance comparator or amplifier may be connected to
46、 this pin or tap on the RAMP programming resistor if required. The third function of the ISET pin is as a FAULT output. In the event of an over-current fault, the ISET pin is forced to approximately 9 V by the fault comparator. This can be used to trip an external protection circuit which can disabl
47、e the load or start a fault restart cycle. 4 RAMP A controlled on-time PWM requires a timer whose time can be modulated by an external voltage. The timer current is programmed by a resistor from ISET to GND. A capacitor from RAMP to GND sets the on time in conjunction with the voltage on COMP. Recom
48、mended values for the timer capacitors are between 100 pF and 1 nF. 5 GND GROUND for all functions is through this pin. 6 OUTPUT The output of a high-current power driver capable of driving the gate of a power MOSFET with peak currents exceeding 500 mA. 7 VCCVCCis the logic and control power connection for this device. VCCcurrent is the sum of active device supply current and the average OUTPUT current. 8 COMP COMP is the output of the error amplifier and the input of the pulse width modulator (PWM) comparator. To limit PWM on-time, this pin is clamped to
