1、REVISIONSLTR DESCRIPTION DATE (YR-MO-DA) APPROVEDREVSHEETREVSHEET 15 16 17 18 19 20REV STATUSOF SHEETSREVSHET 123456789101121314PMIC N/APREPARED BY Kenneth RiceDEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 42316 http:/www.dscc.dla.mil STANDARDMICROCIRCUITDRAWINGTHIS DRAWING ISAVAILABLEFOR USE BY ALL
2、DEPARTMENTSAND AGENCIES OF THEDEPARTMENT OF DEFENSEAMSC N/A CHECKED BYJeff BowlingMICROCIRCUIT, MEMORY, DIGITAL, CMOS, FIELDPROGRAMMABLE GATE ARRAY, 10,000 GATES,MONOLITHIC SILICONAPPROVED BYRaymond MonninDRAWING APPROVAL DATE99-06-21SIZEACAGE CODE672685962-98579REVISION LEVELSHEET 1 OF 20DSCC FORM
3、2233APR 97 5962-E328-99DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARDMICROCIRCUIT DRAWINGDEFENSE SUPPLY CENTER COLUMBUSCOLUMBUS, OHIO 42316-5000SIZEA5962-98579
4、REVISION LEVEL SHEET2DSCC FORM 2234APR 971. SCOPE1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q andM) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in thePart
5、or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in thePIN.1.2 PIN. The PIN shall be as shown in the following example:5962 - 98579 01 Q X C G0DG0D G0DG0D G0DG0DG0DG0D G0DG0D G0DG0DG0D G0D G0D G0D G0D G0D Federal RHA Device Device Case
6、Lead stock class designator type class outline finishdesignator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3)/Drawing number1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels andare marked with the appropriate RHA de
7、signator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix Aspecified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.1.2.2 Device type(s). The device type(s) shall identify the circuit function as follows:Device type Generic num
8、ber Circuit function Bin speed01 A32100DX 10,000 gate field programmable gate array 160 nswith 2,048 SRAM bits02 A32100DX-1 10,000 gate field programmable gate array 136 nswith 2,048 SRAM bits1.2.3 Device class designator. The device class designator shall be a single letter identifying the product
9、assurance level asfollows:Device class Device requirements documentationM Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JANclass level B microcircuits in accordance with MIL-PRF-38535, appendix AQ or V Certification and qualification to MIL-PRF-385351.2.4 Case outline(
10、s). The case outline(s) shall be as designated in MIL-STD-1835 and as follows:Outline letter Descriptive designator Terminals Package styleX See figure 1 1/ 84 Ceramic Quad Flat Pack1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appen
11、dixA for device class M. 1/ All exposed metalized areas and leads are gold plated 100 microinches (2.5(m) min. thickness over 80 to 350 microinches(2.0 to 8.9 (m) thickness of nickel. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARDMICROCIRCU
12、IT DRAWINGDEFENSE SUPPLY CENTER COLUMBUSCOLUMBUS, OHIO 42316-5000SIZEA5962-98579REVISION LEVEL SHEET3DSCC FORM 2234APR 971.3 Absolute maximum ratings. 2/DC supply voltage range (V ) - -0.5 V dc to +7.0 V dcCCInput voltage range (V ) - -0.5 V dc to V + 0.5 V dcICCOutput voltage range (V ) - -0.5 V dc
13、 to V + 0.5 V dcOCI/O source sink current (I ) - 20 mAIOStorage temperature range (T ) - -65G28C to +150G28CSTGLead temperature (soldering, 10 seconds) - 300G28CThermal resistance, junction-to-case (G14 ) :JCCase X - 13G28C/W 3/Maximum junction temperature (T )- +150G28CJ1.4 Recommended operating co
14、nditions.Supply voltage (V ) - +4.5 V dc to +5.5 V dc CCCase operating temperature range (T ) - -55G28C to +125G28CC1.5 Digital logic testing for device classes Q and V. Fault coverage measurement of manufacturinglogic tests (MIL-STD-883, test method 5012) - 100 percent 4/ 2. APPLICABLE DOCUMENTS2.1
15、 Government specification, standards, and handbooks. The following specification, standards, and handbooks form apart of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed inthe issue of the Department of Defense Index of Specifica
16、tions and Standards (DoDISS) and supplement thereto, cited in thesolicitation.SPECIFICATIONDEPARTMENT OF DEFENSEMIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.STANDARDSDEPARTMENT OF DEFENSEMIL-STD-883 - Test Method Standard Microcircuits.MIL-STD-973 - Configuration Man
17、agement.MIL-STD-1835 - Interface Standard For Microcircuit Case Outlines.HANDBOOKSDEPARTMENT OF DEFENSEMIL-HDBK-103 - List of Standard Microcircuit Drawings (SMDs).MIL-HDBK-780 - Standard Microcircuit Drawings.(Unless otherwise indicated, copies of the specification, standards, and handbooks are ava
18、ilable from the StandardizationDocument Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)2/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at themaximum levels may degrade performance and affect reliability.3/ When the
19、 thermal resistance for this case is specified in MIL-STD-1835, that value shall supersede the value indicatedherein.4/ 100 percent test coverage of blank programmable logic devices.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARDMICROCIRCUIT
20、 DRAWINGDEFENSE SUPPLY CENTER COLUMBUSCOLUMBUS, OHIO 42316-5000SIZEA5962-98579REVISION LEVEL SHEET4DSCC FORM 2234APR 972.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents which
21、 are DoD adopted are those listed in the issue of the DODISScited in the solicitation. Unless otherwise specified, the issues of documents not listed in the DODISS are the issues of thedocuments cited in the solicitation.AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM)ASTM Standard F1192M-95 - Stan
22、dard Guide for the Measurement of Single Event Phenomena fromHeavy Ion Irradiation of Semiconductor Devices.(Applications for copies of ASTM publications should be addressed to the American Society for Testing and Materials,1916 Race Street, Philadelphia, PA 19103.)ELECTRONICS INDUSTRIES ALLIANCE (E
23、IA)JEDEC Standard EIA/JESD 78 - IC Latch-Up Test.(Applications for copies should be addressed to the Electronics Industries Association, 2500 Wilson Boulevard, Arlington, VA 22201.)(Non-Government standards and other publications are normally available from the organizations that prepare or distribu
24、tethe documents. These documents also may be available in or through libraries or other informational services.)2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, thetext of this drawing shall take precedence. Nothing in this documen
25、t, however, supersedes applicable laws and regulationsunless a specific exemption has been obtained.3. REQUIREMENTS3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufac
26、turers Quality Management (QM) plan. The modificationin the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device classM shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein.3.2
27、Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be asspecified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for deviceclass M.3.2.1 Case outline(s). The case outline(s) shall be in accordance wit
28、h 1.2.4 herein and on figure 1.3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2.3.2.3 Truth table(s). 3.2.3.1 Unprogrammed devices. The truth table or test vectors for unprogrammed devices for contracts involving noaltered item drawing is not part of this drawin
29、g. When required in screening (see 4.2 herein) or quality conformanceinspection group A, B, C, D, or E (see 4.4 herein), the devices shall be programmed by the manufacturer prior to test. Aminimum of 50 percent of the total number of logic modules shall be utilized or at least 25 percent of the tota
30、l logic modulesshall be utilized for any altered item drawing pattern.3.2.3.2 Programmed devices. The truth table or test vectors for programmed devices shall be as specified by an attachedaltered item drawing.3.2.4 Switching test circuit and waveforms . The switching test circuit and waveforms diag
31、ram shall be as specified onfigure 3.3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, theelectrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over thefull case operat
32、ing temperature range.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARDMICROCIRCUIT DRAWINGDEFENSE SUPPLY CENTER COLUMBUSCOLUMBUS, OHIO 42316-5000SIZEA5962-98579REVISION LEVEL SHEET5DSCC FORM 2234APR 973.4 Electrical test requirements. The ele
33、ctrical test requirements shall be the subgroups specified in table IIA. Theelectrical tests for each subgroup are defined in table I.3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also bemarked as listed in MIL-HDBK-103. For packages
34、where marking of the entire SMD PIN number is not feasible due to spacelimitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, theRHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL
35、-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A.3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ asrequired in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required i
36、n MIL-PRF-38535,appendix A.3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from aQML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M,a certificate of compliance shall be r
37、equired from a manufacturer in order to be listed as an approved source of supply inMIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approvedsource of supply for this drawing shall affirm that the manufacturers product meets, for device class
38、es Q and V, therequirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A andherein.3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix
39、 A shall be provided with each lot of microcircuitsdelivered to this drawing.3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2herein) involving devices acquired to this drawing is required for any change as defined in MIL-STD-973
40、.3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retainthe option to review the manufacturers facility and applicable required documentation. Offshore documentation shall bemade available onshore at the option of the reviewer.3.10 Mic
41、rocircuit group assignment for device class M. Device class M devices covered by this drawing shall be inmicrocircuit group number 42 (see MIL-PRF-38535, appendix A).3.11 Processing options. Since the device is capable of being programmed by either the manufacturer or the user toresult in a wide var
42、iety of configurations; two processing options are provided for selection in the contract, using an altereditem drawing.3.11.1 Unprogrammed device delivered to the user. All testing shall be verified through group A testing as defined in 4.4.1and table IIA. It is recommended that users perform subgr
43、oups 7 and 9 after programming to verify the specific programconfiguration.3.11.2 Manufacturer-programmed device delivered to the user. All testing requirements and quality assurance provisionsherein, including the requirements of the altered item drawing, shall be satisfied by the manufacturer prio
44、r to delivery.4. QUALITY ASSURANCE PROVISIONS4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordancewith MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modification in theQM plan shall not affect t
45、he form, fit, or function as described herein. For device class M, sampling and inspectionprocedures shall be in accordance with MIL-PRF-38535, appendix A.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARDMICROCIRCUIT DRAWINGDEFENSE SUPPLY CENT
46、ER COLUMBUSCOLUMBUS, OHIO 42316-5000SIZEA5962-98579REVISION LEVEL SHEET6DSCC FORM 2234APR 974.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall beconducted on all devices prior to qualification and technology conformance inspection. For device cl
47、ass M, screening shallbe in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformanceinspection.4.2.1 Additional criteria for device class M.a. Delete the sequence specified as initial (pre-burn-in) electrical parameters through interim (post-burn
48、-in)electrical parameters of method 5004 and substitute lines 1 through 6 of table IIA herein.b. The test circuit shall be maintained by the manufacturer under document revision level control and shall be madeavailable to the preparing or acquiring activity upon request. For device class M the test circuit shall specify theinputs