1、 EIA STANDARD Standard Test Method for Destructive Physical Analysis (DPA) of Ceramic Monolithic Capacitors EIA-469-E (Revision of EIA-469-D) April 2017 Electronic Components Industry Association EIA-469-E ANSI/EIA-469-E-2017 Approved: April 25, 2017NOTICE EIA Engineering Standards and Publications
2、are designed to serve the public interest through eliminating misunderstandings between manufacturers and purchasers, facilitating interchangeability and improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for his particular need. Exi
3、stence of such Standards and Publications shall not in any respect preclude any member or nonmember of ECIA from manufacturing or selling products not conforming to such Standards and Publications, nor shall the existence of such Standards and Publications preclude their voluntary use by those other
4、 than ECIA members, whether the Standard is to be used either domestically or internationally. Standards and Publications are adopted by ECIA in accordance with the American National Standards Institute (ANSI) patent policy. By such action, ECIA does not assume any liability to any patent owner, nor
5、 does it assume any obligation whatever to parties adopting the Standard or Publication. This EIA Standard is considered to have International Standardization implications, but the International Electrotechnical Commission activity has not progressed to the point where a valid comparison between the
6、 EIA Standard and the IEC document can be made. This Standard does not purport to address all safety problems associated with its use or all applicable regulatory requirements. It is the responsibility of the user of this Standard to establish appropriate safety and health practices and to determine
7、 the applicability of regulatory limitations before its use. (From Standards Proposal No. 5217, formulated under the cognizance of the P-2.1 Committee on EIA National Ceramic and Dielectric Capacitors Standards). Published by Electronic Components Industry Association 2017 EIA Standards it may inclu
8、de many production lots, depending on the control document. Interface: The junction of two layers in a layered device; for example, the junction of electrode to dielectric layers or between two ceramic sheet layers. Intermetallic: A solution of two metallic elements formed during reflow or due to ce
9、rtain other conditions involving temperature and time; for example, the copper/tin intermetallic formed between a copper surface and a tin/lead solder when the solder is reflowed against the copper surface. Knitline: Generally, the bonding interface between two layers of bondable materials; these ma
10、y be the same, similar, or different materials. Specifically, in ceramic multilayer capacitors, the interface of bonding between two ceramic sheets or a ceramic sheet and metal electrode layer. Margin: The ceramic portion of a chip element which envelopes the active area. Microcrack: A very fine nar
11、row crack in the ceramic that is visible only at relatively high magnifications (generally above 150X) with the aid of indirect or dark field or polarized lighting. See Annex D, Figure D.2. Mounting: The process, during DPA, consisting of setting the sample specimens up on an adhesive surface and su
12、rrounding them with a retainer ring, ready for pouring of the mounting resin. EIA-469-E Page 4 Overlap view: The longitudinal sectional view of the capacitor, showing the overlapped electrode edges, end margins, end metallizations, and chip to lead solder joint (if applicable). This is commonly call
13、ed the side view. See Figure A.2. Pinhole: By definition, an open cavity in the ceramic cover plate, generally circular in shape and usually having appreciable depth. Production lot: A quantity of capacitors of the same design, having a common raw material origin and formulation, which was processed
14、 through the chip manufacturing sequence as a single group. NOTE More than one production lot may come from one chip lot, and procurement specifications for capacitors may require traceability all the way back to raw material lots. Pull-out: The undesirable shattering, crumbling, and removal of mate
15、rials from the specimen surface during abrasive sectioning or polishing. This is a problem particularly around voids, delaminations or other unsupported edges. Side margin: The portion of the ceramic which extends from the side of the electrodes to the outside edge of the chip element. See Figure A.
16、2. Side margin view: The sectional view of a sample unit, showing the side margins, cover plates and electrode edges. See Figure A.2. Solder fill: The bulk of solder metal which occupies the space between a capacitor lead wire and the capacitor element, which constitutes the solder joint between lea
17、d and capacitor element. Solder fillet: The externally visible portion of the solder metal which attaches the lead wire to the capacitor element and is characterized by a smooth and tapering convergence of solder metal with lead wire and capacitor element, the surface of the solder often being somew
18、hat concave. Solder wetting: The coating of a surface to be soldered with a smooth adherent film of molten solder. Stress relief cracking: Cracks generally seen in the overlap view, but also in the side margin view, associated usually with the cover plates and the outer two or three electrodes. Thes
19、e are artifacts of the sectioning process due to grinding samples without decapsulation before mounting or due to inadequate edge support. They are not defects and must not be assessed as such. Surface fracturing: Shallow, oblique cracking of ceramic between electrodes and in cover plates due to gri
20、nding stresses or chatter of the potted sample on the moving surface of the abrasive grit where the sample may alternately grab and slide. This artifact may be induced also during hand polishing operations. EIA-469-E Page 5 Surface relief: The difference in the level or height of the ground or polis
21、hed specimens between the relatively hard and softer materials. The metal portions erode faster during grinding and polishing than do the harder ceramic surfaces. Hand polishing produces considerable surface relief. Void: An absence of material, typically in the dielectric layer. A void differs from
22、 a delamination in that material is missing and therefore there is a cavity in the dielectric layer or other material. 4 Recommended procedures and methods It is important that the DPA process be repeatable and reproducible. The guidelines given here provide minimal but crucial information necessary
23、 to achieve that outcome. However, it is the responsibility of the laboratory performing the DPA to develop test methods that ensure the repeatable and reproducible results. As the part size and dielectric thickness decrease, marginal procedures in sample preparation can falsely enlarge the true siz
24、e of internal defects. Use of automated grinding and polishing equipment, although not required by this specification, is recommended due to the more consistent results obtained when using automation. There are several steps involved in the DPA process; cleaning (and decapsulation if necessary), mou
25、nting parts in a block of cold mounting resin, then grinding and polishing the mounted specimen. 4.1 Visual appearance of DPA sample units Since the primary purpose of DPA is determination of internal physical quality, capacitors with rejectable visual defects should not be used for DPA. However, so
26、metimes it is expedient to use visual rejects for DPA. If visual rejects are included in the DPA, then appropriate records of the type and number of external defects must be kept to avoid confusing the internal examination performed during DPA. 4.2 Cleaning prior to mounting In order to ensure good
27、adhesion of the mounting resin to the capacitor, it is necessary to clean and dry the capacitors prior to mounting. Isopropyl alcohol is a good cleaning solvent. Place cleaned capacitors on an absorbent tissue and allow to air dry until all residual moisture is evaporated. 4.3 Mounting and casting P
28、arts should be fixtured on a double-sided adhesive surface inside a mold ring. See Figure C.3. Mold rings may be disposable or reusable. If they are reusable, a fixture that applies an even force across the resin block should be used for removing the block from the mold ring to ensure no induced fai
29、lures in the capacitor samples during removal. EIA-469-E Page 6 One half of the capacitors should be fixtured so that grinding and polishing will reveal the side view and the other half the end view. If there are an uneven number of capacitors, the larger quantity should be fixtured to reveal the si
30、de view. See Figure A.2. The capacitors shall be mounted so that there is adequate space between parts and adequate space between the edges of the parts and the mold ring. Adequate space means that sufficient space is allowed so that mounting resin can flow between the parts and also flow between th
31、e parts and the mold ring. The capacitors should also be mounted so that they are flat within 5 degrees of the sectional plane. Mold rings should be as small as is practical. Generally, 1.25 inch mold rings are large enough for all but the largest capacitors. A suitable cold mounting resin should be
32、 mixed according to the manufacturers recommendation and poured into the mold. The cold mounting resin should cure at room temperature and have an exotherm of less than 65C. The resin should have low shrinkage and after curing should still support the edges of the capacitor. Finally, the resin shoul
33、d be sufficiently hard to resist edge relief during polishing. It is advisable to remove any trapped air prior to curing the resin. 4.4 Grinding and polishing Grinding is used to cut into the mounted parts and expose the region of interest. Successively finer grades of silicon carbide paper are used
34、 with a continuous stream of water for cooling and cleaning the wheel. Mounts should be cleaned with a mild detergent, or similar solution at each change of silicon carbide paper. It is suggested that automated grinding and polishing equipment be used for sectioning. Automated equipment applies a co
35、nstant, known pressure during grinding and polishing. This minimizes the introduction of defects during the grinding and polishing steps. See Clause 5. Due to the high probability of introducing cracks into the capacitor, cutting or sawing of the parts is not permitted. For the same reason, it is su
36、ggested that silicon carbide paper coarser than 320 (P400) grit not be used. Polishing should be accomplished in several steps. Steps should be kept to a minimum in order to avoid corner rounding of the capacitors which could conceal defects. The first step is a rough polish and the second step is a
37、 very fine grit polish. The preferred polishing media are diamond compounds, although alumina powder may be used, where aluminum contamination is not an issue. Alumina powder, when used incorrectly, is known for causing corner rounding. EIA-469-E Page 7 5 Sample preparation problems The process of m
38、ounting, grinding and polishing parts remains more of an art than a science. Poor preparation techniques can induce problems that are not present in the sample prior to mounting and sectioning. These anomalies are called artifacts. As ceramic capacitors can break under relatively low mechanical forc
39、e or due to thermal stresses, it is important to follow established procedures and to automate the process if possible. As the part size and dielectric thickness decrease, marginal procedures in sample preparation can falsely enlarge the true size of internal defects. Problems induced by poor sample
40、 preparation may include the following: Excessive pull-out: Pull-out increases the size of voids or delaminations in the capacitor. It occurs during the grinding step if excessively coarse silicon carbide paper and/or high contact pressure is used. It may also occur during grinding or polishing when
41、 using finer grit papers or abrasives if the mount is grabbing and then releasing against the silicon carbide paper or polishing abrasive. Because of the possibility of pull-out, the best method for determining the microstructure of ceramic capacitors is not DPA. Fracturing the capacitor with angle
42、cutters and examining the fractured surface using a microscope with a large depth of field, such as a scanning electron microscope, yields a much truer picture of the ceramic microstructure. Inclined component mounting: Samples that are mounted at an incline to the desired sectional plane may show w
43、ide wavy appearing electrodes. These samples should not be used for analysis. Cover plate cracking: Cracks in the cover plate frequently occur as a result of unsupported cover layers due to improper sample cleaning or improperly cured mounting resin. Mounting resin is usually a two-part system. The
44、quantity of each part and the mixing technique used are very important. Cover plate cracking can also occur due to excessive pressure during grinding and polishing. Grinding scratches: If the silicon carbide grit used for grinding is not chosen properly or samples and paper surface are contaminated
45、by larger grit, scratches may remain even after the polishing step. The scratches can also cause pull-outs. Both the scratches and the pull-outs may be misinterpreted as defects. Corner Rounding: Excessive pressure or excessive time during polishing can cause the sample edges and corners to round. R
46、ounding makes accurately measuring terminations, barrier layers and solderable surfaces impossible. It also may hide cracks radiusing back from the terminations. EIA-469-E Page 8 6 Microscopic evaluation of polished DPA samples The sectioned, polished DPA samples shall be visually examined, using a
47、compound microscope equipped with vertical illumination for bright field and capable of dark field illumination, as well. Vicinal illumination may be used also to facilitate crack detection. For information regarding vicinal illumination, see Hull, S. “Nondestructive Detection of Cracks in Ceramics
48、Using Vicinal Illumination.“ In Proceedings of the 25th International Symposium for Testing and Failure Analysis. Materials Park, OH: ASM International, 1999 (ISBN 0-87170-646-6). The microscope shall be capable of at least 300X magnification. The usual range of magnification that should be used is
49、50X to 500X. However, individual microscopes will vary considerable in available magnifications because of various combinations of ocular, objective, and intermediate lenses. For the majority of the DPA sample evaluations, 100X to 300X magnifications is sufficient and convenient. For preliminary examination for the purpose of locating and identifying anomalies or defects, a lower magnification should be used. However, for such tasks as void or barrier layer measurement one of the higher magnifications must be used (in the 500X to 700X range). A calibrated optical measurement device s
