1、 ANSI/EIA-540B0AE-2000 (R2009) Approved: May 23, 2000 Reaffirmed: January 13, 2009 EIA SPECIFICATION EIA-540B0AE Detail Specification for Production Land Grid Array (LGA) Socket for Use in Electronic Equipment EIA-540B0AE JUNE 2000 ELECTRONIC COMPONENTS, ASSEMBLIES & MATERIALS ASSOCIATION THE ELECTR
2、ONIC COMPONENT SECTOR OF THE ELECTRONIC INDUSTRIES ALLIANCE NOTICE EIA Engineering Standards and Publications are designed to serve the public interest through eliminating misunderstandings between manufacturers and purchasers, facilitating interchangeability and improvement of products, and assisti
3、ng the purchaser in selecting and obtaining with minimum delay the proper product for his particular need. Existence of such Standards and Publications shall not in any respect preclude any member or nonmember of EIA from manufacturing or selling products not conforming to such Standards and Publica
4、tions, nor shall the existence of such Standards and Publications preclude their voluntary use by those other than EIA members, whether the standard is to be used either domestically or internationally. Standards and Publications are adopted by EIA in accordance with the American National Standards
5、Institute (ANSI) patent policy. By such action, EIA does not assume any liability to any patent owner, nor does it assume any obligation whatever to parties adopting the Standard or Publication. This EIA Specification is considered to have International Standardization implication, but the Internati
6、onal Electrotechnical Commission activity has not progressed to the point where a valid comparison between the EIA Specification and the IEC document can be made. This Specification does not purport to address all safety problems associated with its use or all applicable regulatory requirements. It
7、is the responsibility of the user of this Specification to establish appropriate safety and health practices and to determine the applicability of regulatory limitations before its use. (From Standards Proposal No. 3935-A, formulated under the cognizance of the CE-3.0 Committee on Sockets.) Publishe
8、d by ELECTRONIC INDUSTRIES ALLIANCE 2000 Technology Strategy & Standards Department 2500 Wilson Boulevard Arlington, VA 22201 PRICE: Please refer to the current Catalog of EIA Electronic Industries Alliance Standards and Engineering Publications or call Global Engineering Documents, USA and Canada (
9、1-800-854-7179) International (303-397-7956) All rights reserved Printed in U.S.A. PLEASE! DON”T VIOLATE THE LAW! This document is copyrighted by the EIA and may not be reproduced without permission. Organizations may obtain permission to reproduce a limited number of copies through entering into a
10、license agreement. For information, contact: Global Engineering Documents 15 Inverness Way East Englewood, CO 80112-5704 or call U.S.A. and Canada 1-800-854-7179, International (303) 397-7956 EIA-540B0AESystems Standard OrganizationELECTRONIC INDUSTRIES ALLIANCEDETAIL SPECIFICATION NUMBEREIA-540B0AE
11、 GENERIC SPECIFICATION NUMBEREIA-5400000-ASECTIONAL SPECIFICATION NUMBEREIA-540B000BLANK DETAIL SPECIFICATION NUMBERNoneProduct DescriptionThis specification is for use with LGA devicesdescribed by JEDEC.Product RequirementsThe complete requirements for the interconnect systemshall consist of this D
12、etail Specification and whereapplicable the latest issue of EIA-540B000.TYPICAL CONSTRUCTIONContact Material : Copper alloyOutermost Contact Finish: GoldTermination Finish : Tin-leadInsulator Material : High temperature thermoplasticAPPLICATION/ASSESSMENT LEVELFor use in commercial, computer, and co
13、mmunications equipment.Page 1Socket Outline DrawingSee figures 1 and 2 for dimensional information.Tolerances: + 0.13 mm (+ 0.005 in) on allfigures except where noted.EIA-540B0AEPage 21 Scope and purposeThis specification covers interconnect systems typically used for production land grid array(LGA)
14、 devices.1.2 PurposeThe purpose of this detail specification is to provide all information required for theidentification and assessment of the LGA socket described herein. The information,contained herein or by reference, is complete and sufficient for inspection purposes.2 Normative referencesThe
15、following standards contain provisions that, through reference in this text, constituteprovisions of this standard. At the time of publication, the editions indicated were valid.All standards are subject to revision, and parties to agreements based on this standard areencouraged to investigate the p
16、ossibility of applying the most recent editions of thestandards indicated below.a) EIA-364-C, Electrical Connector Test Procedures Including EnvironmentalClassifications (December, 1994).b) EIA-5400000-A , Generic Specification (August, 1996).c) EIA-540B000, Sectional Specification (November, 1997).
17、3 EIA part number (example)E540 B 0 AE XXX X X X X XContact spacing (see 4.7)Mounting method (see 4.5)Actuation type (see 4.4)Contact finish at termination area (see 4.2)Contact finish at engagement point area (see 4.1)Number of contacts (see 4.3)Detail designatorBlank detail designator (“zero” if n
18、one)Sectional designatorGeneric designatorEIA-540B0AEPage 34 Socket details4.1 Contact platingThe outermost plating of the contact area shall be gold or tin-lead and shallsatisfy the requirements specified in the qualification test sequence. The contactplating systems utilized shall be compatible to
19、 the systems they are mated to,such as:a) Gold (designation “A”)b) Tin-lead (designation “B”)NOTE: Gold-plated contact surfaces mated to tin-lead plated contact surfacesare not an acceptable plating combination.4.2 Contact finish at termination areaContact finish at the termination area shall be des
20、ignated by a letter indicated inTable 1.Table 1 Contact finish at termination areaIdentification Contactnumber finishP GoldZ OtherEIA-540B0AEPage 44.3 Number of contacts and footprint patternThree characters shall designate the number of terminals of the socket and the footprintpattern. The first tw
21、o characters shall be numerical designating the grid size of the socket.For example “16” designates a 16 x 16 grid, “25” designates a 25 x 25 grid, etc. The thirdcharacter shall be the numeral “0” if the socket contains the maximum number of contactsobtainable, or a letter (A through Z) for a partia
22、lly filled array. Annex F delineates thethree character designations for all known arrays. See figure 2 for the recommended LGAboard pattern.NOTE- If all letters of the alphabet have been used for the third character of a particulargrid size, then the first character shall be replaced with the numer
23、al “9”, allowing anothercomplete use of the alphabet as the third character. For example “90R” would depict aspecific 10 x 10 array, whereas “91R” would depict a specific 11 x 11 array. If additionaldesignations are needed, the process shall continue by utilizing an “8”, “7”, etc. as the firstcharac
24、ter.4.4 Actuation methodThe actuation of the socket shall be designated by one number indicated in table 2.Table 2 Actuation typeIdentification ActuationNumber method1 ZIF with Lever Actuation2 ZIF with Slot Actuation3Oth4.5 Mounting MethodThe mounting of the socket shall be designated by one letter
25、 indicated in table 3.Table 3 Mounting methodIdentification Mountingletter methodA Surface MountB Through HoleCOtherEIA-540B0AEPage 54.6 Socket dimensionsThe configuration of the LGA socket is optional within the limits of the dimensionswithin figure 1 and the mounting dimensions within figure 2.4.7
26、 Contact spacingThe contact spacing shall be designated by one letter indicated in table 4.Table 4 Contact spacingIdentification Contactletter spacingA 1.27 (0.050)B 1.00 (0.039)C 0.80 (0.030)D 0.50 (0.020)E Other5 Mating devicesMating devices shall be in accordance with JEDEC specifications. Said d
27、evices shall beinternally wired in order to perform the appropriate electrical measurements such aslow-level circuit resistance (LLCR).EIA-540B0AEPage 6Surface Mount Application Solder Tail Style2.54 max.(0.100 max.)DE EDSurface Mount Application Solder Tail StyleSocket housingD(minimum)E(minimum)16
28、 x 1633 x 3325 x 2530.40 (1.197) 30.40 (1.197)50.80 (2.000)40.64 (1.600)Socket housingFigure 1 Housing dimensions3.00 max.(0.118 max.)3.43 max.(0.135 max.)50.80 (2.000)40.64 (1.600)EIA-540B0AEPage 7Figure 2 - Recommended board patternNotes (Surface mount application):a) SMT pad size : 0.86 mm +/- 0.
29、05 mm diameter(0.034 in +/- 0.002 in diameter)b) SMT pad plating : Tin-LeadNotes (Plated through hole application):a) Finished PTH size : 0.86 mm +/- 0.05 mm diameter(0.034 in +/- 0.002 in diameter)b) PTH plating : Tin-LeadBBAASocket outlineA B30.4040.6450.80See table 4for spacingSee table 4for spac
30、ingSee table 4for spacingEIA-540B0AEPage 86 Atmospheric conditions for testingThe interconnect system shall be tested at the atmospheric conditions as specified in table5, general controlled.Table 5 Atmospheric conditions for testingAtmospheric Temperature Air Relativeconditions pressure humidityGen
31、eral 15 C to 35 C 87 kPa to 107 kPa 80% or lesscontrolled (59 F to 95 F) (650 mmHg to 800 mmHg)7 Test sequenceThis test sequence shows all tests and the order in which they shall be carried out as wellas the requirements to be met. The baseline test sequence (figure 3) illustrates the order oftests
32、by group. In the following test sequence tables, where an EIA test is specifiedwithout a letter suffix, the latest approved version of that test shall be used.EIA-540B0AEPage 9SAMPLE PREPARATIONPRECON- LLCR DWV PRECON- LLCRDITIONING DITIONING LLCRRESISTANCETO SOLDERLLCR LLCR HEATDURABILITY IR MECH.S
33、HOCKTEMP. DURABILITYLIFE SOLVENTMECH. THERMAL RESISTANCESHOCK SHOCKLLCR LLCR RANDOM LLCRVIBRATIONRANDOMVIBRATIONDWVLLCR MIXEDMIXED FLOWINGFLOWING GASTHERMAL GASLLCR SHOCK IRPOWER LLCRLLCR CYCLELLCRATC CYC.TEMPW/HUMIDITYLLCRCYC.TEMP W/HUMIDITYLLCR DWVLLCRIRAP BP CP DP EP FP GPLLCR : Low level circuit
34、 resistanceATC : Accelerated thermal cyclingDWV : Dielectric withstanding voltageIR : Insulation resistanceFigure 3 - Baseline test sequenceEIA-540B0AEPage 10Table 6-Group APEIA testMeasurements EIA RequirementsTest Title EIA Severity or to be performed 364 forphase 364 condition no. performance lev
35、elno. of testAP1 Precondition 17 Performed on Visual 18 No damageunmounted examinationsockets anddevices priorto test for24 hours at85 C 2 C(185 F 3 F)See note 1.AP2 20 mV LLCR 23 Record100 mASee annex Cand note 1.AP3 Mechanical 27 Test cond. A Visual 18 No damageshock 50 g examination11.0 ms3.4 m/s
36、(11.3 ft/s)Half sine wave,18 shockstotalSee note 2. Nanosecond 87 2.0 nanosecondeventdetectionEIA-540B0AEPage 11Table 6-Group AP ContinuedEIA testMeasurements EIA RequirementsTest Title EIA Severity or to be performed 364 forphase 364 condition no. performance levelno. of testAP4 Vibration 28 Test c
37、ond. V Visual 18 No damageTest letter B examination7.3 grms50 Hzto 2000 Hz45 minutes/axis, 3 axistotalSee note 2. Nanosecond 87 2.0 nanosecondseventdetectionAP5 20 mV LLCR 23 20.0 m maximum100 mA rise per contact pairSee annex Cand note 1.AP6 Accelerated - - 0 C to 75 Cthermal (32 F to 167 F) Visual
38、 18 No damagecycling 2000 cycles examination(ATC) Test is performed onall LLCRsamples. Seeannex A .20 mV LLCR 23 20.0 m maximum100 mA measured rise per contact pairSee annex C every 168 hand note 1.NOTES1. A sufficient number of sockets (minimum of 4) shall be tested to obtain a minimum of 500daisy-
39、chained data points (1000 contact interfaces) for low level circuit resistancemeasurements on the preconditioned (thermal-aged) samples and a minimum of 500 daisychained data points (1000 contact interfaces) for low level circuit resistance measurementson the non-preconditioned (non-thermal-aged) sa
40、mples.2. Nanosecond event detection shall be monitored on 2 preconditioned (thermal-aged) samplesand 2 non-preconditioned (non-thermal-aged) samples. (These are in addition to the lowlevel circuit resistance samples.)EIA-540B0AEPage 12Table 7-Group BPEIA testMeasurements EIA RequirementsTest Title E
41、IA Severity or to be performed 364 forphase 364 condition no. performance levelno. of testBP1 20 mV LLCR 23 Record100 mASee annex Cand note 1.BP2 Durability 9 20 cycles total Visual 18 No damageSee note 2 examination20 mV LLCR 23 20.0 m maximum100 mA rise per contact pairSee annex CBP3 Thermal 32 10
42、 cycles Visual 18 No damageshock 30 minutes at examinationeach temp.extreme-40 C to +60 C(-40 F to +140 F)20 mV LLCR 23 20.0 m maximum100 mA rise per contact pairSee annex Cand note 1.BP4 Cyclic 31 Test cond.III Visual 18 No damagehumidity except examination25 C to 85 C(77 F to 185 F)at 80% 2% RH100
43、0 hoursomit subcycle7a and 7bCycle duration:8 h. See annex E.20 mV LLCR 23 20.0 m maximum100 mA measured rise per contact pairSee annex C every 168 hand note 1.EIA-540B0AEPage 13Table 7-Group BP ContinuedNOTES1. A sufficient number of sockets (minimum of 4) shall be tested to obtain a minimum of500
44、daisy-chained data points (1000 contact interfaces) for low-level circuit resistancemeasurements.2. First 15 cycles are performed with several LGA mating devices, last 5 cycles with actual LGAtest devices (5 cycles of durability per LGA mating device).a) The first 15 cycles of durability is performe
45、d with 3 separate LGA test devices(5 cycles per test device).b) The last 5 cycles of durability is performed with a fourth LGA which is to be the testdevice and remains mated to the socket for the remainder of test.EIA-540B0AEPage 14Table 8-Group CPEIA testMeasurements EIA RequirementsTest Title EIA
46、 Severity or to be performed 364 forphase 364 condition no. performance levelno. of testCP1 400 V ac Dielectric 20 No flashoverSee note 2 withstanding breakdown,etc.voltageCP2 100 V dc Insulation 21 100 megohmsSee note 2 resistance minimumCP3 Thermal 32 10 cycles Visual 18 No damageshock 30 minutes
47、at examinationeach temp.extreme-40 C to +60 C(-40 F to +140 F)400 V ac Dielectric 20 No flashoverSee note 2 withstanding breakdown,etc.voltage100 V dc Insulation 21 100 megohmsSee note 2 resistance minimumCP4 Cyclic 31 Test cond.III Visual 18 No damagehumidity except examination25 C to 85 C(77 F to
48、185 F)at 80% 2% RH1000 hoursomit subcycle7a and 7bCycle duration:8 h. See annex E.400 V ac Dielectric 20 No flashoverSee note 2 withstanding breakdown,etc.voltage100 V dc Insulation 21 100 megohmsSee note 2 resistance minimumNOTES1. Four unmounted/unmated sockets shall be subjected to the above test
49、s.2. 25 adjacent contact pairs, randomly chosen, equally dispersed throughout the socket aretested.EIA-540B0AEPage 15Table 9-Group DPEIA testMeasurements EIA RequirementsTest Title EIA Severity or to be performed 364 forphase 364 condition no. performance levelno. of testDP1 Precondition 17 Test performed Visual No damageon unmounted examinationsockets anddevices priorto test for 24 h.85 C 2 C(185 F 3 F)See no
