1、JEDEC SOLID STATE TECHNOLOGY ASSOCIATIONJEDECSTANDARDJESD84-A41JULY 2007Embedded MultiMediaCard (eMMC) Product Standard, Standard CapacityNOTICEJEDEC standards and publications contain material that has been prepared, reviewed, and approved through the JEDEC Board of Directors level and subsequently
2、 reviewed and approved by the JEDEC legal counsel.JEDEC standards and publications are designed to serve the public interest through eliminating misunderstandings between manufacturers and purchasers, facilitating interchangeability and improvement of products, and assisting the purchaser in selecti
3、ng and obtaining with minimum delay the proper product for use by those other than JEDEC members, whether the standard is to be used either domestically or internationally.JEDEC standards and publications are adopted without regard to whether or not their adoption may involve patents or articles, ma
4、terials, or processes. By such action JEDEC does not assume any liability to any patent owner, nor does it assume any obligation whatever to parties adopting the JEDEC standards or publications.The information included in JEDEC standards and publications represents a sound approach to product specif
5、ication and application, principally from the solid state device manufacturer viewpoint. Within the JEDEC organization there are procedures whereby a JEDEC standard or publication may be further processed and ultimately become an ANSI standard.No claims to be in conformance with this standard may be
6、 made unless all requirements stated in the standard are met.Inquiries, comments, and suggestions relative to the content of this JEDEC standard or publication should be addressed to JEDEC at the address below, or call (703) 907-7559 or www.jedec.orgPublished byJEDEC Solid State Technology Associati
7、on 20072500 Wilson BoulevardArlington, VA 22201-3834This document may be downloaded free of charge; however JEDEC retains the copyright on this material. By downloading this file the individual agrees not to charge for or resell the resulting material.PRICE: Please refer to the currentCatalog of JED
8、EC Engineering Standards and Publications online athttp:/www.jedec.org/Catalog/catalog.cfmPrinted in the U.S.A. All rights reservedPLEASE!DONT VIOLATE THE LAW!This document is copyrighted by JEDEC and may not bereproduced without permission.Organizations may obtain permission to reproduce a limited
9、number of copies through entering into a license agreement. For information, contact:JEDEC Solid State Technology Association2500 Wilson BoulevardArlington, Virginia 22201-3834or call (703) 907-7559JEDEC Standard No. JESD84-A41-i-Embedded MultiMediaCard (eMMC) Electrical Standard,Standard CapacityCO
10、NTENTSPageForeword . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . viiIntroduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v
11、ii1 Scope. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Normative reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Terms and definitions . . . . .
12、 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 eMMC Product Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24.1 MMC-specific features . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13、 . . . . . . . . . . . . . . . . . . . . . . 25 MMC Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 General description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14、. 37 Flash-memory-independent technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Defect and error management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Operation modes . . . . . . . . . . . . . . . . . . . . . . .
15、 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 510 Device signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 511 Physical description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16、 . . . . . . . . . . . . . . 712 Electrical interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 912.1 Power-up. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
17、912.1.1 Power-up guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1012.2 Power cycling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11JEDEC Standard No. JESD84-A41-i
18、i-Embedded MultiMediaCard (eMMC) Electrical Standard,Standard CapacityCONTENTSPage13 Bus operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1113.1 Power supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
19、. . . . . . . . . . . . . . . . . . 1213.2 Bus signal line load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1213.3 Bus signal levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20、. . 1213.3.1 Push-pull bus signal level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1313.3.2 Bus timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1314 Package Information .
21、 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14JEDEC Standard No. JESD84-A41-iii-Embedded MultiMediaCard (eMMC) Electrical Standard,Standard CapacityFIGURESPageFigure 1 MMC architecture 3Figure 2 Functional block diagram.4Figure 3 Ball assignme
22、nt for AA and AB devices (see MO-276 drawings for details) .6Figure 4 Ball assignment for BA devices (see MO-276 drawings for details).7Figure 5 Power-up diagram 10Figure 6 eMMC power cycle11Figure 7 Bus signal levels.12Figure 8 Bu and device interface timing.13JEDEC Standard No. JESD84-A41-iv-JEDEC
23、 Standard No. JESD84-A41-v-Embedded MultiMediaCard (eMMC) Electrical Standard,Standard CapacityTABLESPageTable 1 Communication signals5Table 2 Ball assignments.8Table 3 Bus operating parameters/conditions .11Table 4 JEDEC eMMC power supply voltage12Table 5 Open-drain mode bus signal level13Table 6 P
24、ush-pull bus signal level.13Table 7 Interface timing (high-speed interface)13Table 8 Interface timing (standard interface)14JEDEC Standard No. JESD84-A41-vi-JEDEC Standard No. JESD84-A41-vii-ForewordThis top-level specification provides detailed information for aspects of the eMMC that differ from t
25、he standard JEDEC/MMC Electrical Specification. For eMMC applications, the content of this product speci-fication supersedes content of the lower-level JESD84-B41 electrical specification to which it refers.IntroductionIn embedded applications, eMMC devices will be soldered directly on the PCB. The
26、lower-level specifica-tion includes information unique to card form factors, making this top-level document essential for embed-ded application designers.This specification covers a broad range of possible system configurations and voltage ranges. Be sure to contact your silicon provider for impleme
27、ntation details prior to initiating design work.JEDEC Standard No. JESD84-A41-viii-JEDEC Standard No. JESD84-A41Page 1Embedded MultiMediaCard (eMMC) Electrical Standard, Standard Capacity1 ScopeThis document provides a definition of the Embedded MultiMediaCard product, its environment, and han-dling
28、. It also provides design guidelines and defines a tool box of macro functions and algorithms intended to reduce design-in costs.2 Normative referenceThe following normative documents contain provisions that, through reference in this text, constitute pro-visions of this standard. For dated referenc
29、es, subsequent amendments to, or revisions of, any of these pub-lications do not apply. However, parties to agreements based on this standard are encouraged to investigate the possibility of applying the most recent editions of the normative documents indicated below. For undated references, the lat
30、est edition of the normative document referred to applies.This document references the MMC electrical specification JESD84-B41.3 Terms and definitionsFor the purposes of this publication, the following abbreviations for common terms apply:Block a number of bytes, basic data transfer unitBroadcast a
31、command sent to all cards on the MultiMediaCard bus1CID Card IDentification number register CLK clock signalCMD command line or MultiMediaCard bus command (if extended CMDXX)CRC Cyclic Redundancy CheckCSD Card Specific Data registerDAT data lineDSR Driver Stage RegisterFlash a type of multiple time
32、programmable non volatile memoryGroup a number of write blocks, composite erase and write protect unitLOW, HIGH binary interface states with defined assignment to a voltage levelNSAC defines the worst case for the clock rate dependent factor of the data access timeMSB, LSB the Most Significant Bit o
33、r Least Significant BitOCR Operation Conditions Register1. Broadcast occurs only in MultiMediaCard systems supporting versions prior to 4.0. In version 4.0 and later only one card can be present on the bus.JEDEC Standard No. JESD84-A41Page 2open-drain a logical interface operation mode. An external
34、resistor or current source is used to pull the interface level to HIGH, the internal transistor pushes it to LOWpayload net datapush-pull a logical interface operation mode, a complementary pair of transistors is used to push the interface level to HIGH or LOWRCA Relative Card Address registerROM Re
35、ad Only Memorystuff bit filling 0 bits to ensure fixed length frames for commands and responsesSPI Serial Peripheral InterfaceTAAC defines the time dependent factor of the data access timethree-state driver a driver stage which has three output driver states: HIGH, LOW and high impedance (which mean
36、s that the interface does not have any influence on the interface level)token code word representing a commandVDD+ power supplyVSSpower supply ground4 eMMC Product FeaturesEmbedded MultiMediaCard product features include:MMC interface Space-saving multiple-chip package Memory controller and Flash Te
37、mperature range: 25C to +85C Offered in three LFBGA packages (see MO-276A for details): AA: 12mm x 16mm x 1.4mm AB: 12mm x 18mm x 1.4mm BA: 11.5mm x 13mm x 1.3mm System voltage Vcc: 1.71.95V or 2.73.6V VccQ: 1.71.95V or 2.73.6V4.1 MMC-specific features JEDEC Electrical Specification, version 4.15 MM
38、C ArchitectureStandard MMC architecture is depicted in Figure 1 on page 3.JEDEC Standard No. JESD84-A41Page 3Figure 1 MMC architecture6 General descriptionJEDEC eMMC is a mass data storage device that utilizes a MultiMediaCard (MMC) interface, as shown in Figure 2 on page 4. It features low cost, sm
39、all size, Flash-technology independence, and high data through-put. These features make JEDEC eMMC ideal for smart phones, digital cameras, PDAs, MP3 players, and countless other portable applications.The nonvolatile JEDEC eMMC draws no power to maintain stored data, delivers high performance across
40、 a wide range of operating temperatures, and resists shock and vibration disruption.A JEDEC eMMC device includes a Flash memory component and a controller on an advanced 10-signal bus.Flash-technology independence is supported by compliance with this specification. The specification defines the comm
41、unication protocol for MMC mode. This ensures ongoing compatibility between evolv-ing Flash memory components and existing microcontrollers.The eMMC functional block diagram is shown in Figure 2 on page 4.MemoryControllerFlash MemoryVCCVCCQMMC InterfaceJEDEC Standard No. JESD84-A41Page 4Figure 2 Fun
42、ctional block diagram7 Flash-memory-independent technologyThe MMC specification defines the communication protocol between a host and a device. The protocol is independent of the Flash memory features included in the device. The JEDEC eMMC has an intelligent on-board controller that manages the MMC
43、communication protocol.The controller also handles block-management functions such as logical-block allocation and wear level-ing. These management functions require complex algorithms and depend entirely on the Flash memory technology (generation or memory cell type). JEDEC eMMC handles these manag
44、ement functions internally, making them invisible to the host proces-sor.8 Defect and error managementMemoryControllerFlash MemoryVDDiVDDiVCCQDAT7:0CMDCLKVSSVSSQJEDEC Standard No. JESD84-A41Page 5JEDEC eMMC incorporates advanced technology for defect and error management. If a defective block is ide
45、ntified, JEDEC eMMC completely replaces the defective block with one of the spare blocks. This pro-cess is invisible to the host and generally does not affect data space allocated for the user.JEDEC eMMC also includes a built-in error correction code (ECC) algorithm to ensure that data integrity is
46、maintained.9 Operation modesJEDEC eMMC supports MMC mode as well as SPI mode. The details are described in the following sec-tion.10 Device signalsJEDEC eMMC devices transfer data via a configurable number of data-bus signals. The communication signals are shown in Table 1.Device initialization uses
47、 only the CMD channel and is, therefore, compatible with all devices.Table 1 Communication signalsSignal Symbol DescriptionClock CLK Each cycle of the clock directs a transfer on the command line and on the data line(s). The frequency can vary between the minimum and the maximum clock fre-quency.Com
48、mand CMD This signal is a bidirectional command channel used for device initialization and command transfers.The CMD signal has two operating modes: open-drain for initialization, and push-pull for command transfer.Commands are sent from the MultiMediaCard bus master to the device, and responses are
49、 sent from the device to the host.Data DAT7:0 These are bidirectional data signals. The DAT signals operate in push-pull mode.By default, after power-up or RESET, only DAT0 is used for data transfer. The memory controller can configure a wider data bus for data transfer using either DAT3:0 (4-bit mode) or DAT7:0 (8-bit mode).JEDEC eMMC includes internal pull-up resistors for data lines DAT7:1. Immedi-ately after entering the 4-bit mode, the device disconnects the internal pull-up resis-tors on the DAT1 and DAT2 lines. (The
